公开(公告)号：GB2580827B

公开(公告)日：2022-02-23

申请号：GB202004615

申请日：2018-09-21

Applicant: IBM

Inventor： JOEL PEREIRA DE SOUZA ,  NING LI ,  YAO YAO ,  DEVENDRA SADANA ,  YUN SEOG LEE

IPC: H01L33/00

Abstract: A semiconductor device is formed using an n-type layer of Zinc Oxide, a p-type layer formed of a narrow bandgap material. The narrow bandgap material uses a group 3A element and a group 5A element. A junction is formed between the n-type layer and the p-type layer, the junction being operable as a heterojunction diode having a rectifying property at a temperature range, the temperature range having a high limit at room temperature.

公开(公告)号：GB2538594A

公开(公告)日：2016-11-23

申请号：GB201604088

申请日：2016-03-10

Applicant: IBM

Inventor： NING LI ,  DEVENDRA SADANA ,  EFFENDI LEOBANDUNG

IPC: H01L21/8258 ,  B82Y20/00 ,  G02B6/12 ,  G02B6/13 ,  H01L21/70 ,  H01L27/04 ,  H01L27/15 ,  H01L31/0304 ,  H01L31/18 ,  H01S5/026

Abstract: A method of forming a III-V optoelectronic device 115 and a Si CMOS device on a single chip may include forming a silicon substrate in both a first and second region 101, 103 of a single chip; forming a germanium layer 106 above the substrate in at least the first region; forming the optoelectronic device 115 on the germanium layer in the first region, and forming the silicon device 112 on a silicon layer in the second region 103. The optoelectronic device includes a bottom cladding layer 116, an active region 118 which is adjacent a waveguide 114 and a top cladding layer 117, each layer formed consecutively upon the germanium layer. In one embodiment, a semiconductor layer (206; Fig. 10) is formed on the substrate in first and second regions; a first insulator layer (204; Fig. 10) is formed over the semiconductor layer; a waveguide (214; Fig. 10) is formed over the first insulator layer; and a second insulator layer (208; Fig. 10) is formed over the waveguide. Semiconductor devices (212) are formed upon a base layer (210) over the second insulating layer and the waveguide in the second region, and an optoelectronic device (215; Fig. 10) is formed on the semiconductor layer (206; Fig. 10) in the first region.

公开(公告)号：GB2608320A

公开(公告)日：2022-12-28

申请号：GB202213458

申请日：2021-02-17

Applicant: IBM

Inventor： NING LI ,  WANKI KIM ,  STEPHEN BEDELL ,  DEVENDRA SADANA

IPC: G11C11/00 ,  G11C7/00

Abstract: An apparatus includes an analog phase change memory array, including an array of cells addressable and accessible through first lines and second lines. The apparatus includes device(s) coupled to one or more of the first lines. The device(s) is/are able to be coupled to or decoupled from the one or more first lines to compensate for phase change memory resistance drift in resistance of at least one of the cells in the one or more first lines. The apparatus may also include control circuitry configured to send, using the first lines and second lines, a same set pulse through the device(s) to multiple individual phase change memory resistors in the phase change memory array sequentially once every period.

公开(公告)号：GB2581902B

公开(公告)日：2022-04-20

申请号：GB202006963

申请日：2018-11-16

Applicant: IBM

Inventor： NING LI ,  YUN SEOG LEE ,  JOEL PEREIRA DE SOUZA ,  DEVENDRA SADANA

IPC: H01L29/78 ,  G11C11/54 ,  H01M10/0585

Abstract: A semiconductor structure is provided that contains a non-volatile battery which controls gate bias and has increased output voltage retention and voltage resolution. The semiconductor structure may include a semiconductor substrate including at least one channel region that is positioned between source/drain regions. A gate dielectric material is located on the channel region of the semiconductor substrate. A battery stack is located on the gate dielectric material. The battery stack includes, a cathode current collector located on the gate dielectric material, a cathode material located on the cathode current collector, a first ion diffusion barrier material located on the cathode material, an electrolyte located on the first ion diffusion barrier material, a second ion diffusion barrier material located on the electrolyte, an anode region located on the second ion diffusion barrier material, and an anode current collector located on the anode region.

公开(公告)号：GB2581902A

公开(公告)日：2020-09-02

申请号：GB202006963

申请日：2018-11-16

Applicant: IBM

Inventor： NING LI ,  YUN SEOG LEE ,  JOEL PEREIRA DE SOUZA ,  DEVENDRA SADANA

IPC: H01L21/822

Abstract: A semiconductor structure is provided that contains a non-volatile battery which controls gate bias and has increased output voltage retention and voltage resolution. The semiconductor structure may include a semiconductor substrate including at least one channel region that is positioned between source/drain regions. A gate dielectric material is located on the channel region of the semiconductor substrate. A battery stack is located on the gate dielectric material. The battery stack includes, a cathode current collector located on the gate dielectric material, a cathode material located on the cathode current collector, a first ion diffusion barrier material located on the cathode material, an electrolyte located on the first ion diffusion barrier material, a second ion diffusion barrier material located on the electrolyte, an anode region located on the second ion diffusion barrier material, and an anode current collector located on the anode region.

公开(公告)号：GB2581742A

公开(公告)日：2020-08-26

申请号：GB202007216

申请日：2018-11-02

Applicant: IBM

Inventor： HARIKLIA DELIGIANNI ,  NING LI ,  KO-TAO LEE ,  DEVENDRA SADANA ,  ROY YU

IPC: A61B5/00

Abstract: Technical solutions are described for implementing an optogenetics treatment using a probe and probe controller are described. A probe controller controls a probe to perform the method that includes emitting, by a light source of the probe, the probe is embeddable in a tissue, a light wave to interact with a corresponding chemical in one or more cells in the tissue. The method further includes capturing, by a sensor of the probe, a spectroscopy of the light wave interacting with the corresponding chemical. The method further includes sending, by the probe, the spectroscopy to an analysis system. The method further includes receiving, by the probe, from the analysis system, adjusted parameters for the light source, and adjusting, by a controller of the probe, settings of the light source according to the received adjusted parameters to emit a different light wave to interact with the corresponding chemical.

公开(公告)号：GB2581114A

公开(公告)日：2020-08-05

申请号：GB202008788

申请日：2018-11-26

Applicant: IBM

Inventor： QING CAO ,  JIANSHI TANG ,  NING LI

IPC: H01L27/146

Abstract: A vertically integrated multispectral imaging sensor includes a first metal contact layer on a substrate, an SiO2 layer on the first metal contact layer with a first detector element embedded in a hole therein, a first graphene layer that covers the first detector element, a second metal contact layer on the SiO2 layer on one side of the first graphene, an AlO3 layer on the SiO2 layer, in which a second detector element is embedded in a hole over the first graphene layer, a second graphene layer on the second detector element, and a third metal contact layer on the AlO3 layer adjacent to the second graphene layer. The first detector material is sensitive to a different wavelength band of the electromagnetic spectrum than the second detector material.

公开(公告)号：GB2538348B

公开(公告)日：2019-06-05

申请号：GB201604084

申请日：2016-03-10

Applicant: IBM

Inventor： JIN CAI ,  NING LI ,  JEAN-OLIVIER PLOUCHART ,  DEVENDRA SADANA ,  TAK HUNG NING ,  EFFENDI LEOBANDUNG

IPC: H01S5/026 ,  G02B6/42 ,  G02B6/43 ,  H01L27/15

Abstract: After forming a first trench extending through a top semiconductor layer and a buried insulator layer and into a handle substrate of a semiconductor-on-insulator (SOI) substrate, a dielectric waveguide material stack including a lower dielectric cladding layer, a core layer and an upper dielectric cladding layer is formed within the first trench. Next, at least one lateral bipolar junction transistor (BJT), which can be a PNP BJT, an NPN BJT or a pair of complementary PNP BJT and NPN BJT, is formed in a remaining portion of the top semiconductor layer. After forming a second trench extending through the dielectric waveguide material stack to re-expose a portion of a bottom surface of the first trench, a laser diode is formed in the second trench.

公开(公告)号：GB2538594B

公开(公告)日：2017-11-22

申请号：GB201604088

申请日：2016-03-10

Applicant: IBM

Inventor： NING LI ,  DEVENDRA SADANA ,  EFFENDI LEOBANDUNG

IPC: H01L27/144 ,  B82Y20/00 ,  G02B6/12 ,  G02B6/13 ,  H01L21/70 ,  H01L21/84 ,  H01L25/16 ,  H01L27/04 ,  H01L27/092 ,  H01L27/15 ,  H01L31/0304 ,  H01L31/18 ,  H01S5/02 ,  H01S5/026

Abstract: A single chip including an optoelectronic device on the semiconductor layer in a first region, the optoelectronic device comprises a bottom cladding layer, an active region, and a top cladding layer, wherein the bottom cladding layer is above and in direct contact with the semiconductor layer, the active region is above and in direct contact with the bottom cladding layer, and the top cladding layer is above and in direct contact with the active region, a silicon device on the substrate extension layer in a second region, a device insulator layer substantially covering both the optoelectronic device in the first region and the silicon device in the second region, and a waveguide embedded within the device insulator layer in direct contact with a sidewall of the active region of the optoelectronic device.

公开(公告)号：GB2545562A

公开(公告)日：2017-06-21

申请号：GB201620231

申请日：2016-11-29

Applicant: IBM

Inventor： WILLIAM THOMAS SPRATT ,  NING LI ,  DEVENDRA SADANA

IPC: G01N21/64

Abstract: A fluorescence detection system and method of use are disclosed. The system includes a light source 110 which emits excitation light; a sample unit 130 in which a sample is disposed; a first optical fiber 120 adapted to connect the light source to the sample unit; an avalanche photodiode array detector 140 which receives fluorescent light generated by the sample when the sample is irradiated with the excitation light; and a second optical fiber 150 adapted to connect the sample unit to the avalanche photodiode array detector (APD). The second optical fiber has a numerical aperture of equal to or greater than about 0.15 and is positioned such that its longitudinal axis is orthogonal to a longitudinal axis of the first optical fiber. A computer system including a processor and memory may also be included to receive and store sample information. The processor may select a photon-counting mode or a linear photomultiplier mode of operation for the detector. The sample unit may be a static unit, such as a cuvette, or a dynamic unit, such as a microfluidic channel.