公开(公告)号：DE112018006053T5

公开(公告)日：2020-08-13

申请号：DE112018006053

申请日：2018-11-09

Applicant: IBM

Inventor： ROSENBLATT SAMI ,  ORCUTT JASON ,  SANDBERG MARTIN ,  BRINK MARKUS ,  ADIGA VIVEKANANDA ,  BRONN NICHOLAS TORLEIV

IPC: H01L39/02 ,  G06N10/00

Abstract: Eine Quantenbit(Qubit)-Flip-Chip-Baugruppe wird gebildet, wenn ein Qubit auf einem ersten Chip gebildet wird und ein optisch durchlässiger Weg auf einem zweiten Chip gebildet wird. Die beiden Chips werden unter Verwendung von Lothöckern gebondet. Der optisch durchlässige Weg sorgt für einen optischen Zugang zu dem Qubit auf dem ersten Chip.

公开(公告)号：SG11202110210PA

公开(公告)日：2021-10-28

申请号：SG11202110210P

申请日：2020-05-13

Applicant: IBM

Inventor： LEWANDOWSKI ERIC ,  WEBB BUCKNELL ,  HERTZBERG JARED ,  SANDBERG MARTIN ,  JINKA OBLESH

IPC: H01L23/44

Abstract: A thermalization structure is formed using a foil and a low temperature device (LTD). The foil includes a first layer of a first material. The LTD includes a surface from which heat is transferred away from the LTD. A coupling is formed between the foil and the surface of the LTD, where the coupling includes a bond formed between the foil and the surface such that forming the bond forms a set of ridges in the foil, a ridge in the set of ridges operating to dissipate the heat.

公开(公告)号：AU2020271227A1

公开(公告)日：2021-10-14

申请号：AU2020271227

申请日：2020-04-06

Applicant: IBM

Inventor： ADIGA VIVEKANANDA ,  SANDBERG MARTIN ,  CHOW JERRY ,  PAIK HANHEE

IPC: H01L27/18 ,  G06N10/00 ,  H01L39/22 ,  H01L39/24

Abstract: A qubit includes a substrate, and a first capacitor structure having a lower portion formed on a surface of the substrate and at least one first raised portion extending above the surface of the substrate. The qubit further includes a second capacitor structure having a lower portion formed on the surface of the substrate and at least one second raised portion extending above the surface of the substrate. The first capacitor structure and the second capacitor structure are formed of a superconducting material. The qubit further includes a junction between the first capacitor structure and the second capacitor structure. The junction is disposed at a predetermined distance from the surface of the substrate and has a first end in contact with the first raised portion and a second end in contact with the second raised portion.

公开(公告)号：AU2020263787A1

公开(公告)日：2021-09-30

申请号：AU2020263787

申请日：2020-03-27

Applicant: IBM

Inventor： SANDBERG MARTIN ,  ROSENBLATT SAMI ,  TOPALOGLU RASIT ONUR

IPC: G06N10/00 ,  H01L27/18 ,  H01L39/12 ,  H03K19/195

Abstract: A tunable qubit device includes a tunable qubit, the tunable qubit including a superconducting quantum interference device (SQUID) loop. The tunable qubit device further includes a superconducting loop inductively coupled to the SQUID loop, and a flux bias line inductively coupled to the superconducting loop. The superconducting loop includes a superconducting material having a critical temperature that is a lower temperature than a critical temperature of any superconducting material of the tunable qubit. In operation, the superconducting loop provides a persistent bias to the tunable qubit.

公开(公告)号：CA3137258A1

公开(公告)日：2020-10-29

申请号：CA3137258

申请日：2020-03-27

Applicant: IBM

Inventor： SANDBERG MARTIN ,  ROSENBLATT SAMI ,  TOPALOGLU RASIT ONUR

IPC: H01L27/18 ,  H01L39/12 ,  H03K19/195

Abstract: A tunable qubit device includes a tunable qubit, the tunable qubit including a superconducting quantum interference device (SQUID) loop. The tunable qubit device further includes a superconducting loop inductively coupled to the SQUID loop, and a flux bias line inductively coupled to the superconducting loop. The superconducting loop includes a superconducting material having a critical temperature that is a lower temperature than a critical temperature of any superconducting material of the tunable qubit. In operation, the superconducting loop provides a persistent bias to the tunable qubit.

公开(公告)号：DE112017007898T5

公开(公告)日：2020-05-14

申请号：DE112017007898

申请日：2017-12-21

Applicant: IBM

Inventor： SANDBERG MARTIN ,  MICKAY DAVID ,  GUMANN PATRYK ,  PAIK HANHEE ,  GAMBETTA JAY

IPC: G06N99/00 ,  H01L23/485

Abstract: Ausführungsformen der vorliegenden Erfindung offenbaren ein Computersystem mit einer Mehrzahl in einer ebenenähnlichen zweidimensionalen Struktur angeordneter Quantenschaltkreise, wobei die Quantenschaltkreise Qubits und Busse (d.h. Qubit-Qubit-Verbindungen) aufweisen, und ein Verfahren zu dessen Bildung. Ein Quantencomputer-System weist eine Mehrzahl in einem zweidimensionalen Muster angeordneter Quantenschaltkreise auf. Mindestens ein innerer Quantenschaltkreis, der nicht entlang des Umfanges der zweidimensionalen Ebene der Mehrzahl Quantenschaltkreise angeordnet ist, enthält einen unteren Chip, eine Einheitenschicht, einen oberen Chip und eine Weiterleitungsschicht. Eine Signalleitung verbindet die Einheitenschicht mit der Weiterleitungsschicht, wobei die Signalleitung die zweidimensionale Ebene verlässt, zum Beispiel erstreckt sich die Signalleitung in eine andere Ebene.

公开(公告)号：AU2021215331A1

公开(公告)日：2022-07-07

申请号：AU2021215331

申请日：2021-02-03

Applicant: IBM

Inventor： AFZALI-ARDAKANI ALI ,  HAIGHT RICHARD ,  SANDBERG MARTIN ,  ADIGA VIVEKANANDA

IPC: H01L39/24 ,  B82Y10/00 ,  G06N10/00 ,  H01L27/18

Abstract: Devices, methods, and/or computer-implemented methods that can facilitate formation of a self assembled monolayer on a quantum device are provided. According to an embodiment, a device can comprise a qubit formed on a substrate. The device can further comprise a self assembled monolayer formed on the qubit.

公开(公告)号：AU2020384654A1

公开(公告)日：2022-05-12

申请号：AU2020384654

申请日：2020-11-10

Applicant: IBM

Inventor： ADIGA VIVEKANANDA ,  WYMORE BENJAMIN ,  FOGEL KEITH ,  SANDBERG MARTIN

IPC: H01L39/24 ,  G06N10/00 ,  H01L27/18 ,  H01L39/02 ,  H01L39/22

Abstract: A method of making a Josephson junction for a superconducting qubit includes providing a substructure (500) having a surface with first and second trenches (306 and 308) perpendicular to each other defined therein. The method further includes evaporating a first superconducting material (700) to deposit the first superconducting material and evaporating a second superconducting material (701) to deposit the second superconducting material in the first trench to provide a first lead (710), and forming an oxidized layer (800) on the first and second superconducting materials. The method includes evaporating a third superconducting material (900) at an angle substantially perpendicular to the surface (502) of the substructure to deposit the third superconducting material in the second trench without rotating the substructure to form a second lead (910). A vertical Josephson junction is formed at the intersection of the first and second trenches electrically connected through the first lead and through the second lead.

公开(公告)号：AU2020381947A1

公开(公告)日：2022-04-28

申请号：AU2020381947

申请日：2020-11-10

Applicant: IBM

Inventor： HAIGHT RICHARD ,  AFZALI-ARDAKANI ALI ,  ADIGA VIVEKANANDA ,  SANDBERG MARTIN ,  PAIK HANHEE

IPC: H01L27/18 ,  H01L39/24

Abstract: Techniques regarding encapsulating one or more superconducting devices of a quantum processor (100) are provided. For example, one or more embodiments described herein can regard a method that can comprise depositing an adhesion layer (402) onto a superconducting resonator (102) and a silicon substrate (104) that are comprised within a quantum processor. The superconducting resonator can be positioned on the silicon substrate. Also, the adhesion layer can comprise a chemical compound having a thiol functional group.

公开(公告)号：SG11202109827WA

公开(公告)日：2021-10-28

申请号：SG11202109827W

申请日：2020-03-25

Applicant: IBM

Inventor： SANDBERG MARTIN ,  ADIGA VIVEKANANDA ,  TOPALOGLU RASIT

IPC: H01L27/18 ,  B82Y10/00 ,  G06N10/00 ,  H01L39/22 ,  H01L39/24

Abstract: A fluxonium qubit includes a superinductor. The superinductor includes a substrate, and a first vertical stack extending in a vertical direction from a surface of the substrate. The first vertical stack includes a first Josephson junction and a second Josephson junction connected in series along the vertical direction. The superinductor includes a second vertical stack extending in a vertical direction from a surface of the substrate. The second vertical stack includes a third Josephson junction. The superinductor includes a superconducting connector connecting the first and second vertical stacks in series such that the first, second, and third Josephson junctions are connected in series. The fluxonium qubit further includes a shunted Josephson junction connected to the superinductor with superconducting wires such that the first, second, and third Josephson junctions of the superinductor that are in series are connected in parallel with the shunted Josephson junction.