12.
    发明专利
    未知

    公开(公告)号:DE19937742A1

    公开(公告)日:2001-03-15

    申请号:DE19937742

    申请日:1999-08-10

    Abstract: A pattern with small, densely packed structures is transferred from a structure carrier to an object. At least two partial patterns of less densely packed structure contents are produced from the densely packed structures in that those structures which are arranged close beside one another in the pattern on the structure carrier are assigned to various partial patterns if possible and separated from one another as a result. The partial patterns are then transferred to the object with a time offset and the structures are combined again as a result. This achieves a reduction in the structure density during the optical imaging process, so that the influence of disruptive structure interference on the imaging is reduced and thus denser structures can be imaged at the same wavelength.

    13.
    发明专利
    未知

    公开(公告)号:DE19937742B4

    公开(公告)日:2008-04-10

    申请号:DE19937742

    申请日:1999-08-10

    Abstract: A pattern with small, densely packed structures is transferred from a structure carrier to an object. At least two partial patterns of less densely packed structure contents are produced from the densely packed structures in that those structures which are arranged close beside one another in the pattern on the structure carrier are assigned to various partial patterns if possible and separated from one another as a result. The partial patterns are then transferred to the object with a time offset and the structures are combined again as a result. This achieves a reduction in the structure density during the optical imaging process, so that the influence of disruptive structure interference on the imaging is reduced and thus denser structures can be imaged at the same wavelength.

    15.
    发明专利
    未知

    公开(公告)号:DE102004010902B4

    公开(公告)日:2007-01-11

    申请号:DE102004010902

    申请日:2004-03-05

    Abstract: A mask level layout has an arrangement of lines and spaces with the spaces interconnected by a further space. The spaces are alternately acted upon with a phase deviation with respect to the spaces, where a phase edge between spaces acted upon differently arises in the region of the further space. Alternatively, the connecting space within the layout may be filled with dark regions. An additional space is inserted in a second layout representing a further mask of the same mask set. The additional space enables formation of an insulating region on a semiconductor substrate at the location where formation of a continuous isolation trench is not possible due to the phase edges or dark regions within originally connecting spaces of the first mask. The first mask can be embodied as a hybrid mask with structures according to the principle of alternating phase masks with a large process window.

    17.
    发明专利
    未知

    公开(公告)号:DE102004010902A1

    公开(公告)日:2005-09-22

    申请号:DE102004010902

    申请日:2004-03-05

    Abstract: A mask level layout has an arrangement of lines and spaces with the spaces interconnected by a further space. The spaces are alternately acted upon with a phase deviation with respect to the spaces, where a phase edge between spaces acted upon differently arises in the region of the further space. Alternatively, the connecting space within the layout may be filled with dark regions. An additional space is inserted in a second layout representing a further mask of the same mask set. The additional space enables formation of an insulating region on a semiconductor substrate at the location where formation of a continuous isolation trench is not possible due to the phase edges or dark regions within originally connecting spaces of the first mask. The first mask can be embodied as a hybrid mask with structures according to the principle of alternating phase masks with a large process window.

Patent Agency Ranking