Lithography mask and method for forming lithography mask
    1.
    发明专利
    Lithography mask and method for forming lithography mask 审中-公开
    LITHOGRAPHY掩模和形成LITHOGRAPHY MASK的方法

    公开(公告)号:JP2006243737A

    公开(公告)日:2006-09-14

    申请号:JP2006057844

    申请日:2006-03-03

    CPC classification number: G03F1/29 G03F1/32 G03F1/38

    Abstract: PROBLEM TO BE SOLVED: To provide a lithography mask capable of forming an aperture of an interval smaller and larger than the critical interval simultaneously in a sure manner, and a manufacturing method thereof. SOLUTION: The lithography mask comprises first regions 50, 52, 54, and 56 having a non-transparent layer, and semi-transparent second regions and third regions 60, 62, 64, 66, 70, 72, 74 and 76 which are different in optical thickness. In order to form through holes 34 and 36 whose interval is smaller than the critical interval, a first section 44 having the second regions 62 and 64, and the third regions 72 and 74 is provided. The second regions and the third regions are disposed alternately and are surrounded by the first region 50. In order to form through holes 32 and 38 whose interval is larger than the critical interval, second sections 42 and 46 having the third regions 70 and 76 are provided. The third regions are surrounded by the second regions 60 and 66 which are surrounded by the first regions 50 joined at multiple positions. COPYRIGHT: (C)2006,JPO&NCIPI

    Abstract translation: 要解决的问题:提供一种能够以可靠的方式同时形成间隔小于临界间隔的间隔的光刻掩模及其制造方法。 光刻掩模包括具有不透明层的第一区域50,52,54和56以及半透明第二区域和第三区域60,62,64,66,70,72,74和76 其光学厚度不同。 为了形成间隔小于临界区间的通孔34和36,提供了具有第二区域62和64以及第三区域72和74的第一区段44。 第二区域和第三区域交替设置并被第一区域50围绕。为了形成间隔大于临界区间的通孔32和38,具有第三区域70和76的第二区段42和46是 提供。 第三区域由被连接在多个位置的第一区域50包围的第二区域60和66围绕。 版权所有(C)2006,JPO&NCIPI

    METHOD FOR DETERMINING THE STRUCTURE OF A MASK FOR MICROSTRUCTURING SEMICONDUCTOR SUBSTRATES BY MEANS OF PHOTOLITHOGRAPHY
    2.
    发明申请
    METHOD FOR DETERMINING THE STRUCTURE OF A MASK FOR MICROSTRUCTURING SEMICONDUCTOR SUBSTRATES BY MEANS OF PHOTOLITHOGRAPHY 审中-公开
    通过光刻法确定用于微结构化半导体衬底的掩模的构造的方法

    公开(公告)号:WO2004006015A3

    公开(公告)日:2004-05-27

    申请号:PCT/DE0302160

    申请日:2003-06-30

    CPC classification number: G03F1/36

    Abstract: The invention relates to a method to be carried out on a computer, whereby first design data relating to a semiconductor substrate is read in, and a mask image in the form of a data structure having contact holes and auxiliary structures is produced on the computer system, on the basis of said data. Contact hole biases are determined using an optical proximity correction method and the contact holes concerned are corrected on the basis of said contact hole biases. By subsequently simulating the reproduction of the mask image on the semiconductor substrate, auxiliary structures formed in an undesired manner and contact holes deviating from specified tolerances are detected and corrected on the semiconductor substrate. A mask bias is used during the simulation of the reproduction of the mask image in order to compensate three-dimensional mask effects. A real mask can be produced on the basis of the mask image determined in this way.

    Abstract translation: 其中,为了在半导体衬底的一个计算机系统的过程的设计数据进行首先被读取并在此基础上在与接触孔和辅助结构的计算机系统上的数据结构的形式来生成掩模图像。 之后,通过光学近似校正方法确定接触孔前进,并且基于这些接触孔前进来校正各个接触孔。 随后对半导体衬底上的掩模图像进行成像模拟,检测并校正偏离半导体衬底上的指定公差的不期望的成像辅助结构和接触孔。 在掩模图像的映射模拟中,使用掩模掩模来补偿三维掩模效应。 基于如此确定的掩模图像,真实的掩模是可制造的。

    PHASE SHIFTING MASK
    3.
    发明申请
    PHASE SHIFTING MASK 审中-公开
    相SLIDE MASK

    公开(公告)号:WO03054627A2

    公开(公告)日:2003-07-03

    申请号:PCT/DE0204321

    申请日:2002-11-25

    CPC classification number: G03F1/30

    Abstract: The invention relates to a phase shifting mask (8) having symmetrical structures (1, 2) for the production of adjacent pairs (5) of structures (1', 2') on a semiconductor wafer (9), such as pairs of trench capacitors for memory modules, the structures (1, 2) inside the pair having a phase deviation difference of 180 DEG in relation to each other. The dimensions of the structures at the limit of resolution of the lighting system enable the influence of lens aberrations on the difference in line width created between the right and the left to be reduced. The invention also relates to a method for producing the structures (1', 2') on the wafer (9), consisting of a step in which the phase attribution to the right structure (2) or left structure (1) is selected according to the sign of the difference in line width when said difference is measured without phase attribution, using the same lighting system.

    Abstract translation: 在一个相位罩(8)具有对称结构(1,2)用于制备接近半导体晶片(9),在结构上的相互对置的对(5)(1”,2' ),诸如对于具有结构的存储器器件严重电容器对(1,2) 该对对180°的彼此Phasenhubunterschied内。 当躺在由透镜像差的影响的曝光系统结构的尺寸的分辨率极限降低到所得到的左右线宽差。 一种用于结构的晶片(9)的制备(1”,2' )的过程包括选择(2)或左结构(1),这取决于线的符号宽度差的权利,相位指定的demn步骤的使用时 没有相位分配相同的成像系统被测量。

    4.
    发明专利
    未知

    公开(公告)号:DE10340611B4

    公开(公告)日:2007-08-23

    申请号:DE10340611

    申请日:2003-08-29

    Abstract: Lithographic mask contains angular structure element (0) formed by two opaque segments (01,2). Structure element contains convex section (A) facing over obtuse angle (alpha). Adjacent to angular element is transparent structure (T), consisting of two transparent segments (T1,2), formed axis-symmetrically to angle (alpha) bisecting line (WH). Along this line in convex section, transparent structure is wider than standard width. Lithographic mask contains angular structure element (0) formed by two opaque segments (01,2). Structure element contains convex section (A) facing over obtuse angle (alpha). Adjacent to angular element is transparent structure (T).Transparent structure is formed in two parts, i.e. consisting of two different transparent segments (T1,2), formed axis-symmetrically to angle (alpha) bisecting line (WH). Along this line in convex section, transparent structure is wider than used standard width of transparent segments.

    5.
    发明专利
    未知

    公开(公告)号:DE10310136B4

    公开(公告)日:2007-05-03

    申请号:DE10310136

    申请日:2003-03-07

    Abstract: Structure patterns mutually correlated on masks are projected onto the same photosensitive layer (R) on semiconductor wafer (W) in projection system. The first mask (P) contains opaque structure element (25) on first position so that its position projection onto wafer forms not-exposed region of lacquer in photo-sensitive layer. There is at least one second mask (T), allocated to first mask, with semi-transparent region (23') on second position of second mask, coinciding with first position on first mask, whose image on wafer illuminates at least part of lacquer region in photo-sensitive layer. Independent claims are included for method of producing set of several masks.

    8.
    发明专利
    未知

    公开(公告)号:DE10335565A1

    公开(公告)日:2005-05-19

    申请号:DE10335565

    申请日:2003-07-31

    Abstract: The invention, which relates to a method for checking periodic structures on lithography masks, in which an image of the structure of the lithography mask is generated by an imaging optic of a microscope, provides a method for inspecting structures on lithography masks which is used to represent deviations in the periodic structure of a lithography mask, a better demarcation of the periodic structure from a deviation being achieved. The parameters of wavelength lambda, the numerical aperture NA and the coherence of the illumination sigma of the imaging optic of the microscope are chosen such that the inequality P lambda NA ⁡ ( 1 + sigma ) describing the resolution limit for a periodic structure having the period P is fulfilled, and in that the image of the structure that is generated in this way is evaluated for deviations in the periodic structure.

    9.
    发明专利
    未知

    公开(公告)号:DE10258371B4

    公开(公告)日:2004-12-16

    申请号:DE10258371

    申请日:2002-12-12

    Abstract: Method for inspection of periodic structures on a lithography mask using a microscope with adjustable illumination and a drive for 2D movement of a mechanical stage on which the mask is placed under control of a computer. Position, size and pitch specification of the mask are stored by means of a first image calibration of each array structure of selected locations on the lithography mask, calculation of Fourier coefficients and calculation of a difference image to generate a defect indicating display.

    10.
    发明专利
    未知

    公开(公告)号:DE10230532A1

    公开(公告)日:2004-01-29

    申请号:DE10230532

    申请日:2002-07-05

    Abstract: In the method, which is to be carried out on a computer system, firstly design data of a semiconductor substrate are read in and, on the basis thereof, a mask image is generated in the form of a data structure with contact holes and with auxiliary structures on the computer system. Afterwards, contact hole biases are determined by means of an optical proximity correction method and the relevant contact holes are corrected on the basis of these contact hole biases. By means of subsequent imaging simulation of the mask image on the semiconductor substrate, undesired imaging auxiliary structures and contact holes deviating from specified tolerances on the semiconductor substrate are detected and corrected. During the imaging simulation of the mask image, a mask bias is employed in order to compensate for three-dimensional mask effects. A real mask can be produced on the basis of the mask image thus determined.

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