公开(公告)号：EP4246554A1

公开(公告)日：2023-09-20

申请号：EP23161718.4

申请日：2023-03-14

Applicant: STMicroelectronics S.r.l.

Inventor： RASCUNA', Simone ,  ROCCAFORTE, Fabrizio ,  BELLOCCHI, Gabriele ,  VIVONA, Marilena

IPC: H01L21/20 ,  H01L29/04 ,  H01L29/872 ,  H01L21/02 ,  H01L29/06 ,  H01L29/16

Abstract: Method for manufacturing an electronic device (50; 80), comprising the steps of: forming, at a front side (2a) of a solid body (3, 2) of 4H-SiC having a first electrical conductivity (N), at least one implanted region (9') having a second electrical conductivity (P) opposite to the first electrical conductivity (N); forming, on the front side (2a), a 3C-SiC layer (52); and forming, in the 3C-SiC layer (52), an ohmic contact region (54; 84) which extends through the entire thickness of the 3C-SiC layer (52), up to reaching the implanted region (9'). A Silicon layer (56) may be present on the 3C-SiC layer; in this case, the ohmic contact also extends through the Silicon layer.

公开(公告)号：EP3940792A1

公开(公告)日：2022-01-19

申请号：EP21185675.2

申请日：2021-07-14

Applicant: STMicroelectronics S.r.l.

Inventor： RASCUNA', Simone

IPC: H01L29/872 ,  H01L29/06 ,  H01L29/36 ,  H01L29/16 ,  H01L21/329 ,  H01L29/20

Abstract: The vertical-conduction electronic power device (50) is formed by a body (55) of wide band gap semiconductor which has a first conductivity type and has a surface (55A), and is formed by a drift region (59) of the first conductivity type and by a plurality of surface portions (59A, 59B) delimited by the surface. The electronic device is further formed by a plurality of first implanted regions (62) having a second conductivity type, which extend into the drift region from the surface, and by a plurality of first and second metal portions (215A, 216A), which are arranged on the surface. The first metal portions are in Schottky contact with first surface portions and the second metal portions are in Schottky contact with second surface portions so as to form first and second Schottky diodes (201, 202), wherein the first Schottky diodes have, at equilibrium, a lower Schottky barrier than the second Schottky diodes. The second metal portions are of a different material than the first metal portions. The first surface portions have a higher doping level than the second surface portions and are arranged at a smaller distance from a first implanted region than the second surface portions.

公开(公告)号：EP3496153A1

公开(公告)日：2019-06-12

申请号：EP18206678.7

申请日：2018-11-16

Applicant: STMicroelectronics S.r.l.

Inventor： ZANETTI, Edoardo ,  RASCUNA', Simone ,  SAGGIO, Mario Giuseppe ,  GUARNERA, Alfio ,  FRAGAPANE, Leonardo ,  TRINGALI, Cristina

IPC: H01L29/872 ,  H01L21/329 ,  H01L29/06 ,  H01L29/16 ,  H01L29/78

Abstract: A manufacturing method of an electronic device (50), comprising the steps of: forming a drift layer (32) of an N type; forming a trench (38) in the drift layer (32); forming an edge-termination structure (42) alongside the trench (38) by implanting dopant species of a P type; and forming a depression region between the trench (38) and the edge-termination structure (42) by digging the drift layer. The steps of forming the depression region and the trench are carried out at the same time. The step of forming the depression region comprises patterning the drift layer to form a structural connection (32c) with the edge-termination structure having a first slope, and the step of forming the trench comprises etching the drift layer to define side walls of the trench, which have a second slope steeper than the first slope.

公开(公告)号：EP3425676A1

公开(公告)日：2019-01-09

申请号：EP18181848.5

申请日：2018-07-05

Applicant: STMicroelectronics S.r.l.

Inventor： SAGGIO, Mario Giuseppe ,  RASCUNA', Simone

IPC: H01L29/78 ,  H01L21/336 ,  H01L29/872

Abstract: An integrated MOSFET device (20) formed in a body (22), of silicon carbide and with a first conductivity type. The body accommodates a first body region (23), with a second conductivity type; a JFET region (35) adjacent to the first body region (23); a first source region (24), with the first conductivity type, extending into the interior of the first body region; an implanted structure (40), with the second conductivity type, extending into the interior of the JFET region (35). An isolated gate structure (39) lies partially over the first body region (23), the first source region (24) and the JFET region (35). A first metallization layer (43) extends over the first surface (22A) and forms, in direct contact with the implanted structure (40) and with the JFET region (35), a JBS diode.

公开(公告)号：EP3136447A1

公开(公告)日：2017-03-01

申请号：EP16162000.0

申请日：2016-03-23

Applicant: STMicroelectronics S.r.l.

Inventor： SAGGIO, Mario Giuseppe ,  RASCUNA', Simone

IPC: H01L29/872 ,  H01L21/329 ,  H01L29/06 ,  H01L29/24 ,  H01L29/417 ,  H01L29/20

CPC classification number: H01L29/872 ,  H01L21/2253 ,  H01L21/76897 ,  H01L23/535 ,  H01L29/0623 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/417 ,  H01L29/6606 ,  H01L29/66143

Abstract: A switching device including: a body (2) of semiconductor material, which has a first conductivity type and is delimited by a front surface (S a ); a contact layer (12) of a first conductive material, which extends in contact with the front surface; and a plurality of buried regions (20), which have a second conductivity type and are arranged within the semiconductor body, at a distance from the contact layer.

Abstract translation: 一种开关装置，包括：具有第一导电类型并由前表面（S a）限定的半导体材料的主体（2）; 第一导电材料的接触层（12），其与前表面接触地延伸; 以及多个埋置区域（20），其具有第二导电类型并且布置在半导体主体内，距接触层一定距离处。

公开(公告)号：EP4322229A2

公开(公告)日：2024-02-14

申请号：EP23220528.6

申请日：2021-06-22

Applicant: STMicroelectronics S.r.l.

Inventor： RASCUNA', Simone ,  BELLOCCHI, Gabriele ,  BADALA', Paolo ,  CRUPI, Isodiana

IPC: H01L31/105

Abstract: A device (50) for detecting UV radiation, comprising: a SiC substrate (53) having an N doping; a SiC drift layer (52) having an N doping, which extends over the substrate (53); a cathode terminal; and an anode terminal. The anode terminal comprises: a doped anode region (59) having a P doping, which extends in the drift layer (52); and an ohmic-contact region (60) including one or more carbon-rich layers, in particular graphene and/or graphite layers, which extends in the doped anode region (59). The ohmic-contact region (60) is transparent to the UV radiation to be detected.

公开(公告)号：EP4246553A1

公开(公告)日：2023-09-20

申请号：EP23160409.1

申请日：2023-03-07

Applicant: STMicroelectronics S.r.l.

Inventor： BELLOCCHI, Gabriele ,  RASCUNA', Simone ,  BADALA', Paolo ,  BASSI, Anna

IPC: H01L21/20

Abstract: Process for manufacturing a 3C-SiC layer (4; 24), comprising the steps of: providing a wafer (1; 21) of 4H-SiC, provided with a surface (1a; 21a); heating, through a LASER beam (102), a selective portion of the wafer (1; 21) at least up to a melting temperature of the material of the selective portion; allowing the cooling and crystallization of the melted selective portion, thus forming the 3C-SiC layer (4; 24), a Silicon layer (6a; 26a) on the 3C-SiC layer and a carbon-rich layer (6b; 26b) above the Silicon layer (6a; 26a); completely removing the carbon-rich layer (6; 26) and the Silicon layer (6a; 26a), exposing the 3C-SiC layer (4; 24). If the Silicon layer (6a; 26a) is maintained on the 4H-SiC wafer, the process leads to the formation of a Silicon layer on the 4H-SiC wafer.
The 3C-SiC or Silicon layer thus formed may be used for the integration, even only partial, of electrical or electronic components.

公开(公告)号：EP4040507A1

公开(公告)日：2022-08-10

申请号：EP22152484.6

申请日：2022-01-20

Applicant: STMicroelectronics S.r.l.

Inventor： RASCUNA', Simone ,  BELLOCCHI, Gabriele ,  SANTORO, Marco

IPC: H01L29/872 ,  H01L29/06 ,  H01L29/16 ,  H01L21/329

Abstract: Junction Barrier Schottky device (50) comprising: a semiconductor body (68) of SiC with a first conductivity; an implanted region (59') with a second conductivity, extending into the semiconductor body (68) at a top surface (52a) of the semiconductor body (68), to form a junction barrier, JB, diode (59) with the semiconductor body (68); and an electrical terminal (58) in ohmic contact with the implanted region (59') and in direct electrical contact with the top surface (52a), laterally to the implanted region (59'), to form a Schottky diode (62) with the semiconductor body (68). The implanted region (59') is formed by a first (63') and a second portion (63") electrically connected directly to each other and aligned along an alignment axis (55) transverse to the top surface (52a). Orthogonally to the alignment axis (55), the first portion (63') has a first maximum width (d 1 ) and the second portion (63") has a second maximum width (d 2 ) greater than the first maximum width (d 1 ).

公开(公告)号：EP4040498A1

公开(公告)日：2022-08-10

申请号：EP22154844.9

申请日：2022-02-02

Applicant: STMicroelectronics S.r.l.

Inventor： RASCUNA', Simone ,  BELLOCCHI, Gabriele ,  ZANETTI, Edoardo ,  SAGGIO, Mario Giuseppe

IPC: H01L29/06 ,  H01L29/16 ,  H01L29/36 ,  H01L29/66 ,  H01L29/872

Abstract: The vertical conduction electronic device (50) is formed by a body (55) of wide-bandgap semiconductor material having a first conductivity type and a surface (55A), which defines a first direction (Y) and a second direction (X), wherein the body has a drift region (59, 59A, 59B). The electronic device is further formed by a plurality of superficial implanted regions (62) having a second conductivity type, which extend in the drift region from the surface and delimit between them, in the drift region, at least one superficial portion (68) facing the surface; by at least one deep implanted region (65) having the second conductivity type, which extends in the drift region, at a distance from the surface of the body; and by a metal region (80), which extends on the surface of the body, in Schottky contact with the superficial portion (68) of the drift region.

公开(公告)号：EP3945606A1

公开(公告)日：2022-02-02

申请号：EP21187913.5

申请日：2021-07-27

Applicant: STMicroelectronics S.r.l.

Inventor： RASCUNA', Simone ,  SAGGIO, Mario Giuseppe

IPC: H01L29/872 ,  H01L29/06 ,  H01L29/16 ,  H01L21/329

Abstract: Merged-PiN-Schottky, MPS, device (50) comprising: a substrate (53) of SiC with a first conductivity; a drift layer (52) of SiC with the first conductivity, on the substrate (53); an implanted region (59') with a second conductivity, extending at a top surface (52a) of the drift layer (52) to form a junction-barrier, JB, diode (59) with the substrate (53); and a first electrical terminal (58) in ohmic contact with the implanted region (59') and in direct contact with the top surface (52a) to form a Schottky diode (62) with the drift layer (52). The JB diode (59) and the Schottky diode (62) are alternated to each other along an axis (X): the JB diode (59) has a minimum width parallel to the axis (X) with a first value (d 1 ), and the Schottky diode (62) has a maximum width parallel to the axis (X) with a second value (d 2 ) smaller than, or equal to, the first value (d 1 ). A breakdown voltage of the MPS device is greater than, or equal to, 115% of a maximum working voltage of the MPS device in an inhibition state.