-
公开(公告)号：US09635757B1
公开(公告)日：2017-04-25
申请号：US15233972
申请日：2016-08-11
Applicant: Unimicron Technology Corp.
Inventor： Yin-Ju Chen , Chi-Min Chang , Cheng-Po Yu
CPC classification number: H05K1/0366 , H05K3/4673 , H05K2201/0278 , H05K2201/029 , H05K2203/0557
Abstract: A circuit board and a manufacturing method thereof are provided. The circuit board includes a dielectric substrate, a circuit pattern and a dielectric layer. The circuit pattern is disposed on the dielectric substrate. The dielectric layer is disposed on the dielectric substrate and covers the circuit pattern. The dielectric layer includes a dielectric matrix and a mesh-shaped fiber structure disposed in the dielectric matrix. There is no mesh-shaped fiber structure on a portion of the dielectric substrate exposed by the circuit pattern.
-
公开(公告)号：US12052815B2
公开(公告)日：2024-07-30
申请号：US18447265
申请日：2023-08-09
Applicant: Unimicron Technology Corp.
Inventor： Chih-Chiang Lu , Heng-Ming Nien , Ching-Sheng Chen , Ching Chang , Ming-Ting Chang , Chi-Min Chang , Shao-Chien Lee , Jun-Rui Huang , Shih-Lian Cheng
CPC classification number: H05K1/0222 , H05K1/113 , H05K1/119 , H05K3/429 , H05K3/462 , H05K1/181 , H05K3/0094 , H05K3/24 , H05K2201/10734
Abstract: Provided is a manufacturing method of circuit board, including a first substrate, a second substrate, a third substrate, a fourth substrate, multiple conductive structures, and a conductive via structure. The third substrate has an opening and includes a first dielectric layer. The opening penetrates the third substrate, and the first dielectric layer fills the opening. Multiple conductive structures are formed so that the first substrate, the second substrate, the third substrate, and the fourth substrate are electrically connected through the conductive structures to define a ground path. A conductive via structure is formed to penetrate the first substrate, the second substrate, the first dielectric layer of the third substrate, and the fourth substrate. The conductive via structure is electrically connected to the first substrate and the fourth substrate to define a signal path, and the ground path surrounds the signal path.
-
公开(公告)号：US11895772B2
公开(公告)日：2024-02-06
申请号：US17377280
申请日：2021-07-15
Applicant: Unimicron Technology Corp.
Inventor： Chi-Min Chang , Ching-Sheng Chen , Jun-Rui Huang , Wei-Yu Liao , Yi-Pin Lin
CPC classification number: H05K1/115 , H05K1/181 , H05K3/423 , H05K2201/09545
Abstract: An interlayer connective structure is suitable for being formed in a wiring board, in which the wiring board includes two traces and an insulation part between the traces. The insulation part has a through hole. The interlayer connective structure located in the through hole is connected to the traces. The interlayer connective structure includes a column and a pair of protuberant parts. The protuberant parts are located at two ends of the through hole respectively and connected to the column and the traces. The protuberant parts stick out from the outer surfaces of the traces respectively. Each of the protuberant parts has a convex curved surface, in which the distance between the convex curved surface and the axis of the through hole is less than the radius of the through hole.
-
公开(公告)号：US20230389172A1
公开(公告)日：2023-11-30
申请号：US18447265
申请日：2023-08-09
Applicant: Unimicron Technology Corp.
Inventor： Chih-Chiang Lu , Heng-Ming Nien , Ching-Sheng Chen , Ching Chang , Ming-Ting Chang , Chi-Min Chang , Shao-Chien Lee , Jun-Rui Huang , Shih-Lian Cheng
Abstract: Provided is a manufacturing method of circuit board, including a first substrate, a second substrate, a third substrate, a fourth substrate, multiple conductive structures, and a conductive via structure. The third substrate has an opening and includes a first dielectric layer. The opening penetrates the third substrate, and the first dielectric layer fills the opening. Multiple conductive structures are formed so that the first substrate, the second substrate, the third substrate, and the fourth substrate are electrically connected through the conductive structures to define a ground path. A conductive via structure is formed to penetrate the first substrate, the second substrate, the first dielectric layer of the third substrate, and the fourth substrate. The conductive via structure is electrically connected to the first substrate and the fourth substrate to define a signal path, and the ground path surrounds the signal path.
-
Patent Agency Ranking
公开(公告)号：US11785707B2
公开(公告)日：2023-10-10
申请号：US17496791
申请日：2021-10-08
Applicant: Unimicron Technology Corp.
Inventor： Chih-Chiang Lu , Heng-Ming Nien , Ching-Sheng Chen , Ching Chang , Ming-Ting Chang , Chi-Min Chang , Shao-Chien Lee , Jun-Rui Huang , Shih-Lian Cheng
CPC classification number: H05K1/0222 , H05K1/113 , H05K1/119 , H05K3/429 , H05K3/462 , H05K1/181 , H05K3/0094 , H05K3/24 , H05K2201/10734
Abstract: Provided is a circuit board, including a first substrate, a second substrate, a third substrate, a fourth substrate, multiple conductive structures, and a conductive via structure. The second substrate is disposed between the first substrate and the third substrate. The third substrate is disposed between the second substrate and the fourth substrate. The third substrate has an opening penetrating the third substrate and includes a first dielectric layer filling the opening. The conductive via structure penetrates the first substrate, the second substrate, the first dielectric layer of the third substrate, and the fourth substrate, and is electrically connected to the first substrate and the fourth substrate to define a signal path. The first substrate, the second substrate, the third substrate and the fourth substrate are electrically connected through the conductive structures to define a ground path, and the ground path surrounds the signal path.
-
公开(公告)号：US20230262890A1
公开(公告)日：2023-08-17
申请号：US17938977
申请日：2022-09-07
Applicant: Unimicron Technology Corp.
Inventor： Chih-Chiang Lu , Chi-Min Chang , Ming-Hao Wu , Yi-Pin Lin , Tung-Chang Lin , Jun-Rui Huang
CPC classification number: H05K1/115 , H05K1/0222 , H05K2201/0195 , H05K2201/09536 , H05K2201/09809
Abstract: A circuit board structure includes a substrate, a first build-up structure layer, first and second external circuit layers, at least one first conductive via, and second conductive vias. The first build-up structure layer is disposed on a first circuit layer of the substrate. The first external circuit layer is disposed on the first build-up structure layer. The second external circuit layer is disposed on a second circuit layer and a portion of a third dielectric layer of the substrate. The first conductive via is electrically connected to the first external circuit layer and the second external circuit layer to define a signal path. The second conductive vias surround the first conductive via, and the first external circuit layer, the second conductive vias, the first circuit layer, the outer conductive layer, and the second external circuit layer define a first ground path. The first ground path surrounds the signal path.
-
公开(公告)号：US10314179B2
公开(公告)日：2019-06-04
申请号：US16013956
申请日：2018-06-21
Applicant: Unimicron Technology Corp.
Inventor： Hung-Lin Chang , Ming-Hao Wu , Syun-Siao Chang , Cheng-Po Yu , Chi-Min Chang
IPC: H05K3/46
Abstract: A manufacturing method of a circuit board structure is described as follows. An inner circuit structure including a core layer having an upper and an opposite lower surface, a first patterned circuit layer disposed on the upper surface and a second patterned circuit layer disposed on the lower surface is provided. An insulating material layer is formed on a portion of the first patterned circuit layer. A laser resisting layer is formed on at least a portion of the insulating material layer. A release layer is adhered to the laser resisting layer. A build-up process is performed so as to laminate a first and a second build-up circuit structures on the first and the second patterned circuit layers, respectively. A laser ablation process is performed on the first build-up circuit structure so as to form a cavity at least exposing a portion of the upper surface of the core layer.
-
公开(公告)号：US20180302992A1
公开(公告)日：2018-10-18
申请号：US16013956
申请日：2018-06-21
Applicant: Unimicron Technology Corp.
Inventor： Hung-Lin Chang , Ming-Hao Wu , Syun-Siao Chang , Cheng-Po Yu , Chi-Min Chang
IPC: H05K3/46
CPC classification number: H05K3/4697 , H05K3/4644
Abstract: A manufacturing method of a circuit board structure is described as follows. An inner circuit structure including a core layer having an upper and an opposite lower surface, a first patterned circuit layer disposed on the upper surface and a second patterned circuit layer disposed on the lower surface is provided. An insulating material layer is formed on a portion of the first patterned circuit layer. A laser resisting layer is formed on at least a portion of the insulating material layer. A release layer is adhered to the laser resisting layer. A build-up process is performed so as to laminate a first and a second build-up circuit structures on the first and the second patterned circuit layers, respectively. A laser ablation process is performed on the first build-up circuit structure so as to form a cavity at least exposing a portion of the upper surface of the core layer.
-
公开(公告)号：US10051748B2
公开(公告)日：2018-08-14
申请号：US14997583
申请日：2016-01-18
Applicant: Unimicron Technology Corp.
Inventor： Hung-Lin Chang , Ming-Hao Wu , Syun-Siao Chang , Cheng-Po Yu , Chi-Min Chang
Abstract: A manufacturing method of a circuit board structure is described as follows. An inner circuit structure including a core layer having an upper and an opposite lower surface, a first patterned circuit layer disposed on the upper surface and a second patterned circuit layer disposed on the lower surface is provided. An insulating material layer is formed on a portion of the first patterned circuit layer. A laser resisting layer is formed on at least a portion of the insulating material layer. A release layer is adhered to the laser resisting layer. A build-up process is performed so as to laminate a first and a second build-up circuit structures on the first and the second patterned circuit layers, respectively. A laser ablation process is performed on the first build-up circuit structure so as to form a cavity at least exposing a portion of the upper surface of the core layer.
-
-
-
-
-
-
-
-
Search Results
19
records
(took 0.05 seconds)
