公开(公告)号：JPH09181295A

公开(公告)日：1997-07-11

申请号：JP28529096

申请日：1996-10-28

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： GIYUNOTSUKU KIMU ,  DONWAN ROU ,  SEUNUON PAEKU

IPC: H01L29/68 ,  H01L29/06 ,  H01L29/66 ,  H01L29/737 ,  H01L29/772 ,  H01L29/88

Abstract: PROBLEM TO BE SOLVED: To provide a device which can improve the performances of a switching device and a logic device by increasing the PVR. SOLUTION: In a resonant tunneling electronic device, a plurality of quantum barrier layers 2, 4, and 6 and quantum well layers 3 and 5 are alternately laminated upon another between an emitter 1 and collector 7 so that the height of each quantum barrier can gradually become higher and, at the same time, the width of each quantum well formed between each quantum barrier can gradually become narrower. In addition, when the quantum barriers and wells are formed so that their heights can become asymmetrical, the structures of the quantum barriers and wells can be adjusted and a tunneling current can be adjusted easily.

公开(公告)号：JPH09181083A

公开(公告)日：1997-07-11

申请号：JP21554296

申请日：1996-08-15

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： KIYUUHON RII ,  JINHIYOO RII ,  JIYONSUN RIYUU

IPC: H01L29/73 ,  H01L21/331 ,  H01L29/70 ,  H01L29/732

Abstract: PROBLEM TO BE SOLVED: To eliminate a step of defining a base electrode from a structure of an existing pillar type bipolar transistor to minimize a parasitic capacitance of the base electrode. SOLUTION: First and second pillars 100A and 100B formed within first and second trenches 62A and 62B are used as active and collector regions respectively, the trenches 62A and 62B are formed at their bottoms with impurity layers 63 of a second conduction type having a high concentration as collector layers. In the first pillar, a base layer 66 and an emitter layer 72 are sequentially formed. Further formed within the first trench 62A is a base contact electrode 68 which is connected to the base layer 66. Impurities of the second conduction type are implanted to form a collector contact electrode 65.

公开(公告)号：JPH09181020A

公开(公告)日：1997-07-11

申请号：JP16418196

申请日：1996-06-25

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： JIYONHIYO BAEKU ,  BUN RII ,  SONUU CHIYOI ,  JINHON RII

IPC: H01L21/302 ,  G01B11/06 ,  H01L21/3065

Abstract: PROBLEM TO BE SOLVED: To provide a method of real-time detection of completion of removal of oxide layer existing on the surface of a semiconductor device by the thermal etching process. SOLUTION: In the method of real-time detection of completion of separation of an oxide layer of the present invention, when an oxide layer on the substrate surface having a difference of refraction coefficient from a semiconductor substrate, reduction in thickness of the oxide layer allows a reflected signal of a laser beam to be a periodical signal and relative etching rate and completion of etching can be obtained by making use of the period of thin signal.

公开(公告)号：JPH09180995A

公开(公告)日：1997-07-11

申请号：JP30208196

申请日：1996-11-13

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： SANSUU CHIYOI ,  YONJIN JIEON ,  HAIBIN CHIYUN ,  JIYONHIYUN RII ,  HIYUNJIYON YUU

IPC: G03F1/22 ,  H01L21/027 ,  H01L21/30 ,  G03F1/16

Abstract: PROBLEM TO BE SOLVED: To obtain a product which satisfies all the required conditions of a mask by simultaneously using substance having no damage due to X-ray exposure at the site of an alignment window disposed with the mark and the site to become the X-ray exposure. SOLUTION: A first Si3 N4 thin film 42/poly-Si thin film 43/second Si3 N4 film 44 deposited on a silicon wafer are formed at a chip site 6. The site of an alignment window 5 is etched to the film 43, and formed only of the second film 44. At this time, the Si3 N4 thin film used for the window 5 has about 633nm of light permeability and about 80 or more. The window 5 is formed small to the minimum limit so that the supporting force of the permeable film is strong even if it is thin. Thus, the product which satisfies all the required conditions of the mask is obtained.

公开(公告)号：JPH09180723A

公开(公告)日：1997-07-11

申请号：JP33794396

申请日：1996-12-18

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： SUUNHO CHIYAN ,  KIIHO JIYAN ,  SEOONGU KAN

IPC: H01M10/05 ,  H01M4/505 ,  H01M4/58 ,  H01M4/02 ,  H01M10/40

Abstract: PROBLEM TO BE SOLVED: To provide lithium-manganese oxide having an excellent electrode characteristic, of which grain diameter is large and of which crystal characteristic is increased, by mixing the specified lithium compound and the manganese oxide together, and heat treating it at the specified temperature for the specified time. SOLUTION: One kind of lithium compound selected among LiOH, LiCO3 and LiNO3 and the manganese oxide are mixed together. This mixture is heated at 840-860 deg.C for 28-32 hours so as to manufacture the lithium-manganese compound for both electrodes material for a lithium secondary battery. As the manganese oxide, MnO2 to be manufactured by an electrochemical method and a chemical method is desirably used. A heat treatment process is repeated twice or more at need. The lithium compound at 10% or less is desirably added. Temperature lowering process after the heat treatment is desirably performed by lowering the temperature to the ordinary temperature through the quenching process. LiMn2 O4 is obtained as the lithium-manganese oxide.

公开(公告)号：JPH09179767A

公开(公告)日：1997-07-11

申请号：JP25002696

申请日：1996-09-20

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： SUN YAN PAKU ,  JIN SO RII ,  DE YAN FUA ,  YAN CHIYURU PAKU

IPC: G06F3/06 ,  G06F9/46 ,  G06F12/00 ,  G06F13/16

Abstract: PROBLEM TO BE SOLVED: To prevent the decline of the performance of the entire system by not obstructing the execution of a transaction for requesting access to another page. SOLUTION: In the case of finding a buffer, whether or not a desired butter is present is judged, and when the buffer for the page is absent in a buffer frame chain, a butter lock chain is inspected while holding the exclusive latch of a buffer hash anchor. Whether or not a desired page is present is judged by performing an inspection, and when information for the desired page is absent in the butter lock chain, it is indicated that the other transaction for requesting the pertinent page is absent at present and the transaction is allocated to the buffer. In order to make the request of the other transaction standby until an arithmetic operation for reading the page from a disk is completed, a butter lock entry for the pertinent page is newly constituted and registered in the buffer lock chain.

公开(公告)号：JPH09169600A

公开(公告)日：1997-06-30

申请号：JP20152296

申请日：1996-07-31

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： JIEJIN RII ,  HEGUUON RII ,  KIYUNSUU SUU ,  KIISUU NAMU

IPC: C01B21/06 ,  C30B29/38 ,  H01L21/203 ,  H01L21/205 ,  H01L21/318 ,  H01L33/32 ,  H01L33/00

公开(公告)号：JPH09162200A

公开(公告)日：1997-06-20

申请号：JP21379996

申请日：1996-08-13

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： CHIYANSEOOKU RII ,  MINGUN KIMU ,  JIYONRAMU RII ,  KUWANYUI PIYUN ,  HIYONMUU PAAKU

IPC: H01L29/00 ,  H01L21/338 ,  H01L29/772 ,  H01L29/812

Abstract: PROBLEM TO BE SOLVED: To predict the high frequency noise characteristic of the change in the drain current by representing the change in the characteristic only with a fixed noise temp. independent of the drain current and the gradient of the equivalent noise conductance to the drain current. SOLUTION: The level of an input end noise voltage source is represented with the noise temp. of a gate intrinsic resistance and that of an output end noise current source represented with the drain equivalent noise conductance. The noise temp. of the gate intrinsic resistance is given by parameters represented with the gradient of the noise temp. to the drain current and the equivalent noise given by parameters represented with the equivalent noise conductance at drain current zero and gradient of the equivalent noise conductance to the drain current.

公开(公告)号：JPH0971495A

公开(公告)日：1997-03-18

申请号：JP31889095

申请日：1995-12-07

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： HAKU SHIYOUKIYOU ,  RI BIYON

IPC: C23C16/44 ,  C23C16/455 ,  C30B25/14 ,  C30B29/40 ,  H01L21/205 ,  H01L21/285

公开(公告)号：JPH0962521A

公开(公告)日：1997-03-07

申请号：JP12571896

申请日：1996-05-21

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： SUUN YON PAAKU ,  JIN SUU RII ,  YON CHIYURU PAAKU

IPC: G06F15/16 ,  G06F9/46 ,  G06F9/52 ,  G06F15/00 ,  G06F15/177

Abstract: PROBLEM TO BE SOLVED: To provide latch structure and a managing method for the same with which the simultaneousness of user approach to a critical area is improved by practically providing a latch satisfying the conditions required for the critical area while simplifying the structure and the managing method. SOLUTION: Concerning latch acquiring processing in the latch managing method for supporting the critical area, this processing is provided with at least a first process (S101) for checking whether a user requests the opportunity of latch acquisition issued to a latch managing means in order to enter the critical area or not, second process (S102-S107) for registering the request of user by the latch managing means while occupying mutex by the user, third process (S107) for returning the mutex from the user, and fourth process (S108-S111) for enabling the user to acquire the latch.