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公开(公告)号：EP2146557B1
公开(公告)日：2012-05-16
申请号：EP09164411.2
申请日：2009-07-02
Applicant: Thales Holdings UK Plc
Inventor： Lawson, Graham , Loiselet, Emmanuel
IPC: H05K1/02
CPC classification number: H05K1/0222 , H01L2224/48091 , H01L2224/48227 , H01L2924/15311 , H01L2924/16152 , H05K3/4614 , H05K3/4623 , H05K2201/09236 , H05K2201/09481 , H05K2201/09536 , H05K2201/09609 , H05K2201/09618 , H01L2924/00014
Abstract: An hermetically sealed integrated microwave circuit comprising a coplanar waveguide on a PCB (3, 4) electrically connected on one major surface to an IC, and thermally and electrically connected to a BGA (5) on its opposite major surface, in which the PCB has at least first and second printed layers, a microwave signal path extends from a ball of the BGA through a through-hole in both printed layers to the coplanar wave guide, and plural ground paths extend from balls (51) of the BGA (5) through first through-holes in the first printed layer of the PCB and through second through-holes of the second printed layer of the PCB, the first and second through-holes being non-coincident, to allow for an hermetic seal across the PCB whilst introducing a predetermined impedance in the PCB between the signal and ground paths.
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212.发明公开Plated vias exit structure for printed circuit board 审中-公开AustrittsstrukturfürDurchkontaktierungslöchereiner Leiterplatte
公开(公告)号：EP1841298A3
公开(公告)日：2008-05-07
申请号：EP07110136.4
申请日：2005-02-14
Applicant: MOLEX INCORPORATED
Inventor： Regnier, Kent, E. , Brunker, David, L. , Ogbuokiri, Martin, U.
CPC classification number: H05K1/0251 , H01L2223/6627 , H01L2924/0002 , H01L2924/1903 , H05K1/0222 , H05K1/0245 , H05K1/115 , H05K3/429 , H05K2201/044 , H05K2201/09236 , H05K2201/09609 , H05K2201/09636 , H05K2201/09718 , H05K2201/10189 , H01L2924/00
Abstract: A circuit board (600) design is disclosed that is useful in high speed differential signal applications uses a circuit trace exit structure (620) and optionally a via arrangement. The circuit trace exit structure involves the exit portions (620) of the circuit traces (550) of the differential signal vias (609) to follow a path where the traces then meet with and join to the transmission line portions (552,612) of the conductive traces (550). In the via arrangement, sets of differential signal pair vias (551,609) and an associated ground (593a) are arranged adjacent to each other in a repeating pattern. The differential signal vias of each pair (591) are spaced closer to their associated ground via (593a) than the spacing between the adjacent differential signal pair associated ground (593b) so that differential signal vias exhibit a preference for electrically coupling to their associated ground vias.
Abstract translation: 公开了一种在高速差分信号应用中使用电路走线出口结构（620）和可选的通孔装置的电路板（600）设计。 电路走线出口结构涉及差分信号通孔（609）的电路迹线（550）的出口部分（620），以跟随路径，其中迹线然后与导体的传输线部分（552,612）相接并连接 痕迹（550）。 在通孔布置中，差分信号对通孔（551,609）和相关联的接地（593a）的组以重复图案彼此相邻布置。 每对（591）的差分信号通孔（593a）比相邻的差分信号对相关联的接地（593b）之间的间隔更靠近其相关联的接地，使得差分信号通孔表现出对它们的相关接地电耦合的偏好 孔。
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公开(公告)号：EP1841298A2
公开(公告)日：2007-10-03
申请号：EP07110136.4
申请日：2005-02-14
Applicant: MOLEX INCORPORATED
Inventor： Regnier, Kent, E. , Brunker, David, L. , Ogbuokiri, Martin, U.
CPC classification number: H05K1/0251 , H01L2223/6627 , H01L2924/0002 , H01L2924/1903 , H05K1/0222 , H05K1/0245 , H05K1/115 , H05K3/429 , H05K2201/044 , H05K2201/09236 , H05K2201/09609 , H05K2201/09636 , H05K2201/09718 , H05K2201/10189 , H01L2924/00
Abstract: A circuit board (600) design is disclosed that is useful in high speed differential signal applications uses a circuit trace exit structure (620) and optionally a via arrangement. The circuit trace exit structure involves the exit portions (620) of the circuit traces (550) of the differential signal vias (609) to follow a path where the traces then meet with and join to the transmission line portions (552,612) of the conductive traces (550). In the via arrangement, sets of differential signal pair vias (551,609) and an associated ground (593a) are arranged adjacent to each other in a repeating pattern. The differential signal vias of each pair (591) are spaced closer to their associated ground via (593a) than the spacing between the adjacent differential signal pair associated ground (593b) so that differential signal vias exhibit a preference for electrically coupling to their associated ground vias.
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214.发明公开Conductive sheet having conductive layer with improved adhesion and product including the same 审中-公开与改进的粘合性导电层导体箔和含有产物
公开(公告)号：EP1513382A3
公开(公告)日：2007-05-23
申请号：EP04021212.8
申请日：2004-09-07
Applicant: FCM Co., Ltd.
Inventor： Miura, Shigeki
CPC classification number: H01L21/4846 , H01L21/4864 , H05K3/108 , H05K3/381 , H05K3/388 , H05K3/423 , H05K3/426 , H05K2201/0154 , H05K2201/0355 , H05K2201/0394 , H05K2201/09509 , H05K2201/09563 , H05K2201/09609 , H05K2203/092 , Y10T29/49155 , Y10T29/49165 , Y10T428/24917
Abstract: A conductive sheet (1) according to the present invention includes: an insulating substrate (2) having at least one via hole (3), a ground conductive layer (5); and a top conductive layer (6), and characterized in that the via hole (3) is a fine pore penetrating through the insulating substrate (2), the ground conductive layer (5) is formed by a sputtering method or a vapor deposition method on all of a surface of the insulating substrate (2), the top conductive layer (6) is formed on all of or part of a surface of the ground conductive layer (5), and the via hole (3) is filled with the top conductive layer (6).
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公开(公告)号：EP1492396A3
公开(公告)日：2005-07-27
申请号：EP04017844.4
申请日：1999-07-08
Applicant: QUEEN MARY AND WESTFIELD COLLEGE
Inventor： Carter, Anthony Arthur , Gandi, Angelo , De Oliveira, Rui
IPC: H05K1/05
CPC classification number: H01L23/373 , H01L23/3732 , H01L23/3733 , H01L2924/0002 , H05K1/056 , H05K3/445 , H05K3/4644 , H05K2201/0323 , H05K2201/09609 , Y10S428/901 , Y10T428/12347 , Y10T428/30 , H01L2924/00
Abstract: A thermal management device 13 comprising anisotropic carbon 10 encapsulated in an encapsulating material 12 that improves the strength of the carbon. The encapsulating material may be polyimide or epoxy resin or acrylic or polyurethane or polyester 12 or any other suitable polymer.
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Patent Agency Ranking216.发明公开Conductive sheet having conductive layer with improved adhesion and product including the same 审中-公开与改进的粘合性导电层导体箔和含有产物
公开(公告)号：EP1513382A2
公开(公告)日：2005-03-09
申请号：EP04021212.8
申请日：2004-09-07
Applicant: FCM Co., Ltd.
Inventor： Miura, Shigeki
CPC classification number: H01L21/4846 , H01L21/4864 , H05K3/108 , H05K3/381 , H05K3/388 , H05K3/423 , H05K3/426 , H05K2201/0154 , H05K2201/0355 , H05K2201/0394 , H05K2201/09509 , H05K2201/09563 , H05K2201/09609 , H05K2203/092 , Y10T29/49155 , Y10T29/49165 , Y10T428/24917
Abstract: A conductive sheet (1) according to the present invention includes: an insulating substrate (2) having at least one via hole (3), a ground conductive layer (5); and a top conductive layer (6), and characterized in that the via hole (3) is a fine pore penetrating through the insulating substrate (2), the ground conductive layer (5) is formed by a sputtering method or a vapor deposition method on all of a surface of the insulating substrate (2), the top conductive layer (6) is formed on all of or part of a surface of the ground conductive layer (5), and the via hole (3) is filled with the top conductive layer (6).
Abstract translation: （1）。根据本发明的导电性片材包括：绝缘（2），具有通孔的至少一个（3），一个接地导电层（5）的底物; 和顶部导电层（6），并且在DASS特点通过孔模（3）是一细孔通过所述绝缘基板（2）中，接地导电层（5）通过溅射法或蒸镀法形成贯通 上的所有绝缘基板（2）中，顶部导电层的表面（6）形成于所有的接地导电层（5）的表面的或部分，和通孔（3）中填充有 顶部导电层（6）。
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公开(公告)号：EP1095545B1
公开(公告)日：2004-09-22
申请号：EP99931369.5
申请日：1999-07-08
Applicant: QUEEN MARY AND WESTFIELD COLLEGE
IPC: H05K1/05
CPC classification number: H01L23/373 , H01L23/3732 , H01L23/3733 , H01L2924/0002 , H05K1/056 , H05K3/445 , H05K3/4644 , H05K2201/0323 , H05K2201/09609 , Y10S428/901 , Y10T428/12347 , Y10T428/30 , H01L2924/00
Abstract: A thermal management device (13) comprising anisotropic carbon (10) encapsulated in an encapsulating material (12) that improves the strength of the carbon. The encapsulating material may be polyimide or epoxy resin or acrylic or polyurethane or polyester (12) or any other suitable polymer.
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公开(公告)号：EP1095545A1
公开(公告)日：2001-05-02
申请号：EP99931369.5
申请日：1999-07-08
IPC: H05K1/05
CPC classification number: H01L23/373 , H01L23/3732 , H01L23/3733 , H01L2924/0002 , H05K1/056 , H05K3/445 , H05K3/4644 , H05K2201/0323 , H05K2201/09609 , Y10S428/901 , Y10T428/12347 , Y10T428/30 , H01L2924/00
Abstract: A thermal management device (13) comprising anisotropic carbon (10) encapsulated in an encapsulating material (12) that improves the strength of the carbon. The encapsulating material may be polyimide or epoxy resin or acrylic or polyurethane or polyester (12) or any other suitable polymer.
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219.发明授权
公开(公告)号：EP0600051B1
公开(公告)日：1999-05-12
申请号：EP93909754.9
申请日：1993-06-09
Applicant: DYCONEX PATENTE AG
Inventor： SCHMIDT, Walter , MARTINELLI, Marco
CPC classification number: H05K3/4655 , H05K1/0287 , H05K1/0289 , H05K1/0393 , H05K1/05 , H05K1/115 , H05K3/0041 , H05K3/0061 , H05K3/0064 , H05K3/0097 , H05K3/386 , H05K3/4084 , H05K3/42 , H05K3/427 , H05K3/429 , H05K3/4635 , H05K3/4641 , H05K3/4652 , H05K2201/0195 , H05K2201/0355 , H05K2201/0394 , H05K2201/0397 , H05K2201/066 , H05K2201/0909 , H05K2201/09327 , H05K2201/09509 , H05K2201/09536 , H05K2201/09554 , H05K2201/09572 , H05K2201/09609 , H05K2201/09627 , H05K2201/09781 , H05K2201/09836 , H05K2201/09945 , H05K2201/10666 , H05K2203/0554 , H05K2203/0746 , H05K2203/1184 , H05K2203/1545 , H05K2203/1572 , Y10S428/901 , Y10T428/24917
Abstract: The initial intention in the semi-finished product of the invention is to provide a functional separation between the requirement for mechanical strength and the previously concomitant requirement, for completing a circuit, in order to bring the pure circuit connection, especially for signals, 'closer' to the electrical and technical properties of chips. To do this, the layout miniaturisation is optimised without regard for the mechanical strength of the substrate. Instead of a printed circuit board (MCM), a semi-finished product which can be developed into a printed circuit board is made. The semi-finished product of the invention consists of an extremely thin film (8) with a plurality of extremely small holes (14) made simultaneously by an etching process. The hole diameters can be reduced by almost an order of magnitude (down to 20 νm), facilitating, for instance, definite sub-100 νm technology. Such a semi-finished product (19) does not act as a mechanical support but is designed only for signal conduction. The semi-finished product (19) which carries the densely packed wiring pattern, is bonded to a not densely packed power supply plane (22) acting as the service plane and the printed circuit board thus made is finally secured to a mechanical support (20).
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公开(公告)号：EP0811245A1
公开(公告)日：1997-12-10
申请号：EP96936229.0
申请日：1996-09-27
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： PETERSON, Robert K. , PURINTON, Donald L. , MERRITT, Gordon D. , ABLES, Billy D.
CPC classification number: H01L25/0657 , H01L23/4922 , H01L23/49827 , H01L23/5385 , H01L24/01 , H01L2225/06513 , H01L2225/0652 , H01L2225/06527 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01039 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , H01L2924/15174 , H01L2924/3011 , H05K3/462 , H05K3/4623 , H05K2201/0116 , H05K2201/09536 , H05K2201/09609 , H05K2201/10378
Abstract: An assembly of two or more microelectronic parts, wherein electrical and/or thermal interconnection between the parts is achieved by means of multiple, discrete, conductive nanoscopic fibrils (15) or tubules (15) fixed within the pores of an insulating film (16). Such a film is said to have anisotropic electrical conductivity, i.e., Z-axis conductivity, with little or no conductivity in the other directions.
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