公开(公告)号：EP3005847A4

公开(公告)日：2017-03-01

申请号：EP14801666

申请日：2014-04-11

Applicant: NOKIA TECHNOLOGIES OY

Inventor： ALLEN MARK LEE ,  BOWER CHRIS ,  COTTON DARRYL

IPC: H05K3/10

CPC classification number: H05K1/0272 ,  H01L23/52 ,  H01L24/00 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/24101 ,  H01L2224/24226 ,  H01L2224/24997 ,  H01L2224/25171 ,  H01L2224/25175 ,  H01L2224/2919 ,  H01L2224/82101 ,  H01L2224/82138 ,  H01L2224/8284 ,  H01L2224/82862 ,  H01L2224/82874 ,  H01L2224/82877 ,  H01L2224/82986 ,  H01L2224/8385 ,  H01L2224/92144 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12043 ,  H05K1/092 ,  H05K1/097 ,  H05K3/101 ,  H05K3/107 ,  H05K2201/0257 ,  H05K2201/0302 ,  H05K2201/09036 ,  H05K2201/09227 ,  H05K2201/10674 ,  H05K2203/1469 ,  Y10T29/49117 ,  H01L2924/00014 ,  H01L2924/00

公开(公告)号：EP2726925B1

公开(公告)日：2016-06-15

申请号：EP12803948.4

申请日：2012-06-27

Applicant: Finisar Corporation

Inventor： ZHAO, Yan Yang ,  HUEBNER, Bernd ,  DU, Tengda ,  LEE, Yuheng

IPC: G02B6/38 ,  G02B6/46 ,  H05K1/02 ,  G02B6/42 ,  H05K1/11 ,  H05K1/14

CPC classification number: G02B6/4279 ,  G01J1/0425 ,  G02B6/4246 ,  G02B6/428 ,  G02B6/4292 ,  H05K1/0219 ,  H05K1/0224 ,  H05K1/0243 ,  H05K1/0274 ,  H05K1/0284 ,  H05K1/0298 ,  H05K1/115 ,  H05K1/117 ,  H05K1/147 ,  H05K2201/09227 ,  H05K2201/09409 ,  H05K2201/0949 ,  H05K2201/09618 ,  H05K2201/09672 ,  H05K2201/10121

Abstract: Multichannel RF Feedthroughs. In some examples, a multichannel RF feedthrough includes an internal portion and an external portion. The internal portion includes a top surface on which first and second sets of traces are formed. Each set of traces is configured as an electrical communication channel to carry electrical data signals. The external portion includes a bottom surface on which the first set of traces is formed and a top surface on which the second set of traces is formed. A set of vias connects the first set of traces between the top surface of the internal portion and the bottom surface of the external portion.

公开(公告)号：EP3002629A1

公开(公告)日：2016-04-06

申请号：EP15188246.1

申请日：2015-10-02

Applicant: LG Display Co., Ltd.

Inventor： HWANG, SoonJae ,  JEONG, Ilgi

IPC: G02F1/1345 ,  G02F1/1362 ,  H01L23/485 ,  H01L21/768 ,  H01L23/00

CPC classification number: H05K1/111 ,  G02F1/13458 ,  G02F1/136227 ,  G02F1/136286 ,  G02F2001/13629 ,  G02F2201/42 ,  H01L21/76804 ,  H01L21/76816 ,  H01L23/485 ,  H01L23/538 ,  H01L24/05 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L27/1244 ,  H01L27/3276 ,  H01L2224/04026 ,  H01L2224/05008 ,  H01L2224/05018 ,  H01L2224/05147 ,  H01L2224/0518 ,  H01L2224/05558 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/2929 ,  H01L2224/32145 ,  H01L2224/83203 ,  H01L2224/83365 ,  H01L2224/83851 ,  H05B33/06 ,  H05K1/0298 ,  H05K1/115 ,  H05K3/361 ,  H05K3/4007 ,  H05K2201/09227 ,  H05K2201/10128 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: Disclosed is a display device, comprising a plurality of signal lines arranged in a display area of a substrate and a pad structure located at a non-active area and connected with the signal lines, wherein the pad structure comprises two or more metal layers and an insulating layer located between the metal layers and having one or more contact hole which makes two metal layers among the metal layers contacted with each other, and the contact holes respectively located in the insulating layers are not overlapped with each other.

Abstract translation: 公开了一种显示装置，包括布置在基板的显示区域中的多条信号线和布置在非有源区域并与信号线连接的焊盘结构，其中焊盘结构包括两个或更多个金属层和 绝缘层位于金属层之间并具有一个或多个接触孔，该接触孔使金属层中的两个金属层彼此接触，并且分别位于绝缘层中的接触孔彼此不重叠。

公开(公告)号：EP2833704A4

公开(公告)日：2016-01-06

申请号：EP13769962

申请日：2013-03-27

Applicant: FUJIKURA LTD

Inventor： MATSUMARU KOHEI

IPC: H05K1/02

CPC classification number: H01P3/026 ,  H05K1/0245 ,  H05K1/0248 ,  H05K1/025 ,  H05K1/0271 ,  H05K1/0274 ,  H05K2201/09227 ,  H05K2201/09727 ,  H05K2201/09736 ,  H05K2201/09827 ,  H05K2201/09845 ,  H05K2201/10121

Abstract: A wiring board including: a board; a differential transmission line which is constituted by two wirings disposed on the board in parallel; an insulation resin layer which is formed on part of a face of the board, wherein a stepped portion constituted by a lateral face of the insulation resin layer is formed at a boundary between the face of the board and a top face of the insulation resin layer, the two wirings extend from the face of the board to the top face of the insulation resin layer so as to traverse the stepped portion, and the extending direction of the wirings traversing the stepped portion and the direction of a periphery are perpendicular to each other in a plan view of the board, the periphery being defined by a boundary between the top face of the insulation resin layer and the lateral face of the insulation resin layer constituting the stepped portion.

公开(公告)号：EP2952073A1

公开(公告)日：2015-12-09

申请号：EP14746098.4

申请日：2014-01-28

Applicant: FCI Asia Pte. Ltd.

Inventor： MINICH, Steven E. ,  GRAY, Mark R.

IPC: H05K1/14 ,  H01R12/73

CPC classification number: H05K1/141 ,  H01R12/724 ,  H01R12/735 ,  H01R13/6587 ,  H05K1/0245 ,  H05K1/0298 ,  H05K1/116 ,  H05K1/14 ,  H05K3/306 ,  H05K2201/044 ,  H05K2201/09227 ,  H05K2201/09409 ,  H05K2201/09709 ,  H05K2201/09718 ,  H05K2201/10189 ,  H05K2201/10295 ,  Y10T29/49165

Abstract: In accordance with the various embodiments disclosed herein, electrical connector footprints, such as printed circuit boards, is described comprising one or more of signal traces that each include a first section that extends parallel to the linear array direction and a second section extends in a direction that is different than the linear array direction.

Abstract translation: 根据本文公开的各种实施例，描述了诸如印刷电路板的电连接器封面，其包括一个或多个信号迹线，每个信号迹线包括平行于线性阵列方向延伸的第一部分，并且第二部分沿着方向 这与线性阵列方向不同。

公开(公告)号：EP2808890A4

公开(公告)日：2015-08-19

申请号：EP12866538

申请日：2012-01-27

Applicant: PANASONIC CORP

Inventor： ITO YOSHINOBU ,  OOSUMI HIDEO

IPC: H01L23/50 ,  H05K1/11

CPC classification number: H05K1/0216 ,  H01L23/49827 ,  H01L23/50 ,  H01L2924/0002 ,  H05K1/0243 ,  H05K1/113 ,  H05K1/114 ,  H05K1/18 ,  H05K2201/09227 ,  H01L2924/00

公开(公告)号：EP2764545A1

公开(公告)日：2014-08-13

申请号：EP12775582.5

申请日：2012-10-02

Applicant: Invensas Corporation

Inventor： CRISP, Richard, Dewitt ,  ZOHNI, Wael ,  HABA, Belgacem ,  LAMBRECHT, Frank

IPC: H01L25/065 ,  H01L23/13 ,  G11C5/02 ,  G11C5/04 ,  G11C5/06

CPC classification number: G11C5/04 ,  G11C5/02 ,  G11C5/063 ,  G11C5/066 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/24 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/02375 ,  H01L2224/02379 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05569 ,  H01L2224/0557 ,  H01L2224/06155 ,  H01L2224/06156 ,  H01L2224/06165 ,  H01L2224/06179 ,  H01L2224/06181 ,  H01L2224/06515 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/24145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48471 ,  H01L2224/49113 ,  H01L2224/49175 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06558 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/06575 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/10161 ,  H01L2924/1434 ,  H01L2924/1435 ,  H01L2924/1436 ,  H01L2924/1438 ,  H01L2924/15172 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3011 ,  H05K1/181 ,  H05K2201/09227 ,  H05K2201/10159 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A microelectronic package (100) can include a plurality of vertically stacked semiconductor chips 632, 637, the front face of at least one chip facing away from a first substrate surface (108), one or more columns (138, 143) of contacts (132) extending in a first direction (142) along surface (108). Columns (104A, 107B, 109A, 109B) of terminals (105 107) exposed at a second substrate surface (110) extend in the first direction. First terminals (105) disposed in a central region (112) of surface (110) which has width (152) not more than three and one-half times a minimum pitch (150) of the columns of terminals can be configured to carry address information usable to determine an addressable memory location. An axial plane of the at least one semiconductor chip can intersect the central region.

公开(公告)号：EP2644964A1

公开(公告)日：2013-10-02

申请号：EP13158703.2

申请日：2013-03-12

Applicant: Toshiba Lighting & Technology Corporation

Inventor： Kashiwagi, Takahito ,  Takahashi, Yoshiko ,  Oyaizu, Tsuyoshi ,  Kawashima, Seiko ,  Nishimura, Kiyoshi

IPC: F21K99/00 ,  F21Y105/00 ,  F21Y113/00 ,  F21Y101/02

CPC classification number: H05B33/0866 ,  F21K9/232 ,  F21V23/0457 ,  F21Y2105/12 ,  F21Y2105/18 ,  F21Y2113/13 ,  F21Y2115/10 ,  H01L2224/48137 ,  H05B33/0869 ,  H05K1/0201 ,  H05K2201/09227 ,  H05K2201/10106

Abstract: A first LED group including a plurality of LEDs (2a) is regularly arranged in a toric shape on the circumference of a center of an approximately rectangular substrate (1) which is formed of ceramics. In addition, the first LED group including the plurality of LEDs (2a) is entirely covered in a toric shape with a sealing member (3a). In addition, a second LED group including a plurality of LEDs (4a) is regularly arranged in a grid shape in the vicinity of the center of the approximately rectangular substrate (1). In addition, the LED group including the plurality of LEDs (4a) is entirely covered with a sealing member (5a). In addition, the sealing member (5a) entirely covers the inside of the toric portion of a first region.

Abstract translation: 包括多个LED（2a）的第一LED组在由陶瓷形成的大致矩形的基板（1）的中心的圆周上被规则地布置成复曲面形状。 此外，包括多个LED（2a）的第一LED组整体被覆盖为具有密封构件（3a）的复曲面形状。 此外，包括多个LED（4a）的第二LED组在大致矩形的基板（1）的中心附近规则地排列成格子状。 此外，包括多个LED（4a）的LED组整体被密封构件（5a）覆盖。 此外，密封构件（5a）完全覆盖第一区域的复曲面部分的内部。

公开(公告)号：EP1812967B1

公开(公告)日：2012-02-29

申请号：EP05811110.5

申请日：2005-11-17

Applicant: Alcatel Lucent

Inventor： BROWN, Paul

IPC: H01L23/498 ,  H05K1/11

CPC classification number: H01L23/49827 ,  H01L23/49838 ,  H01L2924/0002 ,  H05K1/114 ,  H05K2201/09227 ,  H05K2201/094 ,  H05K2201/09418 ,  H05K2201/10734 ,  H01L2924/00

Abstract: Enlarged spacing is provided between rows of vias in a ball grid array (BGA) multilayered printed wiring board land pattern in which the lands in the pattern are connected to the vias by a link connector by rotating, elongating, and/or truncating selected consecutive link connectors and rotating their respective corresponding vias in a row or column or selected consecutive rows or columns to achieve the enlarged spacing between rows or columns of vias in the BGA land pattern. Enhanced spacing between selected grid columns or rows of vias is provided such that some of the grid pitches for the vias are equal to that of the standard BGA and at least some are of a greater grid pitch.

公开(公告)号：EP1850381A3

公开(公告)日：2010-08-18

申请号：EP07008530.3

申请日：2007-04-26

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Kunimoto, Yuji ,  Kajiki, Atsunori

IPC: H01L23/485 ,  H05K1/11 ,  H01L23/498

CPC classification number: H05K1/111 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L2924/0002 ,  H05K3/3452 ,  H05K2201/09227 ,  H05K2201/094 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2924/00

Abstract: There is provided a mounting substrate on which a semiconductor chip is mounted using a flip chip bonding, having a plurality of connection pads (103) which are connected to the semiconductor chip, and an insulation layer (102) formed in such a manner as to cover the connection pads partially, wherein the insulation layer includes a first insulation layer (102B) which is formed in such a manner as to correspond to a center of the semiconductor chip and a second insulation layer (102A) which is formed in such a manner as to surround the first insulation layer, and wherein the plurality of connection pads include first connection pads which are partially covered by the first insulation layer and second connection pads which are partially covered by the second insulation layer.