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221.发明申请Method for filling high aspect ratio via holes in electronic substrates and the resulting holes 失效用于通过电子基板中的孔填充高纵横比的方法和由此产生的孔公开(公告)号：US20010027842A1
公开(公告)日：2001-10-11
申请号：US09871555
申请日：2001-05-31
Applicant: International Business Machines Corporation
Inventor： Brian E. Curcio , Peter Alfred Gruber , Frederic Maurer , Konstantinos I. Papathomas , Mark David Poliks
IPC: B32B031/00
CPC classification number: H05K3/4069 , H01L21/486 , H01L23/49827 , H01L23/49833 , H01L2924/0002 , H05K3/0094 , H05K3/246 , H05K3/4602 , H05K2201/0305 , H05K2201/0347 , H05K2201/09509 , H05K2201/09536 , H05K2201/0959 , H05K2201/096 , H05K2201/09827 , H05K2201/09863 , H05K2203/0126 , H05K2203/085 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165 , Y10T29/53191 , H01L2924/00
Abstract: High aspect ratio (5:1-30:1) and small (5 nullm-125 nullm) diameter holes in a dielectric substrate are provided, which are filled with a solidified conductive material, as well as a method of filling such holes using pressure and vacuum. In certain embodiments, the holes are lined with conductive material and/or capped with a conductive material. The invention also contemplates a chip carrier formed by such material.
Abstract translation: 提供介电基片中的高纵横比（5：1-30：1）和小（5毫米-125毫米）直径的孔，填充有凝固的导电材料，以及使用压力填充这些孔的方法 和真空。 在某些实施例中，孔用导电材料衬里和/或用导电材料封盖。 本发明还考虑由这种材料形成的芯片载体。
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公开(公告)号：US6005198A
公开(公告)日：1999-12-21
申请号：US946297
申请日：1997-10-07
Applicant: George D. Gregoire
Inventor： George D. Gregoire
IPC: H01R12/55 , H05K1/09 , H05K1/11 , H05K3/00 , H05K3/06 , H05K3/10 , H05K3/12 , H05K3/40 , H05K3/46 , H01R9/09
CPC classification number: H05K3/005 , H05K1/115 , H05K3/107 , H05K3/4652 , H05K1/095 , H05K1/112 , H05K2201/0394 , H05K2201/09036 , H05K2201/09472 , H05K2201/09509 , H05K2201/0959 , H05K2201/096 , H05K2201/09863 , H05K2201/09981 , H05K2203/0108 , H05K2203/025 , H05K2203/041 , H05K2203/0746 , H05K2203/095 , H05K2203/1189 , H05K2203/1572 , H05K3/0014 , H05K3/061 , H05K3/1241 , H05K3/4069 , H05K3/4614 , H05K3/4617 , H05K3/465 , Y10T29/49126 , Y10T29/49158 , Y10T29/49165 , Y10T29/49167
Abstract: A wiring board construction includes at least one microvia disposed in a base substrate and includes a deep imprinted cup shaped recess in the top surface thereof. A conductor material is disposed within the recess, and has a portion disposed at the bottom thereof. A conductor disposed at a bottom surface of the substrate opposite to the conductor material bottom portion helps to complete an electrically conductor path through the substrate to help complete an electrically conductive path through the substrate.
Abstract translation: 布线板结构包括设置在基底基板中的至少一个微孔，并且在其顶表面中包括深刻刻的杯形凹部。 导体材料设置在凹部内，并且具有设置在其底部的部分。 设置在与导体材料底部相对的基板的底表面处的导体有助于完成穿过基板的导电路径，以帮助完成穿过基板的导电路径。
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公开(公告)号：US5451722A
公开(公告)日：1995-09-19
申请号：US317326
申请日：1994-10-04
Applicant: George D. Gregoire
Inventor： George D. Gregoire
IPC: B29C33/38 , B29C33/42 , B29C33/56 , H05K1/00 , H05K1/11 , H05K3/00 , H05K3/02 , H05K3/06 , H05K3/10 , H05K3/20 , H05K3/38 , H05K1/02
CPC classification number: H05K1/111 , B29C33/3878 , B29C33/42 , B29C33/56 , H05K3/0014 , H05K3/205 , B29L2031/3425 , H05K1/0284 , H05K2201/09018 , H05K2201/09036 , H05K2201/09118 , H05K2201/09581 , H05K2201/09827 , H05K2201/09863 , H05K2201/09981 , H05K2203/0108 , H05K2203/0113 , H05K2203/0315 , H05K3/025 , H05K3/061 , H05K3/107 , H05K3/384 , H05K3/385 , Y02P70/611 , Y10S428/901 , Y10T29/49158 , Y10T29/49165 , Y10T428/24479 , Y10T428/24537 , Y10T428/2457 , Y10T428/24917
Abstract: A new and improved printed circuit board tool and method of making and using it, to produce three dimensional printed circuit boards having grooves with strongly bonded or laminated metallic pads therein. The printed circuit board tool includes a metallized male mold substrate having a plurality of groove forming projections disposed in the substrate surface. The method of making the metallized mold includes forming a female parent or predecessor master tool that may be used to produce a large number of the metallized male molds for producing new and improved three-dimensional printed circuit boards. The new and improved three-dimensional printed circuit board includes a substrate composed of a high heat deflective plastic, and a plurality of recesses or grooves molded into the substrate surface for receiving therein the fine pitch, closely spaced-apart leads of an integrated circuit. A plurality of metallized sunken pads or lands are adhered or bonded within the grooves for establishing an electrical path within each groove.
Abstract translation: 一种新的改进的印刷电路板工具及其制造和使用方法，用于生产具有在其中具有强粘合或层压金属垫的凹槽的三维印刷电路板。 印刷电路板工具包括具有设置在基板表面中的多个凹槽形成突起的金属化阳模基板。 制造金属化模具的方法包括形成可用于生产大量用于生产新的和改进的三维印刷电路板的金属化阳模的母本或前驱主工具。 新型改进的三维印刷电路板包括由高热偏转塑料构成的基板和模制到基板表面中的多个凹槽或凹槽，用于在其中接收集成电路的细间距，紧密间隔的引线。 多个金属化的凹陷垫或焊盘粘合或粘合在凹槽内，以在每个凹槽内建立电路径。
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公开(公告)号：US5390412A
公开(公告)日：1995-02-21
申请号：US45366
申请日：1993-04-08
Applicant: George D. Gregoire
Inventor： George D. Gregoire
IPC: B29C33/38 , B29C33/42 , B29C33/56 , H05K1/00 , H05K1/11 , H05K3/00 , H05K3/02 , H05K3/06 , H05K3/10 , H05K3/20 , H05K3/38 , H01K3/22 , H01K3/10
CPC classification number: H05K1/111 , B29C33/3878 , B29C33/42 , B29C33/56 , H05K3/0014 , H05K3/205 , B29L2031/3425 , H05K1/0284 , H05K2201/09018 , H05K2201/09036 , H05K2201/09118 , H05K2201/09581 , H05K2201/09827 , H05K2201/09863 , H05K2201/09981 , H05K2203/0108 , H05K2203/0113 , H05K2203/0315 , H05K3/025 , H05K3/061 , H05K3/107 , H05K3/384 , H05K3/385 , Y02P70/611 , Y10S428/901 , Y10T29/49158 , Y10T29/49165 , Y10T428/24479 , Y10T428/24537 , Y10T428/2457 , Y10T428/24917
Abstract: A new and improved printed circuit board tool and method of making and using it, to produce three dimensional printed circuit boards having grooves with strongly bonded or laminated metallic pads therein. The printed circuit board tool includes a metallized male mold substrate having a plurality of groove forming projections disposed in the substrate surface. The method of making the metallized mold includes forming a female parent or predecessor master tool that may be used to produce a large number of the metallized male molds for producing new and improved three-dimensional printed circuit boards. The new and improved three-dimensional printed circuit board includes a substrate composed of a high heat deflective plastic, and a plurality of recesses or grooves molded into the substrate surface for receiving therein the fine pitch, closely spaced-apart leads of an integrated circuit. A plurality of metallized sunken pads or lands are adhered or bonded within the grooves for establishing an electrical path within each groove.
Abstract translation: 一种新的改进的印刷电路板工具及其制造和使用方法，用于生产具有在其中具有强粘合或层压金属垫的凹槽的三维印刷电路板。 印刷电路板工具包括具有设置在基板表面中的多个凹槽形成突起的金属化阳模基板。 制造金属化模具的方法包括形成可用于生产大量用于生产新的和改进的三维印刷电路板的金属化阳模的母本或前驱主工具。 新型改进的三维印刷电路板包括由高热偏转塑料构成的基板和模制到基板表面中的多个凹槽或凹槽，用于在其中接收集成电路的细间距，紧密间隔的引线。 多个金属化的凹陷垫或焊盘粘合或粘合在凹槽内，以在每个凹槽内建立电路径。
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公开(公告)号：JP2018010931A
公开(公告)日：2018-01-18
申请号：JP2016137740
申请日：2016-07-12
Applicant: 新光電気工業株式会社
Inventor： 酒井 豊明
CPC classification number: H01L23/49827 , H01L21/6835 , H01L23/13 , H01L23/498 , H01L23/49816 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/81 , H01L24/83 , H01L24/92 , H01L24/97 , H01L25/105 , H01L2221/68345 , H01L2221/68359 , H01L2224/13111 , H01L2224/13116 , H01L2224/13294 , H01L2224/133 , H01L2224/13311 , H01L2224/13316 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2224/81005 , H01L2224/81815 , H01L2224/83005 , H01L2224/83104 , H01L2224/92 , H01L2224/92125 , H01L2224/97 , H01L2924/15311 , H01L2924/181 , H05K1/112 , H05K1/115 , H05K1/116 , H05K1/186 , H05K3/007 , H05K3/4069 , H05K3/4617 , H05K2201/0376 , H05K2201/09736 , H05K2201/09745 , H05K2201/09854 , H05K2201/09863 , H05K2201/2072 , H01L2924/00014 , H01L2924/014 , H01L2924/01047 , H01L2924/01029 , H01L2224/81 , H01L2224/83 , H01L2221/68381 , H01L21/56 , H01L21/78
Abstract: 【課題】レジスト層の剥離不良が発生し難い構造の配線基板を提供する。 【解決手段】本配線基板は、絶縁層と、前記絶縁層の一方の面側に埋め込まれた配線層と、を有し、前記配線層は、第1の部分と、前記第1の部分よりも幅が広い第2の部分と、を備え、前記第1の部分は、前記第2の部分よりも層厚が薄く形成されており、前記第1の部分の一方の面及び前記第2の部分の一方の面は、前記絶縁層の一方の面から露出し、前記第2の部分の他方の面の一部は、前記絶縁層の他方の面側に開口する開口部内に露出している。 【選択図】図1
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Patent Agency Ranking
公开(公告)号：JP6142831B2
公开(公告)日：2017-06-07
申请号：JP2014065302
申请日：2014-03-27
Applicant: ソニー株式会社
Inventor： 渡辺 秋彦
CPC classification number: H05K1/116 , H01L21/486 , H01L23/49827 , H05K1/112 , H05K3/0094 , H05K3/3436 , H05K3/3447 , H05K3/3489 , H05K3/4007 , H05K3/42 , H01L2224/16227 , H01L2224/16238 , H01L2924/1531 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L33/48 , H05K1/0306 , H05K1/115 , H05K2201/09154 , H05K2201/0959 , H05K2201/09863 , H05K2201/10106 , H05K2201/10484 , H05K2203/1383 , H05K2203/1394 , Y02P70/613
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公开(公告)号：JP6068223B2
公开(公告)日：2017-01-25
申请号：JP2013065641
申请日：2013-03-27
Applicant: モレックス エルエルシー
CPC classification number: H01R12/523 , H01R12/79 , H05K1/117 , H05K3/365 , H05K3/368 , H05K2201/0367 , H05K2201/09163 , H05K2201/0919 , H05K2201/09863 , H05K2201/10303 , H05K2201/10386 , H05K3/326 , H05K3/403
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公开(公告)号：JP2014191952A
公开(公告)日：2014-10-06
申请号：JP2013065641
申请日：2013-03-27
Applicant: Molex Inc , モレックス インコーポレイテドMolex Incorporated
Inventor： NIITSU TOSHIHIRO , HAGA MOTOHISA
CPC classification number: H01R12/523 , H01R12/79 , H05K1/117 , H05K3/326 , H05K3/365 , H05K3/368 , H05K3/403 , H05K2201/0367 , H05K2201/09163 , H05K2201/0919 , H05K2201/09863 , H05K2201/10303 , H05K2201/10386
Abstract: PROBLEM TO BE SOLVED: To improve stability of contact by reducing influences caused by variance in dimension precision or strength of a multilayer substrate and/or preventing deformation of a multilayer substrate 2 while connecting a tabular cable to an intermediate layer of the multilayer substrate.SOLUTION: A connector for a multilayer substrate comprises: a substrate-side connection part 1 disposed within an insertion port 2a formed on a thick surface of the multilayer substrate 2; and a cable-side connection part 101 provided in a distal end portion of a tabular cable 3 and inserted into the insertion port 2a so as to be electrically connected with the substrate-side connection part 1 in an intermediate layer of the multilayer substrate 2. The substrate-side connection part 1 includes a columnar terminal 61 and the cable-side connection part 101 includes tabular terminals 151 and 161. The columnar terminal 61 is formed protrusively from the intermediate layer of the multilayer substrate 2 in a thickness direction. The tabular terminals 151 and 161 include elastic contact portions 155 and 165 which are elastically brought into contact width a side surface portion of the columnar terminal 61 in a width direction of the insertion port 2a in response to the insertion of the cable-side connection part 101 into the insertion port 2a.
Abstract translation: 要解决的问题：通过减少由多层基板的尺寸精度或强度的变化引起的影响和/或防止多层基板2在将板状电缆连接到多层基板的中间层的同时改变的接触稳定性。 用于多层基板的连接器包括：基板侧连接部分1，设置在形成在多层基板2的厚表面上的插入口2a内; 以及电缆侧连接部101，其设置在片状电缆3的前端部并且插入到插入口2a中，以与多层基板2的中间层中的基板侧连接部1电连接。 基板侧连接部1包括柱状端子61，电缆侧连接部101包括平板状端子151,161。柱状端子61从多层基板2的中间层沿厚度方向突出地形成。 平板端子151和161包括弹性接触部分155和165，弹性接触部分155和165响应于电缆侧连接部分的插入而在插入口2a的宽度方向上弹性地接触到柱状端子61的侧表面部分 101插入插入口2a。
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公开(公告)号：JP5331958B2
公开(公告)日：2013-10-30
申请号：JP2011248228
申请日：2011-11-14
Applicant: ルネサスエレクトロニクス株式会社
IPC: H01L23/12
CPC classification number: H01L23/49827 , H01L21/486 , H01L21/6835 , H01L23/49811 , H01L23/49822 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L2221/68345 , H01L2224/16225 , H01L2224/16235 , H01L2224/32057 , H01L2224/32225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/83385 , H01L2224/92125 , H01L2225/06517 , H01L2225/06524 , H01L2225/06541 , H01L2225/06572 , H01L2225/06586 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/09701 , H01L2924/10253 , H01L2924/12041 , H01L2924/14 , H01L2924/15183 , H01L2924/15311 , H01L2924/1532 , H01L2924/30107 , H01L2924/3011 , H01L2924/351 , H05K3/0055 , H05K3/20 , H05K3/421 , H05K3/4644 , H05K2201/09563 , H05K2201/09863 , H05K2203/0796 , H01L2924/00 , H01L2924/00012 , H01L2224/0401 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: A wiring board in which lower-layer wiring composed of a wiring body and an etching barrier layer is formed in a concave portion formed on one face of a board-insulating film, upper-layer wiring is formed on the other face of the board-insulating film, and the upper-layer wiring and the wiring body of the lower-layer wiring are connected to each other through a via hole formed in the board-insulating film. The via hole is barrel-shaped, bell-shaped, or bellows-shaped.
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公开(公告)号：JP5066192B2
公开(公告)日：2012-11-07
申请号：JP2009543892
申请日：2008-11-28
Applicant: 京セラ株式会社
CPC classification number: H05K1/115 , H01L21/486 , H01L23/49827 , H01L2224/16225 , H01L2224/16227 , H01L2924/00014 , H05K3/0035 , H05K3/0055 , H05K3/421 , H05K3/4673 , H05K2201/0195 , H05K2201/0209 , H05K2201/09845 , H05K2201/09863 , Y10T29/49165 , H01L2224/0401
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