公开(公告)号：JPWO2011058879A1

公开(公告)日：2013-03-28

申请号：JP2011540464

申请日：2010-10-27

Applicant: 日本電気株式会社

Inventor： 中島　嘉樹 ,  嘉樹 中島 ,  山道　新太郎 ,  新太郎 山道 ,  菊池　克 ,  克 菊池 ,  森　健太郎 ,  健太郎 森 ,  秀哉 村井 ,  秀哉 村井 ,  大輔 大島 ,  大輔 大島

IPC: H05K3/46 ,  H01L23/12

CPC classification number: H05K1/185 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/82 ,  H01L2224/2413 ,  H01L2224/24227 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10156 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/3011 ,  H05K1/0271 ,  H05K3/4602 ,  H05K2201/09609 ,  H05K2201/09618 ,  H05K2201/10674

Abstract: ビア密度、特に機能素子周辺の配線層間のビア密度を向上させることができる機能素子内蔵基板を提供する。機能素子1と、複数のビア4を有し、前記機能素子を埋設する第1の絶縁材料からなる補強層3と、を含む機能素子内蔵基板であって、前記機能素子1に近接対向するビアの少なくとも一つが前記機能素子1の側面と対向する側に平側面を有する変形ビア9である機能素子内蔵基板。

公开(公告)号：JP2013046036A

公开(公告)日：2013-03-04

申请号：JP2011185134

申请日：2011-08-26

Applicant: Shinko Electric Ind Co Ltd ,  新光電気工業株式会社

Inventor： HORIUCHI MICHIO ,  TOKUTAKE YASUE ,  MATSUDA YUICHI

IPC: H01L23/14 ,  H01L23/12 ,  H05K3/46

CPC classification number: H05K3/4608 ,  H05K1/0287 ,  H05K1/0306 ,  H05K3/002 ,  H05K3/4061 ,  H05K3/42 ,  H05K2201/09609

Abstract: PROBLEM TO BE SOLVED: To provide a substrate which is improved in mechanical strength as compared with conventional ones.SOLUTION: The substrate includes: a core layer provided with a plate-like body made of an aluminum oxide and a plurality of linear conductors penetrating the plate-like body in the thickness direction; and a silicon layer or a glass layer which is bonded to at least one of one surface side and the other surface side of the core layer via an adhesive layer.

Abstract translation: 要解决的问题：提供与常规的相比提高机械强度的基材。 解决方案：基板包括：芯层，其设置有由氧化铝制成的板状体和在厚度方向上贯穿板状体的多个线状导体; 以及通过粘合剂层与芯层的一个表面侧和另一个表面侧的至少一个结合的硅层或玻璃层。 版权所有（C）2013，JPO＆INPIT

公开(公告)号：JP2012215527A

公开(公告)日：2012-11-08

申请号：JP2011082161

申请日：2011-04-01

Applicant: Ngk Spark Plug Co Ltd ,  日本特殊陶業株式会社

Inventor： NOMURA YOSHITOSHI ,  SUZUKI KENJI ,  AKITA KAZUE

IPC: G01R1/073 ,  H01L21/66

CPC classification number: H05K1/0287 ,  G01R1/07342 ,  G01R3/00 ,  H05K1/0306 ,  H05K1/115 ,  H05K3/005 ,  H05K3/4061 ,  H05K3/429 ,  H05K2201/0949 ,  H05K2201/09609 ,  H05K2201/0979 ,  Y10T156/11

Abstract: PROBLEM TO BE SOLVED: To provide a ceramic substrate capable of reducing the manufacturing cost and shortening the manufacturing time, and to provide a method for manufacturing the same.SOLUTION: A method for manufacturing a ceramic substrate comprises: forming through-holes 35 more than front side pads (namely, the through-holes of a predetermined number more than that of via-holes 11 expected) in a predetermined place (a place corresponding to each mother ceramic substrate 47) of a large sized green sheet 33, using a single die; cutting at a first line L1 corresponding to the green sheet 31 of the mother ceramic substrate 47; sintering the green sheet 31 to manufacture the mother ceramic substrate 47; forming the front side pads 19, surface conductive layers 21, and back side pads 25 according to a specification; and cutting the mother ceramic substrate 47 at a third line L3 to complete a substrate 1 for an IC inspection device.

Abstract translation: 解决的问题：提供能够降低制造成本并缩短制造时间的陶瓷基板，并提供其制造方法。 ＆lt; P＆gt;解决方案：陶瓷基板的制造方法包括：在预定位置形成比前侧焊盘（即，预期的通孔数多于预定数量的通孔）的通孔35（ 使用单个模具的大尺寸生片33的每个母体陶瓷基板47对应的部位） 在与母体陶瓷基板47的生坯片31对应的第一线L1处切断; 烧结生片31以制造母陶瓷基片47; 根据规格形成前侧焊盘19，表面导电层21和背面焊盘25; 并且在第三线L3处切割母陶瓷基板47，以完成用于IC检查装置的基板1。 版权所有（C）2013，JPO＆INPIT

公开(公告)号：JP2007156490A

公开(公告)日：2007-06-21

申请号：JP2006329589

申请日：2006-12-06

Applicant: Toppoly Optoelectronics Corp ,  統寶光電股▲ふん▼有限公司

Inventor： LIU CHENG-HUNG

IPC: G02F1/13357 ,  F21V8/00 ,  F21V29/00

CPC classification number: F21V29/86 ,  F21K9/00 ,  F21V29/83 ,  G02B6/003 ,  G02B6/0083 ,  G02B6/0085 ,  G02F1/133603 ,  H05K1/0206 ,  H05K3/0061 ,  H05K2201/09481 ,  H05K2201/09563 ,  H05K2201/09609 ,  H05K2201/10106

Abstract: PROBLEM TO BE SOLVED: To provide heat dissipation for a display device that has an LEDs built therein.
SOLUTION: The image display system comprises a liquid crystal display module, and the liquid crystal display module comprises a backlight assembly, optically connected to the liquid crystal display module. The backlight assembly includes a circuit board, which has at least one hole through the circuit board between a first planar side and a second planar side and in which a heat conductor extends through the hole from the second side to the first side, and the LED disposed on a first side of the circuit board. Heat from the LED on the first side is dissipated to the second side of the circuit board by the heat conductor through the hole.
COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：为内置LED的显示装置提供散热。 解决方案：图像显示系统包括液晶显示模块，液晶显示模块包括光学连接到液晶显示模块的背光组件。 背光组件包括电路板，该电路板在第一平面侧和第二平面侧之间具有穿过电路板的至少一个孔，其中热导体从第二侧延伸穿过孔至第一侧，并且LED 设置在电路板的第一侧上。 来自第一侧的LED的热量通过导热板通过该孔被散发到电路板的第二面。 版权所有（C）2007，JPO＆INPIT

公开(公告)号：JPWO2004091268A1

公开(公告)日：2006-07-06

申请号：JP2005505292

申请日：2004-04-06

Applicant: イビデン株式会社

Inventor： 忍 加藤 ,  忍 加藤

IPC: H05K3/46 ,  H01L23/12 ,  H01L23/498 ,  H01L23/50 ,  H05K3/42

CPC classification number: H01L23/50 ,  H01L23/49822 ,  H01L23/49838 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01025 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/19106 ,  H01L2924/3011 ,  H05K1/0263 ,  H05K1/115 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4608 ,  H05K3/4641 ,  H05K2201/09309 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09609 ,  H01L2224/05599

Abstract: コア基板30のグランド用スルーホール36Eと電源用スルーホール36Pとが、格子状に配設され、X方向およびY方向での誘導起電力の打ち消しがなされる。これにより、相互インダクタンスを小さくし、高周波ICチップを実装したとしても誤作動やエラーなどが発生することなく、電気特性や信頼性を向上させることができる。

公开(公告)号：JP2005129649A

公开(公告)日：2005-05-19

申请号：JP2003362155

申请日：2003-10-22

Applicant: Shinko Electric Ind Co Ltd ,  新光電気工業株式会社

Inventor： OI ATSUSHI ,  SHIMIZU NORIYOSHI ,  YAMAZAKI TOMOO ,  HORIKAWA YASUYOSHI

IPC: H01G2/06 ,  H01G4/005 ,  H01G4/01 ,  H01G4/228 ,  H01G4/33 ,  H01G13/00 ,  H01L21/822 ,  H01L23/12 ,  H01L23/498 ,  H01L23/552 ,  H01L23/64 ,  H01L23/66 ,  H01L27/04 ,  H05K1/11 ,  H05K1/16

CPC classification number: H01L23/552 ,  H01G4/228 ,  H01G4/33 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/66 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/112 ,  H05K1/115 ,  H05K1/162 ,  H05K3/4688 ,  H05K2201/09609 ,  H05K2201/10674 ,  H05K2203/0733

Abstract: PROBLEM TO BE SOLVED: To provide a capacitor which can increase a capacity by an increase of an effective area of the capacitor built in a semiconductor package, a wiring board, etc. or used singly as an electronic part, and to provide a method for manufacturing the same. SOLUTION: The capacitor includes a capacitor dielectric film 14 disposed between wirings 18a and 18b aligned in parallel and between adjacent wirings 18a and 18b and connected directly to them. COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种电容器，其可以通过增加内置于半导体封装，布线板等中的电容器的有效面积或单独用作电子部件来增加容量，并提供 其制造方法。 解决方案：电容器包括设置在布线18a和18b之间的电容器电介质膜14，其平行排列并且在相邻布线18a和18b之间并且直接连接到它们。 版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2004319605A

公开(公告)日：2004-11-11

申请号：JP2003108544

申请日：2003-04-14

Applicant: Sony Corp ,  ソニー株式会社

Inventor： TSUKAMOTO SOTARO ,  KUROMIYA SATOSHI ,  HANAI NOBUHIRO ,  HAYASHIDA MASATO

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/552 ,  H05K1/02 ,  H05K1/18

CPC classification number: H01L23/552 ,  H01L23/49805 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/16152 ,  H01L2924/19105 ,  H01L2924/3025 ,  H05K1/0218 ,  H05K1/185 ,  H05K2201/09609 ,  H01L2224/05599

Abstract: PROBLEM TO BE SOLVED: To enable a wiring board to house a bare semiconductor integrated circuit device (IC), for example, an RF-IC 8 used for the transmission, reception, etc., of high-frequency signals by more completely electrostatically shielding the device. SOLUTION: In this wiring board 4, shield wiring films 10u and 10d are formed on the upside and underside of the bare RF-IC 8, and in addition, a plurality of shield interlayer connecting conductive films (shield via holes) 14s are formed so as to surround the RF-IC 8. COPYRIGHT: (C)2005,JPO&NCIPI

公开(公告)号：JP2004140412A

公开(公告)日：2004-05-13

申请号：JP2004032363

申请日：2004-02-09

Applicant: Tessera Inc ,  テッセラ・インコーポレーテッドTessera,Inc.

Inventor： DISTEFANO THOMAS H ,  KHANDROS IGOR ,  GRUBE GARY W ,  EHRENBERG SCOTT G

IPC: H05K1/11 ,  H01L21/48 ,  H01L23/538 ,  H05K1/00 ,  H05K3/00 ,  H05K3/40 ,  H05K3/46

CPC classification number: H05K3/462 ,  H01L21/4857 ,  H01L23/5383 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01R12/523 ,  H05K1/0287 ,  H05K1/029 ,  H05K1/0298 ,  H05K3/4038 ,  H05K3/4069 ,  H05K3/4602 ,  H05K3/4623 ,  H05K2201/0195 ,  H05K2201/0305 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/09609 ,  H05K2201/09945 ,  H05K2201/10378 ,  H05K2201/10666 ,  H05K2203/175 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To provide a method for producing a multilayer circuit unit. SOLUTION: A first circuit panel (544) having a dielectric material body, a contact (538), an electrode portion (530), and a skeleton conductor (527), and a second circuit panel (562) having a dielectric material body and an electrode portion (530) are prepared. A top of the first circuit panel is selectively treated, thereby the panel is specified in a customer-oriented manner; and part of the skeleton conductor of the panel is connected to the contact of the panel, the circuit panels are stacked in a top-and-bottom opposed style, where a top of the first circuit panel faces a bottom of the second circuit panel in a first interfacial area, first patterns on opposed faces are aligned with each other, the contact of the first panel is aligned with the electrode of the second panel in at least part of the aligned pattern, and the contacts and the electrodes, which are aligned with each other in the interfacial area, are all connected non-selectively to each other. Thus, part of the specified panel in the customer-oriented manner is connected to the electrode of the panel. COPYRIGHT: (C)2004,JPO

公开(公告)号：SE0301238A

公开(公告)日：2004-10-30

申请号：SE0301238

申请日：2003-04-29

Applicant: SENSEAIR AB

Inventor： MARTIN HANS GOERAN EVALD ,  HJORT KLAS ANDERS ,  LINDEBERG MIKAEL PETER ERIK

IPC: H05K1/11 ,  H05K3/00 ,  H05K3/18

CPC classification number: H05K3/0041 ,  G01K2211/00 ,  H01L2924/0002 ,  H05K1/115 ,  H05K3/002 ,  H05K2201/09609 ,  H05K2201/0979 ,  H05K2203/092 ,  H01L2924/00

公开(公告)号：NO870942A

公开(公告)日：1987-09-08

申请号：NO870942

申请日：1987-03-06

Applicant: CIRCUITGRAPH S L

Inventor： MELERO PEDRO VALENCIANO

IPC: H05K1/02 ,  H05K1/11 ,  H05K3/32 ,  H05K

CPC classification number: H05K3/326 ,  H05K1/119 ,  H05K2201/09609 ,  H05K2201/09827 ,  H05K2201/09854 ,  H05K2201/1059