公开(公告)号：KR1020110094639A

公开(公告)日：2011-08-24

申请号：KR1020100014183

申请日：2010-02-17

Applicant: 삼성전자주식회사

Inventor： 김석필 ,  박윤동 ,  서동석 ,  진영구 ,  이승훈

IPC: H01L31/10 ,  G01B11/22 ,  G01C3/00 ,  G06F15/00 ,  H01L27/146

CPC classification number: H01L27/14607 ,  G01B11/22 ,  G01C3/08 ,  G01S7/4863 ,  G01S17/48 ,  H01L27/144 ,  H01L27/14641 ,  H01L31/02327 ,  H01L31/112

Abstract: PURPOSE: A sensor and an operation method thereof are provided to reduce the capacitance of sensor since a plurality of photo gates can share one floating diffusion region. CONSTITUTION: A sensor comprises a pair of photo gates, a first share floating diffusion region and a first transmission transistor. The photo gates are formed on a semiconductor substrate. A pair of photo gate comprises a first photo gate(110) and a second photo gate(120). The first share floating diffusion region is formed in a semiconductor substrate. The first transmission transistor is formed on the semiconductor substrate. The first transmission transistor includes a plurality of micro lenses formed on a plurality of photo gate.

Abstract translation: 目的：提供传感器及其操作方法以减少传感器的电容，因为多个光栅可以共享一个浮动扩散区域。 构成：传感器包括一对光栅，第一共享浮动扩散区和第一透射晶体管。 光栅形成在半导体衬底上。 一对光栅包括第一光栅（110）和第二光栅（120）。 第一共享浮动扩散区域形成在半导体衬底中。 第一透射晶体管形成在半导体衬底上。 第一透射晶体管包括形成在多个光栅上的多个微透镜。

公开(公告)号：KR1020110093535A

公开(公告)日：2011-08-18

申请号：KR1020100021832

申请日：2010-03-11

Applicant: 삼성전자주식회사

Inventor： 박윤동 ,  밀러다비드앤드류바클레이 ,  진영구 ,  조인성

IPC: H01L31/101 ,  H01L27/146

CPC classification number: H01L31/1804 ,  H01L31/107 ,  Y02E10/547 ,  Y02P70/521

Abstract: PURPOSE: A near infrared ray detector, an image sensor using the same, and a semiconductor manufacturing method thereof are provided to form a silicon film whose thickness is 70nm, thereby obtaining a very quickly response feature. CONSTITUTION: A semiconductor area is formed on a substrate. An antenna(28) includes first and second arms on the substrate. The antenna includes the semiconductor area between the arms. First and second electrodes(30) are separated on the substrate wherein the semiconductor area is placed between the first and second electrodes. An avalanche gain is generated in the semiconductor area by applying a bias voltage to the electrodes.

Abstract translation: 目的：提供近红外线检测器，使用其的图像传感器及其半导体制造方法，以形成厚度为70nm的硅膜，从而获得非常快的响应特征。 构成：在基板上形成半导体区域。 天线（28）包括在基板上的第一和第二臂。 天线包括臂之间的半导体区域。 在衬底上分离第一和第二电极（30），其中半导体区域位于第一和第二电极之间。 通过向电极施加偏置电压，在半导体区域中产生雪崩增益。

公开(公告)号：KR1020110062393A

公开(公告)日：2011-06-10

申请号：KR1020090119107

申请日：2009-12-03

Applicant: 삼성전자주식회사

Inventor： 지호철 ,  김기남 ,  형용우 ,  나경원 ,  하경호 ,  박윤동 ,  배대록 ,  복진권 ,  강필규

IPC: G02B6/12 ,  G02B6/125 ,  G02F1/065

CPC classification number: G02B6/12004 ,  G02B6/125 ,  G02F1/065

Abstract: PURPOSE: An optical waveguide device using a bulk silicon wafer and a manufacturing method thereof are provided to achieve high speed signal transmission, low power consumption, large capacity and compactness, by using optical interconnection technology. CONSTITUTION: A trench region(12) is formed on a part of a bulk silicon wafer(10). A bottom clad layer(14) is formed in the trench region. An optical waveguide core layer(22a) is formed on the bottom clad layer, far from one side of the trench region. A top clad layer(24) is formed to cover the optical waveguide core layer.

Abstract translation: 目的：提供使用体硅晶片的光波导器件及其制造方法，通过使用光互连技术实现高速信号传输，低功耗，大容量和紧凑性。 构成：在体硅晶片（10）的一部分上形成沟槽区（12）。 在沟槽区域中形成底部覆层（14）。 光波导芯层（22a）形成在底部包层上，远离沟槽区域的一侧。 形成顶部覆层（24）以覆盖光波导芯层。

公开(公告)号：KR1020110033567A

公开(公告)日：2011-03-31

申请号：KR1020090091113

申请日：2009-09-25

Applicant: 삼성전자주식회사

Inventor： 황수정 ,  포썸,에릭알. ,  진영구 ,  박윤동 ,  차대길

IPC: H01L27/146

CPC classification number: H04N5/3696 ,  H01L27/14621 ,  H01L27/14645 ,  H04N5/2257 ,  H04N5/332

Abstract: PURPOSE: An image sensor having a depth sensor is provided to increase the recombination of electrons and holes by forming a potential barrier to preventing the movement of electronics generated from the depth region in the lower part of a substrate. CONSTITUTION: In an image sensor having a depth sensor. A substrate(101) comprises a visible light recognition domain(I) and a non-visible light recognition domain(II). A first well(123a) and a second well(123b) of a first conductive type are formed in the non-visible light recognition domain. A first gate(122a) and a second gate(122b) apply voltage to the first well and the second well respectively. A photoelectric conversion element(110R,110G) is formed between the first gate and the second gate. The photoelectric conversion element comprises pinning layers(112R,112G) formed in the upper part of the substrate.

Abstract translation: 目的：提供具有深度传感器的图像传感器，以通过形成势垒来增加电子和空穴的复合，以防止从衬底下部的深度区域产生的电子元件的移动。 构成：在具有深度传感器的图像传感器中。 基板（101）包括可见光识别域（I）和不可见光识别域（II）。 第一导电类型的第一阱（123a）和第二阱（123b）形成在不可见光识别域中。 第一栅极（122a）和第二栅极（122b）分别向第一阱和第二阱施加电压。 光电转换元件（110R，110G）形成在第一栅极和第二栅极之间。 光电转换元件包括形成在基板上部的钉扎层（112R，112G）。

公开(公告)号：KR1020110003696A

公开(公告)日：2011-01-13

申请号：KR1020090061092

申请日：2009-07-06

Applicant: 삼성전자주식회사

Inventor： 설상철 ,  박윤동 ,  이명복 ,  진영구

IPC: H01L27/146 ,  G02B5/20

CPC classification number: H04N5/3696 ,  H01L27/14621 ,  H01L27/14625 ,  H01L27/14627 ,  H01L27/14629 ,  H01L31/02162 ,  H04N5/2226 ,  H04N9/045

Abstract: PURPOSE: An optical filter array for a single chip three-dimensional color image sensor and a method for manufacturing the same are provided to easily form a digital optical system requiring color images and distance information by combining an RGB-Z chip and a filter through which infrared ray in a specific wavelength transmitted. CONSTITUTION: A color pixel array and a distance pixel array are formed on a semiconductor substrate using a plurality of photo diodes. Visible ray selection wavelength formed on the color pixel array transmitted through an RGB filter. Near infrared ray in a specific wavelength is transmitted through a near infrared ray band transmittance filter by forming the filter on the distance pixel. Single band laminated filter is formed on the RGB filter and the near infrared ray band transmittance filter. A photo-induced part is formed on the photodiodes and the distance pixel.

Abstract translation: 目的：提供用于单芯片三维彩色图像传感器的光学滤波器阵列及其制造方法，以通过组合RGB-Z芯片和滤波器来容易地形成需要彩色图像和距离信息的数字光学系统，通过该滤色器 发射的特定波长的红外线。 构成：使用多个光电二极管在半导体衬底上形成彩色像素阵列和距离像素阵列。 可见光线选择波长形成在透过RGB滤光片的彩色像素阵列上。 通过在距离像素上形成滤光器，将特定波长的近红外线透过近红外线透过率滤光片。 在RGB滤光片和近红外线透过率滤光片上形成单波段层叠滤光片。 在光电二极管和距离像素上形成光诱导部分。

公开(公告)号：KR1020100118772A

公开(公告)日：2010-11-08

申请号：KR1020090037644

申请日：2009-04-29

Applicant: 삼성전자주식회사

Inventor： 조경래 ,  에릭로이포썸 ,  박윤동 ,  진영구 ,  이승훈 ,  변성재

IPC: H04N5/335

CPC classification number: H04N5/3575 ,  H04N5/378

Abstract: PURPOSE: An image sensor equipped with a noise removal unit, an image pickup apparatus including the same and a method thereof for accurately detecting the image are provided to accurately detect the image by equipping the noise removal unit by each pixel. CONSTITUTION: A storage stores a photo-charge corresponding to a noise component. The unit pixel of the image sensor comprises an optical detecting device(11) and a circuit for eliminating noise(20). The image sensor comprises a plurality of pixels. A CPU controls the operation of the image sensor.

Abstract translation: 目的：提供一种装备有噪声去除单元的图像传感器，包括该噪声消除单元的图像拾取装置及其精确检测图像的方法，以通过由每个像素装备噪声去除单元来精确地检测图像。 规定：存储器存储对应于噪声分量的光电荷。 图像传感器的单位像素包括光学检测装置（11）和消除噪声的电路（20）。 图像传感器包括多个像素。 CPU控制图像传感器的操作。

公开(公告)号：KR1020100062213A

公开(公告)日：2010-06-10

申请号：KR1020080120682

申请日：2008-12-01

Applicant: 삼성전자주식회사

Inventor： 김원주 ,  최상무 ,  이태희 ,  박윤동

IPC: H01L29/78 ,  H01L21/336

CPC classification number: H01L27/1203 ,  H01L21/76224 ,  H01L21/84 ,  H01L27/108 ,  H01L27/10802 ,  H01L27/1207 ,  H01L29/7841

Abstract: PURPOSE: A semiconductor device and a semiconductor device manufacturing method are provided to form a memory cell with a silicon on insulator(SOI) structure in a specific region using a selective etching technique. CONSTITUTION: An SOI structure is formed on a third well(140) among a first well to the third well. The SOI structure is composed of an insulating region(170) and body regions(181, 182, 183). The insulating region and the body region are formed by selectively etching the lower part of the third well. The third well and the body region have a same property. The SOI structure formed on the third well is separated from components formed on the first and the second well.

Abstract translation: 目的：提供半导体器件和半导体器件制造方法，以使用选择性蚀刻技术在特定区域中形成具有绝缘体上硅（SOI）结构的存储单元。 构成：在第一井到第三井中的第三井（140）上形成SOI结构。 SOI结构由绝缘区域（170）和体区域（181,182,183）组成。 通过选择性蚀刻第三阱的下部形成绝缘区域和体区。 第三口井和身体区域具有相同的属性。 形成在第三阱上的SOI结构与形成在第一和第二阱上的部件分离。

公开(公告)号：KR1020100031401A

公开(公告)日：2010-03-22

申请号：KR1020080090489

申请日：2008-09-12

Applicant: 삼성전자주식회사

Inventor： 김원주 ,  이태희 ,  박윤동 ,  최상무 ,  차대길

IPC: H01L29/78 ,  H01L21/336

CPC classification number: H01L27/0688 ,  H01L27/108 ,  H01L27/10882

Abstract: PURPOSE: A semiconductor device and a method for manufacturing the same are provided to reduce the number of process steps for manufacturing a multi-layered semiconductor device to be identical to the number of process steps for manufacturing a single layer semiconductor device. CONSTITUTION: First active regions(211, 212, 213) second active regions(221, 222, 223) and third active regions(231, 232, 233) are successively arranged. The second active regions are arranged in an upper layer than a layer in which the first active regions are arranged. The third active regions are arranged in an upper layer than the layer in which the second active regions are arranged. The active regions are expanded to an identical direction with a pre-set gap and are parallelly arranged. Impurity doping regions are formed along the both edge of the active regions.

Abstract translation: 目的：提供半导体器件及其制造方法，以减少用于制造多层半导体器件的工艺步骤的数量与制造单层半导体器件的工艺步骤的数量相同。 构成：连续布置第一有源区（211,212,213）第二有源区（221,222,223）和第三有源区（231,232,233）。 第二有源区域布置在比布置有第一有源区域的层的上层中。 第三有源区域布置在比设置第二有源区域的层的上层。 有源区域以预设的间隙扩展到相同的方向并且平行布置。 杂质掺杂区沿着有源区的两边形成。

公开(公告)号：KR1020100004731A

公开(公告)日：2010-01-13

申请号：KR1020080065068

申请日：2008-07-04

Applicant: 삼성전자주식회사

Inventor： 조경래 ,  김용준 ,  공준진 ,  박윤동

IPC: G11C16/10 ,  G11C16/04 ,  G11C29/42

CPC classification number: G11C11/5628 ,  G11C29/00 ,  G11C2211/5621

Abstract: PURPOSE: A memory device and a memory programming method are provided to reduce an error included in the read/program of a data page by programming the data in the multilevel cell or multi bit cell memory device. CONSTITUTION: A multilevel cell array(110) includes a plurality of multilevel cells. A programming unit(120) programs a first data page in a plurality of multilevel cells and a second data page in the multilevel cell in which the first data page is programmed. An error analyzing unit(130) analyzes read error information corresponding to the first data page based on read voltage level. A controller(140) controls the read voltage level about the first data page corresponding to the determination result of the rear error correction.

Abstract translation: 目的：提供存储器件和存储器编程方法，以通过对多电平单元或多位单元存储器件中的数据进行编程来减少包含在数据页的读/写程序中的错误。 构成：多电平单元阵列（110）包括多个多电平单元。 编程单元（120）编程多个多电平单元中的第一数据页和第一数据页被编程的多层单元中的第二数据页。 误差分析单元（130）基于读取电压电平来分析与第一数据页相对应的读取错误信息。 控制器（140）控制与后错误校正的确定结果相对应的关于第一数据页的读取电压电平。

公开(公告)号：KR1020090130758A

公开(公告)日：2009-12-24

申请号：KR1020080056527

申请日：2008-06-16

Applicant: 삼성전자주식회사

Inventor： 박윤동 ,  설광수 ,  이승훈 ,  조인성

IPC: G11C5/14

CPC classification number: G11C5/14 ,  G11C2207/2227 ,  H01L25/16 ,  H03K19/0016

Abstract: PURPOSE: A semiconductor chip system is provided to recycle a waste current in the normal operation or standby state of a semiconductor chip, thereby minimizing the power consumption. CONSTITUTION: A semiconductor chip system(10) comprises a chip circuit unit(30) and an electric charge recycling unit(50). The chip circuit unit comprises at least one of CPU(Central Processing Unit), a memory, and a semiconductor IC(Integrated Circuit). The electric charge recycling unit recycles a waste current. The electric charge recycling unit comprises an on-chip battery(51) and an electricity storing cluster(55). The on-chip battery and external power supply(20) supply power to the chip circuit unit. The electricity storing cluster is used to concentrate the waste current. The electricity storing cluster is operated in a low-pressure electricity storing mode and high-pressure electricity discharge mode. The electric charge recycling unit comprises a controller. The electric charge recycling unit comprises a blocking unit for preventing the back flow phenomenon of a voltage.

Abstract translation: 目的：提供半导体芯片系统以在半导体芯片的正常操作或待机状态下再循环废电流，从而最小化功耗。 构成：半导体芯片系统（10）包括芯片电路单元（30）和电荷回收单元（50）。 芯片电路单元包括CPU（中央处理单元），存储器和半导体IC（集成电路）中的至少一个。 电荷循环装置回收废电流。 电荷回收单元包括片上电池（51）和蓄电簇（55）。 片上电池和外部电源（20）为芯片电路单元供电。 蓄电集群用于集中废电流。 蓄电群在低压蓄电模式和高压放电模式下工作。 电荷回收单元包括控制器。 电荷回收单元包括用于防止电压回流现象的阻断单元。