Method of making a soi silicon structure
    21.
    发明公开
    Method of making a soi silicon structure 审中-公开
    Verfahren zum Herstellen einer SOI-Struktur

    公开(公告)号:EP1734000A2

    公开(公告)日:2006-12-20

    申请号:EP06076128.5

    申请日:2006-05-30

    Inventor: Chilcott, Dan W.

    CPC classification number: B81C1/00944 B81C2201/0132

    Abstract: A process for making a microelectromechanical device having a moveable component defined by a gap pattern in a semiconductor layer of a silicon-on-insulator wafer (10) involves the use of a plurality of deep reactive ion etching steps at various etch depths that are used to allow a buried oxide layer (14) of the silicon-on-insulator wafer (10) to be exposed in selected areas before the entire moveable component of the resulting device is freed for movement. This method allows wet release techniques to be used to remove the buried oxide layer (14) without developing stiction problems. This is achieved by utilizing deep reactive ion etching to free the moveable component after a selected portion of the buried oxide layer (14) has been removed by wet etching.

    Abstract translation: 一种用于制造具有由绝缘体上硅晶片(10)的半导体层中的间隙图案限定的可移动部件的微机电装置的方法涉及使用多个深反应离子蚀刻步骤,所述深反应离子蚀刻步骤在使用的各种蚀刻深度 允许绝缘体上硅晶片(10)的掩埋氧化物层(14)在所得到的器件的整个可移动部件被释放以便移动之前暴露在选定的区域中。 该方法允许湿式释放技术用于去除埋入氧化物层(14)而不产生粘性问题。 这是通过利用深反应离子蚀刻在通过湿法蚀刻去除掩埋氧化物层(14)的选定部分之后释放可移动部件来实现的。

    Technique for manufacturing silicon structures
    22.
    发明公开
    Technique for manufacturing silicon structures 审中-公开
    Herstellungsverfahren von Siliziumstrukturen

    公开(公告)号:EP1717196A1

    公开(公告)日:2006-11-02

    申请号:EP06075842.2

    申请日:2006-04-07

    Abstract: A technique for manufacturing silicon structures includes etching a cavity into a first side of an epitaxial wafer (506). A thickness of an epitaxial layer is selected, based on a desired depth of the etched cavity and a desired membrane thickness. The first side of the epitaxial wafer is then bonded to a first side of a handle wafer (510). After thinning the epitaxial wafer until only the epitaxial layer remains, desired circuitry is formed on a second side of the remaining epitaxial layer (516), which is opposite the first side of the epitaxial wafer.

    Abstract translation: 制造硅结构的技术包括将空腔蚀刻到外延晶片(506)的第一侧。 基于蚀刻腔的期望深度和期望的膜厚选择外延层的厚度。 然后将外延晶片的第一侧接合到处理晶片(510)的第一侧。 在使外延晶片变薄直到仅剩余外延层之后,在与外延晶片的第一侧相对的剩余外延层(516)的第二侧上形成所需的电路。

    Microfluidic valve structure
    26.
    发明公开
    Microfluidic valve structure 审中-公开
    Mikroventil

    公开(公告)号:EP1852615A2

    公开(公告)日:2007-11-07

    申请号:EP07075274.6

    申请日:2007-04-11

    Abstract: A microfluidic valve structure (10 or 10') is provided. The valve structure (10) includes a valve body (15) having a fluid flow passage (22) formed therein for allowing fluid to flow therethrough. A valve boss (24) is configured to move relative to a valve seat (26) to open and close the fluid flow passage. A plurality of flexible support arms (30A-30D) extend between a wall (20) of the valve body (15) and the valve boss (24) for supporting the valve boss (24) relative to the valve body (15) such that the valve boss (24) engages and disengages the valve seat (26) to close and open the passage.

    Abstract translation: 提供微流体阀结构(10或10')。 阀结构(10)包括阀体(15),其具有形成在其中的流体流动通道(22),用于允许流体流过其中。 阀座(24)构造成相对于阀座(26)移动以打开和关闭流体流动通道。 多个柔性支撑臂(30A-30D)在阀体(15)的壁(20)和阀座(24)之间延伸,用于相对于阀体(15)支撑阀座(24),使得 阀座(24)接合并脱离阀座(26)以关闭和打开通道。

    Method for manufacturing a micro-electro-mechanical device having a diaphragm
    27.
    发明公开
    Method for manufacturing a micro-electro-mechanical device having a diaphragm 审中-公开
    埃菲尔铁塔um aphrag ma ma ma ma ma ma ma ma ma ma ma ma ma ma ma ma ma ma ma ma ma

    公开(公告)号:EP1770057A2

    公开(公告)日:2007-04-04

    申请号:EP06076693.8

    申请日:2006-09-07

    Inventor: Chilcott, Dan W.

    Abstract: A technique (400) for manufacturing a microelectromechanical (MEM) device includes a number of steps. Initially, a first wafer (402) is provided. Next, a bonding layer is formed on a first surface of the first wafer. Then, a portion of the bonding layer is removed to provide a cavity including a plurality of spaced support pedestals within the cavity (404). Next, a second wafer is bonded to at least a portion of the bonding layer (406). A portion of the second wafer provides a diaphragm over the cavity and the support pedestals support the diaphragm during processing. The second wafer is then etched to release the diaphragm from the support pedestals.

    Abstract translation: 用于制造微机电(MEM)装置的技术(400)包括多个步骤。 首先,提供第一晶片(402)。 接下来,在第一晶片的第一表面上形成接合层。 然后,去除接合层的一部分以提供在空腔(404)内包括多个间隔开的支撑基座的空腔。 接下来,将第二晶片接合到结合层(406)的至少一部分。 第二晶片的一部分在空腔上提供隔膜,并且支撑基座在处理期间支撑隔膜。 然后蚀刻第二晶片以从支撑基座释放隔膜。

    Monolithically-integrated infrared sensor
    28.
    发明公开
    Monolithically-integrated infrared sensor 有权
    单片集成红外线传感器

    公开(公告)号:EP1333504A3

    公开(公告)日:2007-01-31

    申请号:EP03075163.0

    申请日:2003-01-17

    CPC classification number: G01J5/14 G01J5/12

    Abstract: An integrated sensor (10) comprising a thermopile transducer (12) and signal processing circuitry (4) that are combined on a single semiconductor substrate (20), such that the transducer output signal is sampled in close vicinity by the processing circuitry (14). The sensor (10) comprises a frame (18) formed of a semiconductor material that is not heavily doped, and with which a diaphragm (16) is supported. The diaphragm (16) has a first surface for receiving thermal (e.g., infrared) radiation, and comprises multiple layers that include a sensing layer containing at least a pair of interlaced thermopiles (22). Each thermopile (22) comprises a sequence of thermocouples (24), each thermocouple (24) comprising dissimilar electrically-resistive materials that define hot junctions (26) located on the diaphragm (16) and cold junctions (28) located on the frame (18). The signal processing circuitry (14) is located on the frame (18) and electrically interconnected with the thermopiles (22). The thermopiles (22) are interlaced so that the output of one of the thermopiles (22) increases with increasing temperature difference between the hot and cold junctions (26,28) thereof, while the output of the second thermopile (22) decreases with increasing temperature difference between its hot and cold junctions (26,28).

    Method of making a microsensor
    29.
    发明公开
    Method of making a microsensor 有权
    Verfahren zum Herstellen eines Mikrosensors

    公开(公告)号:EP1702884A2

    公开(公告)日:2006-09-20

    申请号:EP06075521.2

    申请日:2006-03-06

    Abstract: A linear accelerometer (10) is provided having a support substrate (14), fixed electrodes (22A-22D) having fixed capacitive plates (30A-30D), and a movable inertial mass (12) having movable capacitive plates (20A-20D) capacitively coupled to the fixed capacitive plates (30A-30D). Adjacent capacitive plates vary in height. The accelerometer (10) further includes support tethers (16A-16B) for supporting the inertial mass (12) and allowing movement of the inertial mass upon experiencing a linear acceleration along a sensing axis. The accelerometer (10) has inputs (26, 28) and an output (34) for providing an output signal which varies as a function of the capacitive coupling and is indicative of both magnitude and direction of vertical acceleration along the sensing Z-axis. A microsensor fabrication process (100) is also provided which employs a top side mask and etch module (70).

    Abstract translation: 提供具有支撑基板(14)的线性加速度计(10),具有固定电容板(30A-30D)的固定电极(22A-22D)和具有可动电容板(20A-20D)的可动惯性质量块(12) 电容耦合到固定电容板(30A-30D)。 相邻的电容板的高度不同。 加速度计(10)还包括用于支撑惯性质量块(12)的支撑系绳(16A-16B),并且允许惯性质量块在沿感测轴线经历线性加速度时运动。 加速度计(10)具有用于提供作为电容耦合的函数而变化的输出信号的输入(26,28)和输出(34),并且指示沿着感测Z轴的垂直加速度的大小和方向。 还提供了使用顶侧掩模和蚀刻模块(70)的微传感器制造工艺(100)。

Patent Agency Ranking