公开(公告)号：CA3143360A1

公开(公告)日：2020-12-24

申请号：CA3143360

申请日：2020-05-13

Applicant: IBM

Inventor： LEWANDOWSKI ERIC PETER ,  WEBB BUCKNELL ,  HERTZBERG JARED BARNEY ,  SANDBERG MARTIN ,  JINKA OBLESH

IPC: H01L23/36 ,  H01L39/00

Abstract: A thermalization structure is formed using a foil and a low temperature device (LTD). The foil includes a first layer of a first material. The LTD includes a surface from which heat is transferred away from the LTD. A coupling is formed between the foil and the surface of the LTD, where the coupling includes a bond formed between the foil and the surface such that forming the bond forms a set of ridges in the foil, a ridge in the set of ridges operating to dissipate the heat.

公开(公告)号：BR112021025725A2

公开(公告)日：2022-02-08

申请号：BR112021025725

申请日：2020-05-13

Applicant: IBM

Inventor： WEBB BUCKNELL ,  ERIC PETER LEWANDOWSKI ,  JARED BARNEY HERTZBERG ,  SANDBERG MARTIN ,  JINKA OBLESH

IPC: H01L23/44

Abstract: estrutura de termalização para dispositivos resfriados à temperatura criogênica. uma estrutura de termalização é formada utilizando uma folha e um dispositivo de baixa temperatura (ltd). a folha inclui uma primeira camada de um primeiro material. o ltd inclui uma superfície a partir da qual calor é transferido para longe do ltd. um acoplamento é formado entre a folha e a superfície do ltd, onde o acoplamento inclui uma ligação formada entre a folha e a superfície de modo que a formação da ligação forma um conjunto de cristas na folha, uma crista no conjunto de cristas operando para dissipar o calor.

公开(公告)号：DE112018006053B4

公开(公告)日：2021-11-11

申请号：DE112018006053

申请日：2018-11-09

Applicant: IBM

Inventor： ROSENBLATT SAMI ,  ORCUTT JASON ,  SANDBERG MARTIN ,  BRINK MARKUS ,  ADIGA VIVEKANANDA ,  BRONN NICHOLAS TORLEIV

IPC: H01L39/02 ,  G06N10/00

Abstract: Verfahren zum Bilden einer Quantenbit(Qubit)-Flip-Chip-Baugruppe, wobei das Verfahren aufweist:Bilden eines Qubit auf einem ersten Chip;Bilden eines optisch durchlässigen Wegs in einem zweiten Chip; undBonden des ersten Chips an den zweiten Chip; undwobei der optisch durchlässige Weg oberhalb des Qubit angeordnet ist,wobei der Weg eine Öffnung mit einem Durchmesser aufweist, der groß genug ist, um eine Behandlung des Qubit zu ermöglichen.

公开(公告)号：AU2020260301A1

公开(公告)日：2021-09-30

申请号：AU2020260301

申请日：2020-03-25

Applicant: IBM

Inventor： SANDBERG MARTIN ,  ADIGA VIVEKANANDA ,  TOPALOGLU RASIT ONUR

IPC: H01L27/18 ,  B82Y10/00 ,  G06N10/00 ,  H01L39/22 ,  H01L39/24

Abstract: A fluxonium qubit includes (400) a superinductor (402). The superinductor includes a substrate (404), and a first vertical stack (406) extending in a vertical direction from a surface (406) of the substrate (404). The first vertical stack includes a first Josephson junction (410) and a second Josephson junction (412) connected in series along the vertical direction. The superinductor includes a second vertical stack (414) extending in a vertical direction from a surface of the substrate. The second vertical stack includes a third Josephson junction (416). The superinductor includes a superconducting connector (420) connecting the first and second vertical stacks in series such that the first, second, and third Josephson junctions are connected in series. The fluxonium qubit further includes a shunted Josephson junction (422) connected to the superinductor with superconducting wires (424, 426) such that the first, second, and third Josephson junctions of the superinductor that are in series are connected in parallel with the shunted Josephson junction.

公开(公告)号：CA3137255A1

公开(公告)日：2020-10-22

申请号：CA3137255

申请日：2020-03-25

Applicant: IBM

Inventor： SANDBERG MARTIN ,  ADIGA VIVEKANANDA ,  TOPALOGLU RASIT ONUR

IPC: H01L27/18 ,  B82Y10/00 ,  H01L39/22 ,  H01L39/24

Abstract: A fluxonium qubit includes (400) a superinductor (402). The superinductor includes a substrate (404), and a first vertical stack (406) extending in a vertical direction from a surface (406) of the substrate (404). The first vertical stack includes a first Josephson junction (410) and a second Josephson junction (412) connected in series along the vertical direction. The superinductor includes a second vertical stack (414) extending in a vertical direction from a surface of the substrate. The second vertical stack includes a third Josephson junction (416). The superinductor includes a superconducting connector (420) connecting the first and second vertical stacks in series such that the first, second, and third Josephson junctions are connected in series. The fluxonium qubit further includes a shunted Josephson junction (422) connected to the superinductor with superconducting wires (424, 426) such that the first, second, and third Josephson junctions of the superinductor that are in series are connected in parallel with the shunted Josephson junction.

公开(公告)号：CA3136508A1

公开(公告)日：2020-10-15

申请号：CA3136508

申请日：2020-04-06

Applicant: IBM

Inventor： ADIGA VIVEKANANDA ,  SANDBERG MARTIN ,  CHOW JERRY ,  PAIK HANHEE

IPC: H01L27/18 ,  H01L39/22 ,  H01L39/24

Abstract: A qubit includes a substrate, and a first capacitor structure having a lower portion formed on a surface of the substrate and at least one first raised portion extending above the surface of the substrate. The qubit further includes a second capacitor structure having a lower portion formed on the surface of the substrate and at least one second raised portion extending above the surface of the substrate. The first capacitor structure and the second capacitor structure are formed of a superconducting material. The qubit further includes a junction between the first capacitor structure and the second capacitor structure. The junction is disposed at a predetermined distance from the surface of the substrate and has a first end in contact with the first raised portion and a second end in contact with the second raised portion.