-
公开(公告)号：KR1020160104277A
公开(公告)日：2016-09-05
申请号：KR1020150027060
申请日：2015-02-26
Applicant: 삼성전자주식회사
IPC: G06F3/048 , G06F3/0482 , G06F3/0484
CPC classification number: G06F3/0482 , G06F3/0485 , G06F3/04883 , G06F7/08 , G06F2203/04806 , G06F3/04842
Abstract: 디스플레이장치및 그제어방법이개시된다. 본발명에따른디스플레이장치의제어방법은카테고리별로분류된복수의컨텐츠바(Bar)를포함하는컨텐츠가이드 UI를디스플레이하는단계, 복수의컨텐츠바 중하나의컨텐츠바가선택되면, 선택된컨텐츠바를확장하는단계및 확장된컨텐츠바에의해생성된컨텐츠영역에선택된컨텐츠바에대응되는카테고리에포함된적어도하나의컨텐츠를디스플레이하는단계를포함한다. 이에따라, 디스플레이장치는사용자에게직관적으로컨텐츠정보를제공함으로써, 사용자가원하는컨텐츠를보다용이하게접근하도록유도할수 있다.
Abstract translation: 公开了一种显示装置及其控制方法。 根据本发明的用于控制显示装置的方法包括以下步骤：显示包括由类别分类的多个内容条的内容指南用户界面（UI），当从多个内容中选择一个内容栏时， 酒吧，所选择的内容栏，以及将包括在与所选内容栏相对应的类别中的至少一个内容显示到由扩展内容栏生成的内容区域上。 因此，显示装置直观地向用户提供内容信息，从而允许用户更容易地访问期望的内容。
-
公开(公告)号：KR100421037B1
公开(公告)日：2004-03-03
申请号：KR1020010013192
申请日：2001-03-14
Applicant: 삼성전자주식회사
IPC: H01L21/304
CPC classification number: H01L21/31053 , H01L21/31055
Abstract: A method of manufacturing a semiconductor device is capable of preventing a dishing phenomenon from occurring without using dummy patterns. A plurality of conductive patterns are formed along the entire surface of a semiconductor substrate with an irregular pattern density. The conductive patterns have a first stopper layer at the top thereof. An interlayer insulating layer is formed on the conductive patterns. Next, a second stopper layer is formed on the interlayer insulating layer. An etching mask is formed on the second stopper layer so as to expose a first region having a conductive pattern density that is higher than that of another region(s). By using the etching mask, the second stopper layer and part of the interlayer insulating layer are etched at the first region. The resultant structure is then first polished to expose the first stopper layer at the first region, by using a slurry that provides a polishing rate for the interlayer insulating layer that is higher than that for either the first and second stopper layers. The resultant structure is then polished for a second time to remove the second stopper layer form the region(s) of lower pattern density, by using a slurry that provides a polishing rate that is higher for the second stopper layer than for either the first stopper layer and the interlayer insulating layer.
Abstract translation: 制造半导体器件的方法能够在不使用虚设图案的情况下防止发生凹陷现象。 多个导电图案沿着具有不规则图案密度的半导体衬底的整个表面形成。 导电图案在其顶部具有第一阻挡层。 在导电图案上形成层间绝缘层。 接下来，在层间绝缘层上形成第二阻挡层。 在第二阻挡层上形成蚀刻掩模，以暴露具有比另一个区域更高的导电图案密度的第一区域。 通过使用蚀刻掩模，在第一区域蚀刻第二阻挡层和部分层间绝缘层。 然后通过使用提供高于第一和第二阻挡层的抛光速率的浆料，首先抛光所得结构以暴露第一区域处的第一阻挡层。 然后通过使用提供第二阻挡层的抛光速率高于第一阻挡层的抛光速率的浆料，第二次抛光所得结构以从形成图案密度较低的区域移除第二阻挡层 层和层间绝缘层。
-
公开(公告)号：KR100378180B1
公开(公告)日：2003-03-29
申请号：KR1020000027503
申请日：2000-05-22
Applicant: 삼성전자주식회사
IPC: H01L21/304
CPC classification number: H01L21/76224 , B24B37/044 , C09G1/02 , H01L21/31053
Abstract: 화학기계적 연마 공정의 수행에 따라 슬러리에 노출되는 표면이 소수성을 띠는 물질층, 예를 들어 폴리실리콘층을 정지막으로 하여, 그 노출 표면이 친수성을 띠는 피연마 물질층, 예를 들어 실리콘산화막을 연마할 시 유용하게 사용할 수 있는 슬러리가 제공되며, 상기 슬러리는 물, 연마입자 및 친수성 작용기와 소수성 작용기를 동시에 갖는 폴리머 첨가제를 포함한다.
-
公开(公告)号：KR100343146B1
公开(公告)日：2002-07-05
申请号：KR1020000065049
申请日：2000-11-02
Applicant: 삼성전자주식회사
IPC: H01L21/336
Abstract: 게이트 전극용 도전층을 필드산화막에 의해 리세스(recess) 된 활성영역에 다마신 구조 형성되는 반도체 소자 및 그 형성방법을 설명한다. 본 발명에 의하면, 활성영역에서는 게이트전극용 도전층이 형성되고 비활성영역에서는 게이트 전극용 도전층이 형성되지 않기 때문에 후속공정에서 층간절연막을 증착할 때, 층간절연막의 두께를 줄여서 층간절연막 내부에서 보이드(void)가 발생하는 것을 억제하고, 활성영역의 바닥면에 선택적 성장에 의한 폴리실리콘막을 다시 성장시키기 때문에 활성영역의 바닥면에서 발생되는 마이크로 스크래치(micro scratch), 피팅(pitting) 및 스트링거의 영향을 최소화시킬 수 있다.
-
公开(公告)号：KR100343136B1
公开(公告)日：2002-07-05
申请号：KR1019990009183
申请日：1999-03-18
Applicant: 삼성전자주식회사
IPC: H01L21/304
CPC classification number: H01L21/31053 , H01L21/318 , H01L21/3185 , Y10S438/959
Abstract: 디싱(dishing) 현상과연마저지층의두께변화를개선할수 있는이중층연마저지층을이용한화학기계적연마방법에관해개시한다. 이를위해본 발명은이중층으로된 연마저지층을반도체기판위에적층하고, 트랜치를형성한후, 소자분리막용절연막을적층한후, 제1 연마저지층을이용하여 1차화학기계적연마(CMP) 공정을진행하고, 다시제1 연마저지층만을제거한후, 제2 연마저지층을이용하여 2차화학기계적연마(CMP) 공정을진행하는것을특징으로하는이중연마저지층을이용한화학기계적연마방법을제공한다. 상기이중층연마저지층사이에식각저지층을추가로개재하여제1 연마저지층을제거할수도있다.
-
Patent Agency Ranking
公开(公告)号：KR1020020034635A
公开(公告)日：2002-05-09
申请号：KR1020000065049
申请日：2000-11-02
Applicant: 삼성전자주식회사
IPC: H01L21/336
CPC classification number: H01L21/76897 , H01L21/28123 , H01L21/76832 , H01L21/76834 , H01L21/76837 , H01L21/823437 , H01L21/823481
Abstract: PURPOSE: A method for fabricating a semiconductor device having a gate electrode of a damascene structure is provided to control generation of a void in an interlayer dielectric deposited after a gate line is formed, and to minimize a defect like a micro scratch, pitting or stringer. CONSTITUTION: An insulation layer for a filed oxide layer(106) is formed in a trench formed by patterning a pad oxide layer and a polishing stop layer formed on a semiconductor substrate(100). A chemical mechanical polishing(CMP) process for forming a shallow trench isolation(STI) is performed to define an active region and an inactive region. The polishing stop layer and the pad oxide layer in the active region are removed to form a gate oxide layer. A conductive layer for a gate electrode is deposited. A CMP process is performed to make the conductive layer for the gate electrode have a damascene structure by using the filed oxide layer in the inactive region as a polishing stop layer. A silicide layer and a gate upper insulation layer are stacked and patterned on the substrate to form respective gates in the active and inactive regions. A gate line having a spacer is formed on the sidewall of the gate stack, and a polysilicon layer(120) is grown on the bottom surface of the active region by a selective growth method. An etch stop layer(122) is formed by a blanket etch method. An interlayer dielectric is formed on the semiconductor substrate having the etch stop layer and is etched back.
Abstract translation: 目的：提供一种用于制造具有镶嵌结构的栅电极的半导体器件的方法，以控制在栅极线形成之后沉积的层间电介质中的空隙的产生，并且使诸如微划痕，点蚀或纵向的缺陷最小化 。 构成：在通过图案化形成在半导体衬底（100）上的衬垫氧化物层和抛光停止层形成的沟槽中形成用于氧化物层（106）的绝缘层。 执行用于形成浅沟槽隔离（STI）的化学机械抛光（CMP）工艺以限定有源区和非活性区。 有源区中的抛光停止层和焊盘氧化物层被去除以形成栅极氧化物层。 沉积用于栅电极的导电层。 通过使用非活性区域中的氧化物层作为抛光停止层，进行CMP工艺以使栅电极的导电层具有镶嵌结构。 硅化物层和栅极上绝缘层在衬底上堆叠和图案化以在有源区域和非活性区域中形成相应的栅极。 具有间隔物的栅极线形成在栅叠层的侧壁上，并且通过选择生长法在活性区的底表面上生长多晶硅层（120）。 通过覆盖蚀刻方法形成蚀刻停止层（122）。 在具有蚀刻停止层的半导体衬底上形成层间电介质并被回蚀刻。
-
公开(公告)号：KR100311075B1
公开(公告)日：2001-11-14
申请号：KR1019990050596
申请日：1999-11-15
Applicant: 삼성전자주식회사
IPC: G01J1/00
CPC classification number: G06K9/4661 , G06K9/4652 , G06T7/90 , G06T2207/10024 , H04N1/6077 , H04N1/6086
Abstract: 본발명은소프트웨어를사용하여조명색도를추정하는방법및 추정된조명색도를원하는다른조명색도로변환하는방법에관한것이다. 본발명에의한조명색도를추정하는방법은칼라영상을입력하는영상입력부; 입력된칼라영상으로부터하이라이트영역들을추출하는하이라이트검출부; 각하이라이트영역을색도좌표에투영하여색도좌표상에분포하는모양에대한기하학적표현변수들을계산하는하이라이트변수계산부; 입력된칼라영상에대하여인지광원추정방식에의해조명색도를추정하는인지광원조명색도추정부; 및기하학적표현변수들중 상기인지광원조명색도추정부에의해추정된조명색도주위에위치한소정수의기하학적표현변수들을선택하고, 선택된기하학적표현변수들을이용하여최종조명색도를계산하는수정색도계산부를포함한다. 본발명에의한인지광원과하이라이트를이용한조명색도추정방식은임의칼라영상으로부터조명색도를추정하는데 이용되며, 인지광원과하이라이트를결합하여구성한조합방식으로서, 인지광원으로부터추정되는비교적안정적인조명색도를기반으로하고, 하이라이트의특성을고려하여정밀도를향상시킨방식이다.
Abstract translation: 提供了一种用于估计光源色度的方法和装置，以及用于使用软件将所估计的发光色度转换成所需光源色度的方法和装置。 用于估计发光色度的装置包括用于接收彩色图像的图像输入单元，用于从彩色图像中提取高光区域的高光检测器，用于将高亮区域映射到色度坐标的高亮度参数计算器，并计算形状的几何呈现参数 色度坐标的分布，用于使用感知照明估计方案估计彩色图像中的光色度的感知照明光源色度估计器，以及用于选择由感知照明估计的光源色度附近的预定数量的几何呈现参数的正确色度计算器 使用所选择的几何呈现参数来计算最终光源色度。 用于使用感知照明和高光来估计光源色度的方法用于从彩色图像估计光源色度。 该方法是两种方法的组合，感知照明估计方案和高亮度估计方案，基于从感知照明估计的稳定光源色度来考虑高光特性，从而提高准确度。
-
公开(公告)号：KR1020010048113A
公开(公告)日：2001-06-15
申请号：KR1019990052659
申请日：1999-11-25
Applicant: 삼성전자주식회사
IPC: H01L21/302
Abstract: PURPOSE: A carrier film and a manufacturing method thereof are provided to allow improvement of polishing uniformity in a CMP process. CONSTITUTION: The carrier film(70) is used for a CMP apparatus including a carrier base(80) and a retaining ring(60) formed along circumference of a top surface of the carrier base(80). In the CMP apparatus, the carrier film(70) is attached to the top surface of the carrier base(80) inside the retaining ring(60) by an adhesive layer(82). The carrier film(70) has a difference in compressibility according to regions thereof, preferably the difference being about twice minimum compressibility. In addition, the carrier film(70) is composed of a thin strong polyester layer(62) and a surface layer(64) with pores(72,74) determining compressibility. The first pores(72) formed in outer portions of the carrier film(70) is greater in size than the second pores(74) formed in inner portions. The method includes coating the polyester layer(62) with a mixed layer of polymer and solvent while controlling the solvent, and then forming the pores(72,74) by volatilizing the solvent.
Abstract translation: 目的：提供载体膜及其制造方法，以提高CMP工艺中的抛光均匀性。 构成：载体膜（70）用于包括载体基体（80）和沿着载体基体（80）的顶表面的圆周形成的保持环（60）的CMP装置。 在CMP装置中，载体膜（70）通过粘合剂层（82）附接到保持环（60）内的载体基体（80）的顶表面。 载体膜（70）根据其区域具有不同的压缩性，优选的差是约两倍的最小压缩性。 此外，载体膜（70）由薄的强聚酯层（62）和具有确定压缩性的孔（72,74）的表面层（64）组成。 形成在载体膜（70）的外部的第一孔（72）的尺寸大于形成在内部的第二孔（74）的大小。 该方法包括在控制溶剂的同时，用聚合物和溶剂的混合层涂覆聚酯层（62），然后通过挥发溶剂形成孔（72,74）。
-
公开(公告)号：KR1020010046716A
公开(公告)日：2001-06-15
申请号：KR1019990050596
申请日：1999-11-15
Applicant: 삼성전자주식회사
IPC: G01J1/00
CPC classification number: G06K9/4661 , G06K9/4652 , G06T7/90 , G06T2207/10024 , H04N1/6077 , H04N1/6086
Abstract: PURPOSE: A device and a method for estimating and converting illuminating chromaticity using cognitive light source and highlight are provided to exactly estimate and convert illuminating chromaticity by considering characteristics of highlight based on relatively stable illuminating chromaticity estimated from cognitive light source. CONSTITUTION: A device for estimating and converting illuminating chromaticity using cognitive light source and highlight includes an image input part(40) for inputting color image, a highlight detecting part(41) for extracting highlight areas from the input color image, a highlight variable calculating part(42) projecting each highlight area to chromaticity coordinate and calculating geometrically expressive variables of shape on the chromaticity coordinate, a cognitive light source chromaticity estimating part(43) for illuminating chromaticity to the input color image through a cognitive light source estimating method, and an adjusted chromaticity calculating part(44) selecting geometrically expressive variables around the estimated illuminating chromaticity and calculating final illuminating chromaticity.
Abstract translation: 目的：提供一种用于使用认知光源和高光来估计和转换照明色度的装置和方法，以通过考虑基于从认知光源估计的相对稳定的照明色度的特征来精确估计和转换照明色度。 构成：使用认知光源和高光度来估计和转换照明色度的装置包括用于输入彩色图像的图像输入部分（40），用于从输入彩色图像中提取高光区域的高光检测部分（41），高亮变量计算 将每个高亮区域投影到色度坐标并计算色度坐标上的形状的几何表达变量的部分（42），通过认知光源估计方法对输入彩色图像照亮色度的认知光源色度估计部分（43），以及 调整色度计算部分（44）围绕所估计的照明色度选择几何表达变量并计算最终照明色度。
-
公开(公告)号：KR1020000077020A
公开(公告)日：2000-12-26
申请号：KR1020000018901
申请日：2000-04-11
Applicant: 삼성전자주식회사
IPC: H01L21/76
CPC classification number: C09G1/02 , C09K3/1463 , H01L21/31053 , H01L21/76224
Abstract: PURPOSE: A trench isolation method is provided to simplify a manufacturing process and reduce an aspect ratio in filling a trench as compared with a shallow trench isolation(STI) method by using a photoresist pattern as a mask for forming the trench, and to uniformly maintain chemical mechanical polishing(CMP) quantity for forming an isolation layer of a uniform thickness by using CeO2 based polishing agent having a large CMP selectivity of a silicon substrate and an oxidation layer. CONSTITUTION: A photoresist pattern is formed on a side of a bare silicon substrate(100). A predetermined depth of the substrate is etched to form a trench by using the photoresist pattern as an etching mask. The photoresist pattern is eliminated. An insulating layer is formed in the trench. A chemical mechanical polishing(CMP) process is performed regarding the resultant structure having the insulating layer by using slurry including CeO2 based polishing agent until the substrate is exposed.
Abstract translation: 目的：提供沟槽隔离方法，以便通过使用光致抗蚀剂图案作为形成沟槽的掩模，与浅沟槽隔离（STI）方法相比，简化制造工艺并缩小填充沟槽的纵横比，并且均匀地保持 通过使用具有大的CMP选择性的硅衬底和氧化层的CeO 2基抛光剂形成均匀厚度的隔离层的化学机械抛光（CMP）量。 构成：在裸硅衬底（100）的一侧上形成光致抗蚀剂图案。 通过使用光致抗蚀剂图案作为蚀刻掩模来蚀刻衬底的预定深度以形成沟槽。 消除光致抗蚀剂图案。 在沟槽中形成绝缘层。 通过使用包含CeO 2的研磨剂的浆料直到基材露出，对具有绝缘层的所得结构进行化学机械抛光（CMP）工艺。
-
-
-
-
-
-
-
-
-
Search Results
61
records
(took 0.031 seconds)
