公开(公告)号：DE69614501T2

公开(公告)日：2002-04-11

申请号：DE69614501

申请日：1996-03-08

Applicant: ST MICROELECTRONICS SRL ,  CONS RIC MICROELETTRONICA

Inventor： BRUCCOLERI MELCHIORRE ,  COSENTINO GAETANO ,  DEMICHELI MARCO ,  PISATI VALERIO

IPC: H03L7/099 ,  H03B1/00

Abstract: The system described comprises various circuit units (10, 11, 12) each having a capacitor (C0, C1, C2) and charging means (G0, G1, G2) for defining a quantity depending upon the ratio (I/C) between the charging current and the capacitance of the capacitors. In order to compensate automatically for deviations of the actual capacitances from the nominal capacitances due to fluctuations in the parameters of the integrated-circuit manufacturing process, the system has a phase-locked loop (PLL) which uses one (10) of the circuit units as an adjustable oscillator, and current transducer means (17) which regulate the charging currents of the capacitors (C1, C2) of the circuit units (11, 12) in dependence on the regulated charging current of the capacitor (C0) of the oscillator (10) or the error current of the PLL loop.

公开(公告)号：DE69803856D1

公开(公告)日：2002-03-21

申请号：DE69803856

申请日：1998-11-27

Applicant: ST MICROELECTRONICS SRL

Inventor： OTTINI DANIELE ,  BRUCCOLERI MELCHIORRE ,  BOLLATI GIACOMINO ,  DEMICHELI MARCO

IPC: H03M1/36 ,  H03M1/08 ,  H03M1/12 ,  H03M7/16

Abstract: A flash analog-to-digital converter comprising a bank of comparators (COMPi) with a differential output, generating a thermometric code and a bank of three-input (A,B,C) logic NOR gates (NORj) for correcting errors in said thermometric code, has enhanced immunity to noise and reduced imprecisions, especially at high conversion rates upon occurence of metastability within the comparators, by providing for a passive interface constituted by a plurality of voltage dividers (Ra-Rb), each connected between the noninverted output (out_p) of a respective comparator (COMPi) and the inverted output (out_n) of the comparator of higher order (COMPi+1) of said bank; a corresponding logic NOR gate (NORj) of said bank having a first input (A) coupled to the inverted output (out_n) of said respective comparator (COMPi-1), a second input (B) coupled to the noninverted output (out_p) of said comparator (COMPi) of higher order and a third input (C) coupled to an intermediate tap of said voltage divider (Ra-Rb).

公开(公告)号：ITMI20000469A1

公开(公告)日：2001-09-10

申请号：ITMI20000469

申请日：2000-03-09

Applicant: ST MICROELECTRONICS SRL

Inventor： BRUCCOLERI MELCHIORRE ,  PISATI VALERIO ,  DEMICHELI MARCO

IPC: G11B5/012 ,  G11B5/02 ,  G11B5/09 ,  H03F3/45

公开(公告)号：DE69520562T2

公开(公告)日：2001-07-12

申请号：DE69520562

申请日：1995-05-15

Applicant: ST MICROELECTRONICS SRL

Inventor： BRUCCOLERI MELCHIORRE ,  DEMICHELI MARCO ,  PATTI GIUSEPPE ,  PISATI VALERIO

IPC: H03M1/68 ,  G06J1/00 ,  H03M1/66 ,  H03M1/78 ,  H03M1/00

Abstract: A digital/analog quadratic converter (DACQ) composed by a pair of linear converters connected in cascade has a direct coupling of the output node of the first converter (DAC1) with a node of a R-2R type resistive network of the second converter (DAC2) corresponding to the LSB stage of the R-2R type resistive network. High impedance nodes, notably the input node of the second linear converter, are advantageously eliminated from the "current path" thus markedly reducing the problems of relatively long settling times of high impedance nodes (having intrinsically large parasitic capacitances associated therewith). The peculiar architecture of the quadratic converter provides also for a remarkable simplification of the circuit.

公开(公告)号：DE69227106D1

公开(公告)日：1998-10-29

申请号：DE69227106

申请日：1992-06-30

Applicant: ST MICROELECTRONICS SRL

Inventor： DEMICHELI MARCO ,  GOLA ALBERTO

IPC: H01L27/04 ,  H01L21/822 ,  H01L27/02

Abstract: A bias structure (30) for an integrated circuit comprising a first (31) and second (32) transistor having emitter terminals connected respectively to the supply (VCC) and to a terminal (35) of a resistor (6) whose potential, under certain operating conditions of the circuit, exceeds the supply voltage; base terminals connected to each other and to a current source (34); and collector terminals connected electrically (12) to the epitaxial tub housing the resistor. A resistor (33) is preferably provided between the two collectors, so that, when the potential of the terminal (35) of the resistor (6) exceeds the supply voltage (VCC), the second transistor (32) saturates and maintains the epitaxial tub of the resistor (6) at a potential close to that of the resistor terminal (35), thus preventing the parasitic diode formed between the resistor (6) and the epitaxial tub from being switched on.

公开(公告)号：DE69625192D1

公开(公告)日：2003-01-16

申请号：DE69625192

申请日：1996-08-07

Applicant: ST MICROELECTRONICS SRL

Inventor： BRUCCOLERI MELCHIORRE ,  DEMICHELI MARCO ,  DEMICHELI DAVIDE ,  PATTI GIUSEPPE

IPC: G11B5/55 ,  G11B5/596 ,  G11B21/10 ,  G11B5/00

Abstract: A servo-demodulator for a pair of alternating signals generated by a magnetic disc read head and indicative of the position of the read head in relation to the centre of a recorded track, comprising a peak detector (5) for successively and individually sampling the amplitude of each of a plurality of peaks of the said pair of alternating signals, and a capacitor (9) periodically connected to the output of the peak detector (5) by a control logic (7) for deriving a weighted average of the various successively sampled amplitudes, obtaining an averaged measure of amplitude with high immunity to noise.

公开(公告)号：IT1313379B1

公开(公告)日：2002-07-23

申请号：ITVA990002

申请日：1999-01-18

Applicant: ST MICROELECTRONICS SRL

Inventor： BOLLATI GIACOMINO ,  MARCHESE STEFANO ,  OTTINI DANIELE ,  DEMICHELI MARCO

IPC: H03F3/45

公开(公告)号：DE69330957D1

公开(公告)日：2001-11-22

申请号：DE69330957

申请日：1993-11-10

Applicant: ST MICROELECTRONICS SRL

Inventor： MOLONEY DAVID ,  GADDUCCI PAOLO ,  DEMICHELI MARCO ,  ALINI ROBERTO

IPC: G06F3/06 ,  G11B20/10 ,  G11B20/14 ,  H03M5/14

公开(公告)号：DE69614501D1

公开(公告)日：2001-09-20

申请号：DE69614501

申请日：1996-03-08

Applicant: ST MICROELECTRONICS SRL ,  CONS RIC MICROELETTRONICA

Inventor： BRUCCOLERI MELCHIORRE ,  COSENTINO GAETANO ,  DEMICHELI MARCO ,  PISATI VALERIO

IPC: H03L7/099 ,  H03B1/00

Abstract: The system described comprises various circuit units (10, 11, 12) each having a capacitor (C0, C1, C2) and charging means (G0, G1, G2) for defining a quantity depending upon the ratio (I/C) between the charging current and the capacitance of the capacitors. In order to compensate automatically for deviations of the actual capacitances from the nominal capacitances due to fluctuations in the parameters of the integrated-circuit manufacturing process, the system has a phase-locked loop (PLL) which uses one (10) of the circuit units as an adjustable oscillator, and current transducer means (17) which regulate the charging currents of the capacitors (C1, C2) of the circuit units (11, 12) in dependence on the regulated charging current of the capacitor (C0) of the oscillator (10) or the error current of the PLL loop.

公开(公告)号：ITVA990020A1

公开(公告)日：2001-01-16

申请号：ITVA990020

申请日：1999-07-16

Applicant: ST MICROELECTRONICS SRL

Inventor： DEMICHELI MARCO ,  BOLLATI GIACOMINO ,  DEMICHELI DAVIDE ,  MARCHESE STEFANO

IPC: G11B20/10

Abstract: A method is provided for defining programmed values of the boost and cut-off frequency parameters of a low pass filter of pre-equalization, of a read channel for a magnetic medium mass memory device, to ensure optimal functioning conditions of the adaptive filter of final equalization. The method includes pre-programming instantaneous digital values of the boost and cut-off frequency parameters of the low pass filter of pre-equalization for each magnetic medium, as a function of purposely sensed instantaneous operating parameters of the adaptive filter that carries out the definitive equalization of the signal during a trim scanning of the magnetic medium.