公开(公告)号：DE502005007446D1

公开(公告)日：2009-07-23

申请号：DE502005007446

申请日：2005-04-20

Applicant: OSRAM OPTO SEMICONDUCTORS GMBH

Inventor： EBERHARD FRANZ ,  STRAUSS UWE ,  ZEHNDER ULRICH ,  OBERSCHMID RAIMUND ,  WEIMAR ANDREAS

IPC: H01L33/32 ,  H01L33/38 ,  H01L33/40 ,  H01S5/22

公开(公告)号：DE102005056604A1

公开(公告)日：2007-03-29

申请号：DE102005056604

申请日：2005-11-28

Applicant: OSRAM OPTO SEMICONDUCTORS GMBH

Inventor： STRAUS PETER ,  WALTER ALEXANDER ,  WEIMAR ANDREAS

IPC: H01L33/02 ,  H01L33/22 ,  H01L33/32

Abstract: Semiconductor body comprises an active semiconductor layer sequence (4) based on a nitride compound semiconductor material which produces electromagnetic radiation and an epitaxially grown coupling layer (8) based on a nitride compound semiconductor material having openings (81) and made from the front side (9) of the semiconductor body. An independent claim is also included for a method for the production of a semiconductor body.

公开(公告)号：DE10312214A1

公开(公告)日：2004-10-07

申请号：DE10312214

申请日：2003-03-19

Applicant: OSRAM OPTO SEMICONDUCTORS GMBH

Inventor： WEIMAR ANDREAS ,  LEBER ANDREAS ,  HOES CHRISTINE ,  HAERLE VOLKER ,  LELL ALFRED ,  FISCHER HELMUT

IPC: H01L33/00 ,  H01S5/20 ,  H01S5/22 ,  H01S5/323

Abstract: Process for preparation of a mesa- or bridge structure in a layer or layer series (LLS) in which their sides are coated by the steps: (a) application of a sacrificial layer (SL) to the LLS; (b) application and structuring of a mask layer onto the SL; (c) partial removal of the SP and the LLS, especially by anisotropic etching; (d) selective removal of part of the SL layer from the sides; (e) application of a coating to the sides of the structures obtained. An independent claim is included for a process for preparation of a Ridge-Waveguide-Laser diode chip.

公开(公告)号：DE10218498A1

公开(公告)日：2003-11-20

申请号：DE10218498

申请日：2002-04-25

Applicant: OSRAM OPTO SEMICONDUCTORS GMBH

Inventor： BADER STEFAN ,  HAERLE VOLKER ,  MILLER STEPHAN ,  WEIMAR ANDREAS ,  LELL ALFRED

IPC: H01L21/033 ,  H01L21/20 ,  H01L21/762 ,  H01L21/205 ,  H01L21/78 ,  H01L33/00

Abstract: Production of a semiconductor layer comprises preparing a substrate, applying a mask layer (1) having openings (2) on the substrate, and growing a semiconductor layer. The openings are arranged in the mask layer in strips in groups (3a, 3b), which are laterally separated from one another by a separating region (4). An Independent claim is also included for an electronic component made from the above semiconductor layer.

公开(公告)号：DE10155442A1

公开(公告)日：2003-05-28

申请号：DE10155442

申请日：2001-11-12

Applicant: OSRAM OPTO SEMICONDUCTORS GMBH

Inventor： STRAUS UWE ,  HAHN BERTHOLD ,  BRUEDERL GEORG ,  LUGAUER HANS-JUERGEN ,  HAERLE VOLKER ,  WEIMAR ANDREAS

IPC: H01S5/042 ,  H01L21/285 ,  H01L21/363 ,  H01L29/20 ,  H01L29/45 ,  H01L33/14 ,  H01L33/32 ,  H01L33/40 ,  H01L21/283

Abstract: The invention relates to an ohmic contact structure comprising a metallisation layer (14) which is arranged on a semiconductor material (10). A contact layer is formed in the semiconductor material (10, said contact layer comprising a first partial region which is adjacent to the metallisation layer (14) and a second partial region (18) following the first partial region. The contact layer is doped in such a way that the doping concentration (N 2 ) in the first partial region (12) is higher than the doping concentration (N 1 ) in the second partial region (18).

公开(公告)号：WO2010017807A2

公开(公告)日：2010-02-18

申请号：PCT/DE2009001115

申请日：2009-08-06

Applicant: OSRAM OPTO SEMICONDUCTORS GMBH ,  WEIMAR ANDREAS

Inventor： WEIMAR ANDREAS

IPC: H01L33/44

CPC classification number: H01L33/44 ,  H01L33/486 ,  H01L33/60 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The invention relates to an optoelectronic component, comprising a carrier, a metal mirror layer disposed on the carrier, a first passivation layer disposed on a region of the metal mirror layer, a semiconductor layer disposed on the first passivation layer for generating an active zone during electric operation, a second passivation layer comprising two regions, wherein the first region is disposed on the top side of the semiconductor layer and the second region is disposed on the metal mirror layer, said second region being free of the semiconductor layer, wherein the first region and the second region of the second passivation layer are separated from each other by a region that surrounds the first passivation layer and is free of the second passivation layer.

Abstract translation: 包括衬底的光电元件，设置在所述载体上的金属镜层，布置在所述金属镜层的一部分上的第一钝化层，一个半导体层，以产生活性中的电操作区，设置在第一钝化层上，第二钝化层包括两个区域， 其中，在所述半导体层的上表面的第一区域，所述第二区域被布置在金属镜层，其是自由的半导体层，其中所述第一区域和所述第二钝化层的由外围到第一钝化层区域中的第二区域的上 这是免费的第二钝化层的，是分离的。

公开(公告)号：WO2008135013A3

公开(公告)日：2009-02-19

申请号：PCT/DE2008000703

申请日：2008-04-24

Applicant: OSRAM OPTO SEMICONDUCTORS GMBH ,  ENGL KARL ,  HOEPPEL LUTZ ,  EICHLER CHRISTOPH ,  SABATHIL MATTHIAS ,  WEIMAR ANDREAS

Inventor： ENGL KARL ,  HOEPPEL LUTZ ,  EICHLER CHRISTOPH ,  SABATHIL MATTHIAS ,  WEIMAR ANDREAS

IPC: H01L33/00 ,  H01L33/38 ,  H01L33/40

CPC classification number: H01L33/405 ,  H01L33/0079 ,  H01L33/387 ,  H01L33/46 ,  H01L2924/0002 ,  H01L2933/0016 ,  H01S5/0217 ,  H01S5/0224 ,  H01S5/0425 ,  H01S5/105 ,  H01S5/18308 ,  H01S5/18347 ,  H01S5/1835 ,  H01S5/18369 ,  H01S5/18391 ,  H01S5/3095 ,  H01L2924/00

Abstract: The invention relates to a semiconductor chip (1) having a semiconductor body (2) comprising a semiconductor layer sequence having an active region (25) designed to generate radiation. A mirror structure (3) is located on the semiconductor body (2), said mirror structure having a mirror layer (4) and a dielectric layer structure (5) located at least in areas between the mirror layer and the semiconductor body. A method for producing a semiconductor chip is also disclosed.

Abstract translation: 有一个半导体芯片（1），包括一个半导体主体（2），其包括具有用于产生辐射有源区（25）所表示的半导体层序列。 在半导体主体（2）有（3）包括反射镜层（4）的反射镜结构和至少部分地设置在反射镜层和介电层以在半导体本体结构（5）之间。 此外，被指定用于制造半导体芯片的方法。

公开(公告)号：WO03043092A3

公开(公告)日：2003-10-02

申请号：PCT/DE0204178

申请日：2002-11-12

Applicant: OSRAM OPTO SEMICONDUCTORS GMBH ,  BRUEDERL GEORG ,  HAHN BERTHOLD ,  HAERLE VOLKER ,  LUGAUER HANS-JUERGEN ,  STRAUSS UWE ,  WEIMAR ANDREAS

Inventor： BRUEDERL GEORG ,  HAHN BERTHOLD ,  HAERLE VOLKER ,  LUGAUER HANS-JUERGEN ,  STRAUSS UWE ,  WEIMAR ANDREAS

IPC: H01S5/042 ,  H01L21/285 ,  H01L21/363 ,  H01L29/20 ,  H01L29/45 ,  H01L33/14 ,  H01L33/32 ,  H01L33/40 ,  H01L21/28 ,  H01L33/00

CPC classification number: H01L29/452 ,  H01L21/28575 ,  H01L29/2003 ,  H01L33/14 ,  H01L33/325 ,  H01L33/40

Abstract: The invention relates to an ohmic contact structure comprising a metallisation layer (14) which is arranged on a semiconductor material (10). A contact layer is formed in the semiconductor material (10, said contact layer comprising a first partial region which is adjacent to the metallisation layer (14) and a second partial region (18) following the first partial region. The contact layer is doped in such a way that the doping concentration (N2) in the first partial region (12) is higher than the doping concentration (N1) in the second partial region (18).

Abstract translation: 本发明涉及一种具有设置在半导体材料（10），金属化（14）的欧姆接触结构，其中在所述半导体材料在相邻的（10）形成的接触层的金属镀层（14）的第一部分中的一个和所述第一 包括所述第二部分（18）的下游部分区域。 接触层被掺杂为所述第一部分（12）比所述掺杂浓度的掺杂浓度（N 2）（N 1）是在所述第二部分（18）。

公开(公告)号：WO0139282A3

公开(公告)日：2001-12-06

申请号：PCT/DE0004089

申请日：2000-11-20

Applicant: OSRAM OPTO SEMICONDUCTORS GMBH ,  HAERLE VOLKER ,  HAHN BERTHOLD ,  LUGAUER HANS JUERGEN ,  BOLAY HELMUT ,  BADER STEFAN ,  EISERT DOMINIK ,  STRAUSS UWE ,  VOELKL JOHANNES ,  ZEHNDER ULRICH ,  LELL ALFRED ,  WEIMAR ANDREAS

Inventor： HAERLE VOLKER ,  HAHN BERTHOLD ,  LUGAUER HANS-JUERGEN ,  BOLAY HELMUT ,  BADER STEFAN ,  EISERT DOMINIK ,  STRAUSS UWE ,  VOELKL JOHANNES ,  ZEHNDER ULRICH ,  LELL ALFRED ,  WEIMAR ANDREAS

IPC: H01L33/06 ,  H01L33/32 ,  H01S5/34 ,  H01S5/343 ,  H01L33/00

CPC classification number: H01L33/32 ,  B82Y20/00 ,  H01L33/06 ,  H01S5/3407 ,  H01S5/3408 ,  H01S5/34333

Abstract: The invention relates to an optical semiconductor device comprising a multiple quantum well structure, in which well layers and barrier layers consisting of different types of semiconductor layers are stacked alternately on top of one another. The invention is characterised in that the well layers (6a) have a first composition, based on a nitride semiconductor material with a first electron energy and the barrier layers (6b) have a second composition based on a nitride semiconductor material with a higher electron energy in relation to the first electron energy. An active radiative quantum well layer (6c) is located downstream of said layers in the epitaxial direction and the essentially non-radiative well layers (6a) positioned upstream, together with the barrier layers (6b) form a superlattice for said active quantum well layer.

Abstract translation: 具有多量子阱结构的光学半导体器件堆叠在阱层和不同类型的半导体层的势垒层交替层叠，所述阱层（6A）的基础上，具有第一电子能量和势垒层的氮化物半导体材料的第一组合物（6b）中的一个 的氮化物半导体材料的第二组合物被提供相对于所述第一电子能量更高的电子能量，其中一个辐射量子阱有源层（图6c）的下游布置为在生长的方向，为此，上游基本上无辐射阱层（6a）和阻挡层（6b）的形成的超晶格看到 ，