公开(公告)号：US20240190702A1

公开(公告)日：2024-06-13

申请号：US18534658

申请日：2023-12-10

Applicant: Robert Bosch GmbH

Inventor： Gregor Schuermann ,  Pascal Gieschke

IPC: B81C1/00

CPC classification number: B81C1/00833 ,  B81C2201/0171 ,  B81C2201/0177

Abstract: A semiconductor component. The semiconductor component has a semiconductor substrate, an insulation layer, and a first monocrystalline silicon layer. The insulation layer is arranged on the semiconductor substrate, and the first monocrystalline silicon layer is arranged on the insulation layer and at least one first region that extends starting from the first monocrystalline silicon layer up to a surface of the semiconductor substrate. The at least one first region includes second monocrystalline silicon.

公开(公告)号：US09656859B2

公开(公告)日：2017-05-23

申请号：US14687943

申请日：2015-04-16

Applicant: David J. Meyer ,  Brian P. Downey

Inventor： David J. Meyer ,  Brian P. Downey

IPC: B81C1/00

CPC classification number: B81C1/00539 ,  B81C1/00936 ,  B81C2201/0107 ,  B81C2201/0132 ,  B81C2201/0143 ,  B81C2201/0159 ,  B81C2201/0177

Abstract: A process for fabricating a suspended microelectromechanical system (MEMS) structure comprising epitaxial semiconductor functional layers that are partially or completely suspended over a substrate. A sacrificial release layer and a functional device layer are formed on a substrate. The functional device layer is etched to form windows in the functional device layer defining an outline of a suspended MEMS device to be formed from the functional device layer. The sacrificial release layer is then etched with a selective release etchant to remove the sacrificial release layer underneath the functional layer in the area defined by the windows to form the suspended MEMS structure.

公开(公告)号：US20160304340A1

公开(公告)日：2016-10-20

申请号：US14687943

申请日：2015-04-16

Applicant: David J. Meyer ,  Brian P. Downey

Inventor： David J. Meyer ,  Brian P. Downey

IPC: B81C1/00

CPC classification number: B81C1/00539 ,  B81C1/00936 ,  B81C2201/0107 ,  B81C2201/0132 ,  B81C2201/0143 ,  B81C2201/0159 ,  B81C2201/0177

Abstract: A process for fabricating a suspended microelectromechanical system (MEMS) structure comprising epitaxial semiconductor functional layers that are partially or completely suspended over a substrate. A sacrificial release layer and a functional device layer are formed on a substrate. The functional device layer is etched to form windows in the functional device layer defining an outline of a suspended MEMS device to be formed from the functional device layer. The sacrificial release layer is then etched with a selective release etchant to remove the sacrificial release layer underneath the functional layer in the area defined by the windows to form the suspended MEMS structure.

Abstract translation: 一种用于制造悬浮微机电系统（MEMS）结构的方法，其包括部分或完全悬浮在衬底上的外延半导体功能层。 在基板上形成牺牲剥离层和功能元件层。 功能器件层被蚀刻以在功能器件层中形成窗口，其限定要由功能器件层形成的悬置的MEMS器件的轮廓。 然后用选择性释放蚀刻剂蚀刻牺牲剥离层，以去除由窗口限定的区域中的功能层下方的牺牲剥离层，以形成悬浮的MEMS结构。

公开(公告)号：US08629011B2

公开(公告)日：2014-01-14

申请号：US13161194

申请日：2011-06-15

Applicant: Brett M. Diamond ,  Franz Laermer ,  Andrew J. Doller ,  Michael J. Daley ,  Phillip Sean Stetson ,  John M. Muza

Inventor： Brett M. Diamond ,  Franz Laermer ,  Andrew J. Doller ,  Michael J. Daley ,  Phillip Sean Stetson ,  John M. Muza

IPC: H01L21/339

CPC classification number: H04R19/005 ,  B81B2201/0257 ,  B81B2203/0127 ,  B81C1/00158 ,  B81C2201/0119 ,  B81C2201/0177 ,  B81C2203/0714 ,  B81C2203/075 ,  B81C2203/0778 ,  H04R19/04 ,  H04R31/00

Abstract: A method of manufacturing a microphone using epitaxially grown silicon. A monolithic wafer structure is provided. A wafer surface of the structure includes poly-crystalline silicon in a first horizontal region and mono-crystalline silicon in a second horizontal region surrounding a perimeter of the first horizontal region. A hybrid silicon layer is epitaxially deposited on the wafer surface. Portions of the hybrid silicon layer that contact the poly-crystalline silicon use the poly-crystalline silicon as a seed material and portions that contact the mono-crystalline silicon use the mono-crystalline silicon as a seed material. As such, the hybrid silicon layer includes both mono-crystalline silicon and poly-crystalline silicon in the same layer of the same wafer structure. A CMOS/membrane layer is then deposited on top of the hybrid silicon layer.

Abstract translation: 使用外延生长硅制造麦克风的方法。 提供了一种单片晶圆结构。 该结构的晶片表面包括第一水平区域中的多晶硅和围绕第一水平区域的周边的第二水平区域中的单晶硅。 杂化硅层外延沉积在晶片表面上。 接触多晶硅的混合硅层的部分使用多晶硅作为种子材料，并且接触单晶硅的部分使用单晶硅作为种子材料。 这样，混合硅层在同一晶片结构的相同层中包括单晶硅和多晶硅两者。 然后将CMOS /膜层沉积在混合硅层的顶部。

公开(公告)号：US20130106875A1

公开(公告)日：2013-05-02

申请号：US13287801

申请日：2011-11-02

Applicant: Rihui HE ,  Ana Rangelova LONDERGAN ,  Evgeni Petrovich GOUSEV

Inventor： Rihui HE ,  Ana Rangelova LONDERGAN ,  Evgeni Petrovich GOUSEV

IPC: G06F13/14 ,  G02B26/00 ,  H05K3/00

CPC classification number: B81C1/00333 ,  B81C2201/0177 ,  B81C2201/0181 ,  B81C2203/0145

Abstract: This disclosure provides systems, methods, and apparatus for fabricating electromechanical systems devices. In one aspect, a method of sealing an electromechanical systems device includes etching a sacrificial layer. The sacrificial layer is formed between a surface of a substrate and a shell layer and is etched through etch holes in the shell layer formed over the electromechanical systems device. The etch holes in the shell layer have a diameter greater than about one micron. The shell layer is then treated. A seal layer is deposited on the treated shell layer. The seal layer hermetically seals the electromechanical systems device.

Abstract translation: 本公开提供了用于制造机电系统装置的系统，方法和装置。 一方面，密封机电系统装置的方法包括蚀刻牺牲层。 牺牲层形成在基底的表面和壳层之间，并通过在机电系统器件上形成的壳层中的蚀刻孔进行蚀刻。 壳层中的蚀刻孔的直径大于约1微米。 然后对壳层进行处理。 密封层沉积在经处理的壳层上。 密封层密封机电系统装置。

公开(公告)号：US20120319219A1

公开(公告)日：2012-12-20

申请号：US13161194

申请日：2011-06-15

Applicant: Brett M. Diamond ,  Franz Laermer ,  Andrew J. Doller ,  Michael J. Daley ,  Phillip Sean Stetson ,  John M. Muza

Inventor： Brett M. Diamond ,  Franz Laermer ,  Andrew J. Doller ,  Michael J. Daley ,  Phillip Sean Stetson ,  John M. Muza

IPC: H01L21/20 ,  H01L29/84

CPC classification number: H04R19/005 ,  B81B2201/0257 ,  B81B2203/0127 ,  B81C1/00158 ,  B81C2201/0119 ,  B81C2201/0177 ,  B81C2203/0714 ,  B81C2203/075 ,  B81C2203/0778 ,  H04R19/04 ,  H04R31/00

Abstract: A method of manufacturing a microphone using epitaxially grown silicon. A monolithic wafer structure is provided. A wafer surface of the structure includes poly-crystalline silicon in a first horizontal region and mono-crystalline silicon in a second horizontal region surrounding a perimeter of the first horizontal region. A hybrid silicon layer is epitaxially deposited on the wafer surface. Portions of the hybrid silicon layer that contact the poly-crystalline silicon use the poly-crystalline silicon as a seed material and portions that contact the mono-crystalline silicon use the mono-crystalline silicon as a seed material. As such, the hybrid silicon layer includes both mono-crystalline silicon and poly-crystalline silicon in the same layer of the same wafer structure. A CMOS/membrane layer is then deposited on top of the hybrid silicon layer.

Abstract translation: 使用外延生长硅制造麦克风的方法。 提供了一种单片晶圆结构。 该结构的晶片表面包括第一水平区域中的多晶硅和围绕第一水平区域的周边的第二水平区域中的单晶硅。 杂化硅层外延沉积在晶片表面上。 接触多晶硅的混合硅层的部分使用多晶硅作为种子材料，并且接触单晶硅的部分使用单晶硅作为种子材料。 这样，混合硅层在同一晶片结构的相同层中包括单晶硅和多晶硅两者。 然后将CMOS /膜层沉积在混合硅层的顶部。

公开(公告)号：US07972888B1

公开(公告)日：2011-07-05

申请号：US12813503

申请日：2010-06-10

Applicant: Gang Li ,  Wei Hu

Inventor： Gang Li ,  Wei Hu

IPC: H01L21/00

CPC classification number: G01L9/0042 ,  B81B2201/0235 ,  B81B2201/0264 ,  B81B2203/0118 ,  B81B2203/0315 ,  B81B2203/0376 ,  B81C1/00182 ,  B81C2201/0132 ,  B81C2201/0177 ,  B81C2203/0118 ,  G01P15/0802 ,  G01P15/123 ,  G01P2015/0828

Abstract: A method for manufacturing a MEMS sensor and its thin film and cantilever beam includes steps of etching a top surface of a single-crystal silicon wafer in combination of a deposition process, an outer epitaxial growth process, a wet etching process and a back etching process in order to form a pressure-sensitive single-crystal silicon film, a cantilever beam, a mass block, a front chamber, a back chamber and trenches connecting the front and the back chambers. The single-crystal silicon film is prevented from etching so that the thickness thereof can be well controlled. The method of the present invention can be used to replace the traditional method which forms the back chamber and the pressure-sensitive single-crystal silicon film from the bottom surface of the silicon wafer.

Abstract translation: MEMS传感器及其薄膜和悬臂梁的制造方法包括以下步骤：将沉积工艺，外部外延生长工艺，湿蚀刻工艺和背蚀刻工艺结合在一起蚀刻单晶硅晶片的顶表面 以形成压敏单晶硅膜，悬臂梁，质量块，前室，后室和连接前室和后室的沟槽。 防止单晶硅膜蚀刻，从而可以良好地控制其厚度。 本发明的方法可以用于代替从硅晶片的底表面形成后室和压敏单晶硅膜的传统方法。

公开(公告)号：US07906439B2

公开(公告)日：2011-03-15

申请号：US12488898

申请日：2009-06-22

Applicant: François Perruchot ,  Bernard Diem ,  Vincent Larrey ,  Laurent Clavelier ,  Emmanuel Defay

Inventor： François Perruchot ,  Bernard Diem ,  Vincent Larrey ,  Laurent Clavelier ,  Emmanuel Defay

IPC: H01L21/302 ,  H01L21/461

CPC classification number: B81C1/00507 ,  B81B2201/0271 ,  B81C2201/0115 ,  B81C2201/0136 ,  B81C2201/0177 ,  B81C2203/0136 ,  B81C2203/0145 ,  H03H3/0072 ,  H03H9/175 ,  H03H9/2436 ,  Y10S438/933

Abstract: The invention provides a method of fabricating and electromechanical device having an active element on at least one substrate, the method having the steps of: a) making a heterogeneous substrate having a first portion, an interface layer, and a second portion, the first portion including one or more buried zones sandwiched between first and second regions formed in a first monocrystalline material, the first region extending to the surface of the first portion, and the second region extending to the interface layer, at least one said buried zone being made at least in part out of a second monocrystalline material so as to make it selectively attackable relative to the first and second regions; b) making openings from the surface of the first portion and through the first region, which openings open out to at least one said buried zone; and c) etching at least part of at least one buried zone to form at least one cavity so as to define at least one active element that is at least a portion of the second region between said cavity and said interface layer; wherein the first and second portions of the substrate are constituted respectively from first and second substrates that are assembled together by bonding, at least one of them including at least one said interface layer over at least a fraction of its surface.

Abstract translation: 本发明提供一种在至少一个基板上具有有源元件的制造方法和机电装置，该方法具有以下步骤：a）制造具有第一部分，界面层和第二部分的非均相基底，第一部分 包括夹在形成于第一单晶材料中的第一和第二区域之间的一个或多个掩埋区域，第一区域延伸到第一部分的表面，第二区域延伸到界面层，至少一个所述掩埋区域 至少部分地由第二单晶材料制成，以使其相对于第一和第二区域选择性地具有攻击性; b）从所述第一部分的表面和所述第一区域制造开口，所述第一区域开放到至少一个所述掩埋区域; 以及c）蚀刻至少一个掩埋区域的至少一部分以形成至少一个空腔，以便限定至少一个有源元件，所述至少一个有源元件是所述腔和所述界面层之间的第二区域的至少一部分; 其中所述基板的第一和第二部分分别由通过粘接而组装在一起的第一和第二基板构成，其中至少一个在其表面的至少一部分上包括至少一个所述界面层。

公开(公告)号：US07629657B2

公开(公告)日：2009-12-08

申请号：US11064658

申请日：2005-02-23

Applicant: Aaron Partridge ,  Markus Lutz

Inventor： Aaron Partridge ,  Markus Lutz

IPC: H01L29/84

CPC classification number: B81C1/00047 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81C2201/0109 ,  B81C2201/0177 ,  B81C2203/0145 ,  G01L9/0045 ,  G01L9/0054 ,  G01L9/0073

Abstract: A method for making a pressure sensor by providing a wafer including a base silicon layer, a buried sacrificial layer, and a top silicon layer. The top silicon layer is arranged over the buried sacrificial layer and the buried sacrificial layer is arranged over the base silicon layer. Etching vents through the top silicon layer to the buried sacrificial layer and removing a portion of the buried sacrificial layer. Depositing silicon to seal the vents and arranging a strain gauge or a capacitance contact on the wafer. A method for making a pressure sensor including providing a bulk wafer and depositing a sacrificial layer on the bulk wafer. Depositing silicon on the sacrificial layer and the bulk wafer to form an encapsulation layer. Etching vents through the encapsulation layer to the sacrificial layer and removing the sacrificial layer. Closing the vents with a silicon deposition and arranging a strain gauge or a capacitance contact on the encapsulation layer. A pressure sensing device including a substrate, an encapsulation layer with vents, and voids between the substrate and the encapsulation layer. A portion of the encapsulation layer above the voids forms a membrane and deposited silicon plugs fill the vents. A strain gauge or a top capacitive contact arranged on the membrane.

Abstract translation: 一种通过提供包括基底硅层，掩埋牺牲层和顶部硅层的晶片来制造压力传感器的方法。 顶层硅层布置在掩埋牺牲层上，并且掩埋牺牲层布置在基底硅层上。 蚀刻通孔通过顶部硅层到掩埋牺牲层并去除一部分掩埋牺牲层。 沉积硅以密封通风口并在晶片上布置应变计或电容接触。 一种用于制造压力传感器的方法，包括提供体晶片并在体晶片上沉积牺牲层。 在牺牲层和体晶片上沉积硅以形成封装层。 蚀刻通过封装层到达牺牲层并去除牺牲层。 用硅沉积封闭通风口，并在封装层上布置应变计或电容接触。 一种压力感测装置，包括基底，通气孔的封装层以及基底和封装层之间的空隙。 空隙之上的封装层的一部分形成膜并且沉积的硅塞填充通风口。 布置在膜上的应变计或顶部电容接触。

公开(公告)号：US5576250A

公开(公告)日：1996-11-19

申请号：US172827

申请日：1993-12-27

Applicant: Bernard Diem ,  Marie-Therese Delaye

Inventor： Bernard Diem ,  Marie-Therese Delaye

IPC: G01P15/125 ,  B81B3/00 ,  G01P15/08 ,  G01P15/13 ,  H01L21/306 ,  H01L29/84 ,  H01L21/465

CPC classification number: B81C1/0015 ,  B81B3/0051 ,  G01P15/0802 ,  B81B2201/0235 ,  B81B2203/0109 ,  B81B2203/053 ,  B81C2201/0166 ,  B81C2201/0177 ,  G01P2015/0814 ,  G01P2015/0828 ,  Y10S73/01 ,  Y10S73/04

Abstract: A process for the production of accelerometers using the silicon on insulator method. The process comprises the following stages: a) producing a conductive monocrystalline silicon film on a silicon substrate and separated from the latter by an insulating layer; b) etching the silicon film and the insulating layer up to the substrate in order to fix the shape of the mobile elements and the measuring devices; c) producing electric contacts for the measuring devices; d) partial elimination of the insulating layer in order to free the mobile elements, the remainder of the insulating layer rendering integral the substrate and the moving elements.

Abstract translation: 使用绝缘体上的方法生产加速度计的方法。 该方法包括以下步骤：a）在硅衬底上制造导电单晶硅膜，并通过绝缘层与其分离; b）将硅膜和绝缘层蚀刻直到基板，以固定移动元件和测量装置的形状; c）产生用于测量装置的电触头; d）绝缘层的部分消除以便移动移动元件，绝缘层的其余部分使基板和移动元件成为一体。