Abstract:
본 발명은 그 구조가 간단하고 간단한 제조공정으로 용이하게 제조될 수 있는 디스플레이 장치 및 이의 제조 방법을 제공하는 것을 목적으로 하며, 이 목적을 달성하기 위하여 본 발명은, 소정의 간격을 두고 이격되며 서로 마주보는 제1기판 및 제2기판과, 상기 제1기판 및 상기 제2기판과 함께 발광셀을 한정하는 격벽과, 상기 발광셀 내에 배치되는 애노드전극과, 상기 제1기판 및 상기 제2기판 중 어느 하나의 안쪽 면에 배치되는 도전성 실리콘층과, 적어도 일부가 상기 도전성 실리콘층에 배치되는 산화된 다공성 실리콘층과, 상기 발광셀 내에 배치되는 형광체층과, 상기 발광셀 내에 있는 가스를 포함하는 디스플레이 장치 및 이의 제조 방법을 제공한다.
Abstract:
There is provided a diamond n-type semiconductor whose carrier concentration change amount is sufficiently reduced in a wide temperature range. The diamond n-type semiconductor includes a diamond substrate and a diamond semiconductor formed on the main surface of the diamond substrate and judged to be n-type. The diamond semiconductor has a carrier concentration (electron concentration) temperature dependency showing a negative correlation and a hole coefficient temperature dependency showing a positive correlation at a part of the temperature range where it is judged to be n-type. The diamond n-type semiconductor having such characteristics can be obtained, for example, by forming a diamond semiconductor doped with a plenty of donor element while introducing impurities other than the donor element into the diamond substrate.
Abstract:
A method for growing on a substrate strongly aligned uniform cross-section semiconductor composite nanocolumns is disclosed. The method includes: (a) forming faceted pyramidal pits on the substrate surface; (b) initiating nucleation on the facets of the pits; and; (c) promoting the growth of nuclei toward the center of the pits where they coalesce with twinning and grow afterwards together as composite nanocolumns. Multi-quantum-well, core-shell nanocolumn heterostructures can be grown on the sidewalls of the nanocolumns. Furthermore, a continuous semiconductor epitaxial layer can be formed through the overgrowth of the nanocolumns to facilitate fabrication of high-quality planar device structures or for light emitting structures.
Abstract:
A method of forming a cathodic device includes the steps of forming a p-type layer (18) and an n-type layer (20) below a surface (20) of a substrate. The material has a conduction band which is at an energy level no more than 0.5 electron-Volts (eV) below the lowest vacuum energy level. The layers are formed so that they are in contact, with the p-type layer located between the surface and the n-type layer, and so that they form a p-n junction. The thickness of the p-type layer is somewhat less than the average distance which an electron injected into the p-type layer travels by diffusion and the thickness of the negatively charged depletion layer in the p-type layer is such that the difference between the thickness of the p-type layer and the thickness of the negatively charged depletion layer in the p-type layer is substantially less than the said average distance.