公开(公告)号：US5848466A

公开(公告)日：1998-12-15

申请号：US752019

申请日：1996-11-19

Applicant: Daniel Joseph Viza ,  Dennis Brian Miller ,  William M. Beckenbaugh ,  Conrad S. Monroe ,  Kent W. Hansen

Inventor： Daniel Joseph Viza ,  Dennis Brian Miller ,  William M. Beckenbaugh ,  Conrad S. Monroe ,  Kent W. Hansen

IPC: H01L21/60 ,  H01L23/485 ,  H01L23/498 ,  H05K1/11 ,  H05K3/32 ,  H05K3/40 ,  H05K3/34

CPC classification number: H05K1/112 ,  H01L23/49827 ,  H01L23/4985 ,  H01L24/11 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/11 ,  H01L2224/1134 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16237 ,  H01L2224/81801 ,  H01L2224/83101 ,  H01L2224/83856 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H05K2201/0305 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/10575 ,  H05K2201/10674 ,  H05K2203/1189 ,  H05K2203/1446 ,  H05K3/321 ,  H05K3/4038 ,  Y10T29/49144 ,  Y10T29/49165

Abstract: A microelectronic assembly (10) is formed by bonding an integrated circuit component (20) to a substrate (12). The substrate (12) includes a via (22) and a metal contact (24) closing the via (22). A bonding agent (14), such as a solder paste or a conductive epoxy, is dispensed into the via (22) adjacent the metal contact (24). A carrier tape (16) that includes partially-cured films (18) is placed onto the substrate (12) such that the film (18) covers the via (22) and forms a gap (28) between the substrate (12) and the film (18). The integrated circuit component (20) is superposed onto the substrate (12) such that conductive bumps (26) on the integrated circuit component (20) perforate and extend through the film (18) and contact the bonding agent (14) in the via (22). Portions (44) displaced during perforation are received in the gap (28). The film (18) is thus interposed between the substrate (12) and the integrated circuit component (20). The preassembly (38) is then heated to bond the bonding agent (14) to the metal contact (24) and to cure the film (18) to form an integral assembly (10).

Abstract translation: 通过将集成电路部件（20）接合到基板（12）上而形成微电子组件（10）。 基板（12）包括通孔（22）和闭合通孔（22）的金属触头（24）。 诸如焊膏或导电环氧树脂的粘合剂（14）被分配到与金属接触件（24）相邻的通孔（22）中。 将包括部分固化膜（18）的载带（16）放置在基板（12）上，使得膜（18）覆盖通孔（22），并在基板（12）和 电影（18）。 集成电路部件（20）被叠加到基板（12）上，使得集成电路部件（20）上的导电凸块（26）穿透并延伸穿过薄膜（18）并与通孔中的粘结剂（14）接触 （22）。 穿孔期间移位的部分（44）被接收在间隙（28）中。 因此，膜（18）被插入在基板（12）和集成电路部件（20）之间。 然后将预组件（38）加热以将粘合剂（14）粘合到金属接触件（24）上并固化膜（18）以形成整体组件（10）。

公开(公告)号：EP1921910B1

公开(公告)日：2012-08-08

申请号：EP07021365.7

申请日：2007-11-02

Applicant: SEMIKRON Elektronik GmbH & Co. KG

Inventor： Lederer, Marco ,  Popp, Rainer

IPC: H05K3/32 ,  H05K5/06

CPC classification number: H05K5/069 ,  H05K1/141 ,  H05K3/325 ,  H05K2201/10575 ,  H05K2203/1147

公开(公告)号：EP1921908B1

公开(公告)日：2012-08-01

申请号：EP07021363.2

申请日：2007-11-02

Applicant: SEMIKRON Elektronik GmbH & Co. KG

Inventor： Lederer, Marco ,  Popp, Rainer

IPC: H05K1/11 ,  H05K3/32 ,  H05K7/14

CPC classification number: H05K3/325 ,  H05K1/141 ,  H05K2201/10575 ,  H05K2203/1147

公开(公告)号：EP1921908A3

公开(公告)日：2009-12-02

申请号：EP07021363.2

申请日：2007-11-02

Applicant: SEMIKRON Elektronik GmbH & Co. KG

Inventor： Lederer, Marco ,  Popp, Rainer

IPC: H05K7/14

CPC classification number: H05K3/325 ,  H05K1/141 ,  H05K2201/10575 ,  H05K2203/1147

Abstract: Es wird eine Schaltungsanordnung (10) mit einem Leistungsmodul (12) beschrieben, das mit einer Leiterplatte (14) kombiniert ist. Das Leistungsmodul (12) und die Leiterplatte (14) sind zwischen einem Kühlkörper (16) und einer Presseinrichtung (18) vorgesehen und miteinander durch Druckkontaktelemente (28) kontaktiert. Das Leistungsmodul (12) weist mindestens ein Modul-Plattenelement (22) und ein Gehäuse (24) auf, das mit Schächten (26) für die Druckkontaktelemente (28) ausgebildet ist. Die Schächte (26) münden aus der der Leiterplatte (14) zugewandten Grundfläche (30) des Gehäuses (24) an Mündungsöffnungen (40) aus. Die Grundfläche (30) des Gehäuses (24) ist um die Mündungsöffnungen (40) herum mit Öffnungs-Dichtrippen (42) ausgebildet. Ausserdem kann die Grundfläche (30) des Gehäuses (24) entlang ihres Aussenrandes (36) eine umlaufende Randdichtrippe (38) aufweisen. Ferner kann zwischen der Leiterplatte (14) und der Grundfläche (30) des Gehäuses (24) ein Abdichtflächenelement (32) vorgesehen sein.

公开(公告)号：EP0835046B1

公开(公告)日：2003-08-27

申请号：EP97914624.8

申请日：1997-04-07

Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

Inventor： KUMAGAI, Koichi ,  WADA, Yoshinori ,  EDAHIRO, Teruki

IPC: H05K1/02 ,  H05K3/04 ,  H05K3/20

CPC classification number: H05K3/202 ,  H05K1/0393 ,  H05K3/281 ,  H05K3/3442 ,  H05K3/3447 ,  H05K2201/10575 ,  H05K2203/0264 ,  H05K2203/063 ,  Y10S428/901 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49149 ,  Y10T428/24917

Abstract: A masking film (3) having desired apertures (2) is applied to a metal wiring board (1). With this construction, a conventional insulation substrate which is to be a thick base and a conventional resist layer can be eliminated. Further, when the terminal parts (T) of the metal wiring board (1) are bent, connection terminals which are substituted for connector terminals for the connection to another board are formed integrally to eliminate the connector terminals. Thus, a low cost component mounting board is provided.

公开(公告)号：JP2008527733A

公开(公告)日：2008-07-24

申请号：JP2007550846

申请日：2006-01-16

Applicant: サーマストレイト リミテッド

Inventor： ロバート モース

IPC: H01L23/36 ,  H05K1/05 ,  H05K1/09 ,  H05K3/06 ,  H05K3/10 ,  H05K3/20 ,  H05K3/38 ,  H05K3/44 ,  H05K3/46

CPC classification number: C25D11/04 ,  C25D11/026 ,  H01L2924/0002 ,  H05K1/053 ,  H05K1/095 ,  H05K3/06 ,  H05K3/108 ,  H05K3/20 ,  H05K3/386 ,  H05K3/4664 ,  H05K3/4685 ,  H05K2201/017 ,  H05K2201/10166 ,  H05K2201/10575 ,  H05K2203/0315 ,  H05K2203/095 ,  H05K2203/121 ,  H01L2924/00

Abstract: 【解決手段】 本体の少なくとも１つの表面部が、プラズマ電解酸化（ＰＥＯ）により生じる被覆部を有する金属本体部を含む電力基板。 被覆部は、金属本体部の表面部に隣接する高密度で堅固な層と、多孔性の外層部と、を含む。 電導素子はこの被覆部に装着される。
【選択図】図２

公开(公告)号：JP2003318524A

公开(公告)日：2003-11-07

申请号：JP2002118905

申请日：2002-04-22

Applicant: Nec Corp ,  日本電気株式会社

Inventor： MOMOKAWA HIROKI

IPC: H05K1/03 ,  H05K1/11 ,  H05K3/30 ,  H05K3/34

CPC classification number: H05K3/3452 ,  H05K3/301 ,  H05K3/306 ,  H05K3/3447 ,  H05K3/3463 ,  H05K2201/099 ,  H05K2201/10568 ,  H05K2201/10575 ,  H05K2201/10901 ,  H05K2201/10909 ,  H05K2201/2036 ,  H05K2201/2081 ,  H05K2203/0182 ,  H05K2203/0577 ,  H05K2203/0588 ,  H05K2203/1189 ,  H05K2203/1394

Abstract: PROBLEM TO BE SOLVED: To inexpensively prevent peeling of a land even when lead-free solder is used. SOLUTION: A wiring board is provided with a substrate 11 having a through hole 12, a first conductive film 13 coating the internal surface of the hole 12, and the land 15 formed on the surface of the substrate 11 around the opening of the hole 12 and composed of a second conductive film connected to the first conductive film 13. The wiring board is also provided with circuit wiring 16 formed on the surface of the substrate 11 and connected to the land 15, a protective film 17 covering the wiring 16, and a coating member 18 coating at least part of the outer peripheral edge 15A of the land 15. COPYRIGHT: (C)2004,JPO

Abstract translation: 要解决的问题：即使使用无铅焊料，也能廉价地防止焊盘的剥离。 解决方案：布线板设置有具有通孔12的基板11，涂覆孔12的内表面的第一导电膜13和形成在基板11的表面周围的开口 孔12，由与第一导电膜13连接的第二导电膜构成。布线基板还设置有电路布线16，其形成在基板11的表面上并与凸台15连接，保护膜17覆盖布线 16，以及涂覆部分18，其涂覆了陆地15的外周边缘15A的至少一部分。版权所有（C）2004，JPO

公开(公告)号：US09664569B2

公开(公告)日：2017-05-30

申请号：US14714005

申请日：2015-05-15

Applicant: Google Inc.

Inventor： Adam Mittleman ,  Ian Charles Smith ,  Daniel Adam Warren ,  William Raeming Dong ,  Jeff Wheeler

IPC: G01N21/00 ,  G01J5/06 ,  H05K1/02 ,  G01J5/00 ,  G01J5/10 ,  G01J5/02 ,  G01J5/04 ,  G08B13/189

CPC classification number: G01J5/06 ,  G01J5/0014 ,  G01J5/0205 ,  G01J5/04 ,  G01J5/10 ,  G08B13/189 ,  G08B13/191 ,  H05K1/0201 ,  H05K1/0298 ,  H05K2201/09063 ,  H05K2201/093 ,  H05K2201/09363 ,  H05K2201/0969 ,  H05K2201/10106 ,  H05K2201/10151 ,  H05K2201/10522 ,  H05K2201/10575 ,  H05K2201/10636 ,  Y02P70/611

Abstract: A multilayered circuit board having a metal-free region vertically extending through at least a portion of a conductive layer, which lies generally parallel to a horizontal plane, vertically spaced from an outer surface. Heat-emitting and heat-sensitive components are mounted on the outer surface. The heat-emitting component is vertically and laterally spaced from the metal-free region, whereas the heat-sensitive component is vertically spaced and laterally aligned within the metal-free region such that the metal-free region is a thermal barrier that shields heat-sensitive component from radial heat flowing from the heat-emitting component.

公开(公告)号：US20150116954A1

公开(公告)日：2015-04-30

申请号：US14066163

申请日：2013-10-29

Applicant: LARVIEW TECHNOLOGIES CORP.

Inventor： SHIN-DAR JAN

IPC: H05K1/18

CPC classification number: H05K1/18 ,  H05K1/0274 ,  H05K1/181 ,  H05K2201/10121 ,  H05K2201/10151 ,  H05K2201/10575 ,  Y02P70/611

Abstract: An image sensor module is provided. The image sensor module includes a circuit board, a flat material, an image sensing chip, a holder and a covering plate. The flat material disposed on an assembling surface of the circuit board has a supporting surface and a bottom surface opposite thereto. The image sensing chip with its base surface facing to the supporting surface is configured on the supporting surface. The holder is disposed on the flat material, and the bottom plane of the holder faces to the supporting surface. The supporting surface is used to make the base surface parallel to the bottom plane. The covering plate is arranged on the holder to seal the image sensing chip.

Abstract translation: 提供图像传感器模块。 图像传感器模块包括电路板，扁平材料，图像感测芯片，保持器和覆盖板。 设置在电路板的组装表面上的扁平材料具有支撑表面和与其相对的底表面。 其基面朝向支撑表面的图像感测芯片被配置在支撑表面上。 保持器设置在平坦材料上，并且保持器的底面面向支撑表面。 支撑面用于使底面平行于底面。 覆盖板布置在保持器上以密封图像感测芯片。

公开(公告)号：US08441796B2

公开(公告)日：2013-05-14

申请号：US11795276

申请日：2006-01-16

Applicant: Robert Morse

Inventor： Robert Morse

IPC: H05K7/20

CPC classification number: C25D11/04 ,  C25D11/026 ,  H01L2924/0002 ,  H05K1/053 ,  H05K1/095 ,  H05K3/06 ,  H05K3/108 ,  H05K3/20 ,  H05K3/386 ,  H05K3/4664 ,  H05K3/4685 ,  H05K2201/017 ,  H05K2201/10166 ,  H05K2201/10575 ,  H05K2203/0315 ,  H05K2203/095 ,  H05K2203/121 ,  H01L2924/00

Abstract: An electrical power substrate comprises a metallic body at least one surface of the body having a coating generated by plasma electrolytic oxidation (PEO). The coating includes a dense hard layer adjacent the said surface of the metallic body, and a porous outer layer. Electrically conductive elements are attached to the said coating.

Abstract translation: 电力基板包括金属体，主体的至少一个表面具有由等离子体电解氧化（PEO）产生的涂层。 涂层包括邻近金属体的所述表面的致密硬质层和多孔外层。 导电元件附着在所述涂层上。