公开(公告)号：KR100790893B1

公开(公告)日：2008-01-03

申请号：KR1020060102467

申请日：2006-10-20

Applicant: 삼성전자주식회사 ,  재단법인서울대학교산학협력재단

Inventor： 정주환 ,  이재홍 ,  신형철 ,  김준수 ,  홍승범

IPC: H01L21/66

CPC classification number: G01Q60/30

Abstract: A semiconductor probe having an embossed resistive tip and a method for fabricating the same are provided to prevent damage thereof by using low energy in an ion implantation process. A protrusive part(172) is protruded from a cantilever(170). An embossed resistive tip(130) is formed on the protrusive part. A first electrode region(132) and a second electrode region(134) are formed at both sides of the embossed resistive tip at the protrusive part. The cantilever is doped with a first impurity. The first electrode region, the second electrode region, and the embossed resistive tip are doped with a second impurity having polarity different from the polarity of the first impurity. The doping density of the embossed resistive tip is lower than that of the first and second electrode regions.

Abstract translation: 提供具有压花电阻端头的半导体探针及其制造方法，以通过在离子注入工艺中使用低能量来防止其损坏。 突出部分（172）从悬臂（170）突出。 在凸出部分上形成压花电阻头（130）。 第一电极区域（132）和第二电极区域（134）形成在凸出部分的压花电阻端头的两侧。 悬臂掺杂有第一杂质。 第一电极区域，第二电极区域和压电电阻尖端掺杂有极性不同于第一杂质极性的第二杂质。 压花电阻尖端的掺杂密度低于第一和第二电极区域的掺杂浓度。

公开(公告)号：KR100842923B1

公开(公告)日：2008-07-03

申请号：KR1020070022550

申请日：2007-03-07

Applicant: 삼성전자주식회사 ,  재단법인서울대학교산학협력재단

Inventor： 고형수 ,  박병국 ,  홍승범 ,  박철민 ,  최우영 ,  김종필 ,  송재영 ,  김상완

IPC: G11B9/14 ,  G11B9/02

CPC classification number: H01L29/7834 ,  B82Y10/00 ,  G11B9/1409 ,  H01L21/28123 ,  H01L29/66636

Abstract: A method of manufacturing an enhancement semiconductor probe and an information storage device using the same are provided to reduce a process variable in device performance and to increase reliability of mass production by anisotropic-wet-etching a silicon substrate using side-walls. A method of manufacturing an enhancement semiconductor probe comprises the steps of: forming a first etching mask pattern(110a) on a silicon substrate(100c) to form a tip part of the probe in a first direction and forming side-wall areas at two sides of the first etching mask pattern; anisotropic-etching the silicon substrate to form two inclined surfaces of the probe; forming source and drain areas(160,170,180,190) on the silicon substrate by injecting dopants, using the side-wall area as masks, and removing the side-wall areas; removing the first etching mask pattern; forming a second etching mask pattern to form a tip part of the probe in a second direction; forming space layers at two sides of the second etching mask pattern; and etching the silicon substrate by photographing and etching processes and removing the space layers.

Abstract translation: 提供一种制造增强半导体探针的方法和使用其的信息存储装置，以减少器件性能中的工艺变量，并且通过使用侧壁对硅衬底进行各向异性湿蚀刻来提高批量生产的可靠性。 一种制造增强型半导体探针的方法包括以下步骤：在硅衬底（100c）上形成第一蚀刻掩模图案（110a），以在第一方向上形成探针的尖端部分，并在两侧形成侧壁区域 的第一蚀刻掩模图案; 各向异性蚀刻硅衬底以形成探针的两个倾斜表面; 通过注入掺杂剂在硅衬底上形成源极和漏极区域（160,170,180,190），使用侧壁区域作为掩模，并去除侧壁区域; 去除第一蚀刻掩模图案; 形成第二蚀刻掩模图案以在第二方向上形成探针的末端部分; 在第二蚀刻掩模图案的两侧形成空间层; 并通过拍摄和蚀刻工艺蚀刻硅衬底并去除空间层。

公开(公告)号：KR1020070025628A

公开(公告)日：2007-03-08

申请号：KR1020050081996

申请日：2005-09-03

Applicant: 삼성전자주식회사 ,  재단법인서울대학교산학협력재단

Inventor： 정주환 ,  김준수 ,  신형철 ,  홍승범

IPC: G01N13/10

CPC classification number: G01Q60/30 ,  G01Q60/38

Abstract: A semiconductor probe with a resistive tip of high resolution and a method of fabricating the same are provided to improve resolution of a resistive region by forming conductive regions at both sides of the resistive region. A semiconductor probe with a resistive tip of high resolution includes a cantilever(170), and first and second electrode regions(132,134). The cantilever is doped with first impurities, and has a resistive tip doped with second impurities having a polarity opposite to the first impurities at a low concentration and projects from its distal end. The first and second electrode regions are disposed at both sides of the resistive tip of the cantilever and doped with the second impurities. The resistive tip is a rectangular column with a diameter of 100nm or less. The diameter of resistive tip is 14-50nm.

Abstract translation: 提供具有高分辨率的电阻尖端的半导体探针及其制造方法，以通过在电阻区域的两侧形成导电区域来改善电阻区域的分辨率。 具有高分辨率的电阻尖端的半导体探针包括悬臂（170）和第一和第二电极区（132,134）。 悬臂掺杂有第一杂质，并且具有掺杂有低浓度的与第一杂质极性相反极性的第二杂质的电阻尖端并从其远端突出。 第一和第二电极区域设置在悬臂的电阻尖端的两侧并掺杂有第二杂质。 电阻尖是直径为100nm以下的矩形柱。 电阻尖的直径为14-50nm。

公开(公告)号：KR100804738B1

公开(公告)日：2008-02-19

申请号：KR1020070004973

申请日：2007-01-16

Applicant: 삼성전자주식회사 ,  재단법인서울대학교산학협력재단

Inventor： 고형수 ,  박병국 ,  홍승범 ,  박철민 ,  최우영 ,  김종필 ,  송재영 ,  김상완

IPC: H01L21/66 ,  H01L21/336 ,  H01L29/78

CPC classification number: H01L29/0847 ,  H01L29/66636 ,  H01L29/66659 ,  H01L29/78 ,  G01R1/067

Abstract: A semiconductor probe using an impact-ionization semiconductor device is provided to remarkably improve the limit of sensitivity of a resistive probe and easily adjust the quantity of charges capable of being detected by a probe by developing a new probe structure for easily adjusting the band energy of a source. One tilted surface of a probe is formed by an anisotropic etch process using a first etch mask pattern formed on a silicon substrate. After impurities are doped into the exposed substrate to form a first semiconductor electrode region(16), the first etch mask pattern is removed. A second etch mask pattern opposite to the direction of the first etch mask pattern is formed on the silicon substrate. Space layers are formed on the sidewalls of the second etch mask pattern. After the exposed silicon substrate is anisotropically etched to form an opposite tilted surface of the probe, the second etch mask pattern is removed. Impurities are doped into the exposed substrate to form a second semiconductor electrode region(18), and the second etch mask pattern is removed. A silicon oxide layer pattern is formed on the resultant structure by a known method. Space layers are formed on both sidewalls of the silicon oxide layer pattern. By using the space layer, a predetermined depth of the silicon substrate is etched by a photolithography process, and the space layer is removed. The first semiconductor electrode region can be a source terminal, and the second semiconductor electrode region can be a drain terminal.

Abstract translation: 提供使用冲击电离半导体器件的半导体探针，以显着提高电阻式探头的灵敏度极限，并且通过开发新的探针结构容易地调节能够由探针检测的电荷量，从而容易地调节带电能 来源。 通过使用形成在硅衬底上的第一蚀刻掩模图案的各向异性蚀刻工艺形成探针的一个倾斜表面。 在将杂质掺杂到暴露的衬底中以形成第一半导体电极区域（16）之后，去除第一蚀刻掩模图案。 在硅衬底上形成与第一蚀刻掩模图案的方向相反的第二蚀刻掩模图案。 空间层形成在第二蚀刻掩模图案的侧壁上。 在暴露的硅衬底被各向异性蚀刻以形成探针的相对的倾斜表面之后，去除第二蚀刻掩模图案。 将杂质掺杂到暴露的衬底中以形成第二半导体电极区域（18），并且去除第二蚀刻掩模图案。 通过已知的方法在所得结构上形成氧化硅层图案。 空间层形成在氧化硅层图案的两个侧壁上。 通过使用空间层，通过光刻工艺蚀刻硅衬底的预定深度，并且去除空间层。 第一半导体电极区域可以是源极端子，第二半导体电极区域可以是漏极端子。

公开(公告)号：KR100785006B1

公开(公告)日：2007-12-12

申请号：KR1020050081996

申请日：2005-09-03

Applicant: 삼성전자주식회사 ,  재단법인서울대학교산학협력재단

Inventor： 정주환 ,  김준수 ,  신형철 ,  홍승범

IPC: G01N13/10

CPC classification number: G01Q60/30 ,  G01Q60/38

Abstract: A semiconductor probe with a high-resolution tip and a method of fabricating the same are provided. The semiconductor probe includes: a cantilever doped with a first impurity; a resistive convex portion projecting from an end portion of the cantilever and lightly doped with a second impurity opposite in polarity to the first impurity; and first and second electrode regions formed on either side of the resistive convex portion and heavily doped with the second impurity.

公开(公告)号：KR100738098B1

公开(公告)日：2007-07-12

申请号：KR1020060003934

申请日：2006-01-13

Applicant: 삼성전자주식회사 ,  재단법인서울대학교산학협력재단

Inventor： 정주환 ,  김준수 ,  신형철 ,  홍승범

IPC: H01L21/66

Abstract: A semiconductor probe and a manufacturing method thereof are provided to keep the resolution of a resistive region and improve sensitivity by forming easily a conductive region in spite of a narrow width of a resistive tip using a doping control layer. A semiconductor probe includes a cantilever(21) doped with first dopants, a resistive tip, a doping control layer and first and second electrode regions. The resistive tip is protruded from an end portion of the cantilever. The resistive tip is lightly doped with second dopants. The doping control layer(25) is formed at both sides of the resistive tip. The first and second electrode regions(22,23) are formed at a lower portion of the doping control layer and both sides of the resistive tip, respectively. The first and second electrode regions are heavily doped with the second dopants.

Abstract translation: 提供一种半导体探针及其制造方法，通过使用掺杂控制层，尽管电阻性尖端的宽度变窄，但容易形成导电性区域，从而保持电阻性区域的分辨率并提高灵敏度。 半导体探针包括掺杂有第一掺杂剂的悬臂（21），电阻尖端，掺杂控制层以及第一和第二电极区域。 阻力尖端从悬臂的端部突出。 电阻尖端轻掺杂第二掺杂剂。 掺杂控制层（25）形成在电阻性尖端的两侧。 第一和第二电极区（22,23）分别形成在掺杂控制层的下部和电阻性尖端的两侧。 第一和第二电极区用第二掺杂剂重掺杂。

公开(公告)号：KR100829565B1

公开(公告)日：2008-05-14

申请号：KR1020060097412

申请日：2006-10-02

Applicant: 삼성전자주식회사

Inventor： 고형수 ,  정주환 ,  홍승범 ,  박홍식 ,  박철민

IPC: H01L21/60

CPC classification number: G01Q60/30 ,  G01Q60/40

Abstract: A semiconductor probe having a wedge shape resistive tip and a method of fabricating the semiconductor probe is provided. The semiconductor probe includes a resistive tip that is doped with a first impurity, has a resistance region doped with a low concentration of a second impurity having an opposite polarity to the first impurity, and has first and second semiconductor electrode regions doped with a high concentration of the second impurity on both side slopes of the resistive tip. The probe also includes a cantilever having the resistive tip on an edge portion thereof, and an end portion of the resistive tip has a wedge shape.

公开(公告)号：KR1020080040893A

公开(公告)日：2008-05-09

申请号：KR1020060108834

申请日：2006-11-06

Applicant: 삼성전자주식회사

Inventor： 민동기 ,  좌성훈 ,  홍승범

IPC: H04N5/349

CPC classification number: H04N5/349

Abstract: A method and an apparatus for calibrating the position of an image sensor, and a method for detecting position of an image sensor are provided to calibrate and detect the image sensor position in sub-pixel unit and to improve the position sensing accuracy without installing additional position sensor by means of a simplified algorithm using symmetry distribution characteristic of cross correlation related to the image sensor position. The first image information corresponding to the first position of image sensor is gained(210) and the second image information corresponding to the second position of an image sensor is gained(240). The cross correlation value between the first image information and the second image information is calculated(250). The symmetry characteristic of the calculated cross correlation value is investigated(260). In case of existence of the symmetry characteristic, the driving power value of the image sensor for moving distance between the first and the second position is established as the standard driving power value for moving the image sensor in one pixel(280). The position of the image sensor is calibrated by using the established driving power value(290). In case of absence of the symmetry characteristic, the second position is changed by controlling the driving power value(270).

Abstract translation: 提供了用于校准图像传感器的位置的方法和装置以及用于检测图像传感器的位置的方法，用于校准和检测子像素单元中的图像传感器位置，并且在不安装附加位置的情况下提高位置感测精度 传感器通过使用与图像传感器位置相关的互相关的对称分布特性的简化算法。 获得对应于图像传感器的第一位置的第一图像信息（210），并且获得与图像传感器的第二位置相对应的第二图像信息（240）。 计算第一图像信息和第二图像信息之间的互相关值（250）。 研究了计算的互相关值的对称性特征（260）。 在存在对称特性的情况下，确定用于在第一和第二位置之间移动距离的图像传感器的驱动功率值作为在一个像素（280）中移动图像传感器的标准驱动功率值。 通过使用已建立的驱动功率值（290）校准图像传感器的位置。 在没有对称特性的情况下，通过控制驱动功率值（270）来改变第二位置。

公开(公告)号：KR1020080038077A

公开(公告)日：2008-05-02

申请号：KR1020070134455

申请日：2007-12-20

Applicant: 삼성전자주식회사

Inventor： 부엘만사이먼 ,  홍승범

IPC: H01L27/105 ,  G11B9/02

Abstract: A method for manufacturing a ferroelectric thin film and a method for manufacturing a ferroelectric recording medium are provided to increase recording density of the recording medium by forming uniform nano grains on the ferroelectric thin film. An amorphous TiO2 layer(12) is formed on a substrate(10). A PbO gas atmosphere(200) is formed on the TiO2 layer. The TiO2 layer is mixed with the PbO gas at a temperature between 400 and 800 °C. A PbTiO3 ferroelectric thin film is formed on the substrate. Nano grains with a size between 1 and 20 nm are formed on the PbTiO3 ferroelectric thin film. At least one of a reaction temperature and a reaction time of the TiO2 layer and the PbO gas and a flux of the PbO gas is controlled, such that the size of the nano grain and a stoichiometry of the PbTiO3 ferroelectric thin film are controlled.

Abstract translation: 提供一种制造铁电薄膜的方法和制造铁电记录介质的方法，以通过在铁电薄膜上形成均匀的纳米晶粒来提高记录介质的记录密度。 在基板（10）上形成无定形TiO 2层（12）。 在TiO 2层上形成PbO气氛（200）。 在400〜800℃的温度下，将TiO 2层与PbO气体混合。 在基板上形成PbTiO3铁电薄膜。 在PbTiO3铁电薄膜上形成尺寸为1至20nm的纳米晶粒。 控制TiO 2层和PbO气体的反应温度和反应时间中的至少一个以及PbO气体的流量，从而控制纳米晶粒的尺寸和PbTiO 3铁电薄膜的化学计量。

公开(公告)号：KR1020080031084A

公开(公告)日：2008-04-08

申请号：KR1020060097412

申请日：2006-10-02

Applicant: 삼성전자주식회사

Inventor： 고형수 ,  정주환 ,  홍승범 ,  박홍식 ,  박철민

IPC: H01L21/60

CPC classification number: G01Q60/30 ,  G01Q60/40

Abstract: A semiconductor probe having a wedge-shaped resistive tip, and a method of fabricating the same are provided to increase the resolution of a resistance area by forming highly doped electrode areas on both sides of the resistance area of the resistive tip. A semiconductor probe comprises a resistive tip(150), and a cantilever(170). The resistive tip, doped by the first impurity, comprises a resistance area(156) which is doped by the second impurity, having an opposite polarity to that of the first impurity, in low concentration on its top portion, and has first and second semiconductor electrode areas(152,154) doped by the second impurity in high concentration on its inclined portion. The cantilever has the resistive tip on its edge portion. The end portion of the resistive tip is wedge-shaped and the length of the end portion of the tip is in a range of 20nm to 2mum.

Abstract translation: 提供具有楔形电阻端头的半导体探针及其制造方法，以通过在电阻尖端的电阻区域的两侧形成高度掺杂的电极区域来提高电阻区域的分辨率。 半导体探针包括电阻尖端（150）和悬臂（170）。 由第一杂质掺杂的电阻尖端包括由第二杂质掺杂的具有与第一杂质相反的极性的电阻区域（156），其顶部部分的浓度低，并且具有第一和第二半导体 在其倾斜部分上由高浓度的第二杂质掺杂的电极区域（152,154）。 悬臂在其边缘部分具有电阻尖端。 电阻尖端的端部是楔形的，并且尖端的端部的长度在20nm至2μm的范围内。