中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

39 records (took 0.024 seconds)

    MACROPOROUS SUPPORT FOR CHEMICAL AMPLIFICATION REACTION AND ITS UTILIZATION
    1.
    发明专利
    MACROPOROUS SUPPORT FOR CHEMICAL AMPLIFICATION REACTION AND ITS UTILIZATION 审中-公开

    公开(公告)号：JP2006223309A

    公开(公告)日：2006-08-31

    申请号：JP2006043178

    申请日：2006-02-20

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： DERTINGER STEPHAN ,  KLUEHR MARCO ,  HANEDER THOMAS

    IPC: C12N15/09 ,  C12M1/00 ,  C12P19/34 ,  C12Q1/68

    Abstract: PROBLEM TO BE SOLVED: To provide a method for amplifying a nucleic acid in high accuracy and in high repeatability, and to provide an apparatus therefor. SOLUTION: This method for amplifying the nucleic acid in the holes 2 of a macroporous support comprises (a) a process for supplying the prescribed components of a reaction mixture suitable for the amplification reaction to the first region having at least two holes 2 of the support and binding the components of the reaction mixture to the hole walls 1 of the support through non-covalent bonds to form a reaction region on the surfaces of the support, wherein the many separated holes 2 having diameters of 500 nm to 100 μm and a depth : opening aspect ratio of at least 10:1 are dispersed in the first surface and the second surface in a density of 10 4 to 10 8 /cm 2 , (b) a process for adding a sample containing the components of the reaction mixture required for the performance of the amplification reaction to the whole support, (c) a process for performing the amplification reaction, and (d) a process for detecting at least one amplification product. COPYRIGHT: (C)2006,JPO&NCIPI

    4.
    发明专利
    未知

    公开(公告)号：DE19947117B4

    公开(公告)日：2007-03-08

    申请号：DE19947117

    申请日：1999-09-30

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： STENGL REINHARD ,  REISINGER HANS ,  HANEDER THOMAS ,  BACHHOFER HARALD

    IPC: H01L21/8247 ,  H01L29/78 ,  G11C11/22 ,  H01L21/8246 ,  H01L27/105 ,  H01L29/51 ,  H01L29/788 ,  H01L29/792

    Abstract: A first source-drain region, a channel region, and a second source-drain region are arranged one after another in a semiconductor substrate. At least the surface of the channel region and parts of the first source-drain region are covered by a dielectric layer. A ferroelectric layer is disposed on the surface of the dielectric layer between two polarization electrodes. A gate electrode is arranged on the surface of the dielectric layer. The thickness of the dielectric layer is dimensioned such that a remanent polarization of the ferroelectric layer, which is aligned between the two polarization electrodes, produces compensation charges in part of the channel region. The ferroelectric transistor is suitable as a memory cell for a memory cell configuration.

    7.
    发明专利
    未知

    公开(公告)号：DE19946437A1

    公开(公告)日：2001-04-12

    申请号：DE19946437

    申请日：1999-09-28

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： HANEDER THOMAS ,  BACHHOFER HARALD ,  UNGER EUGEN

    IPC: H01L21/8247 ,  H01L21/02 ,  H01L21/8246 ,  H01L27/105 ,  H01L29/51 ,  H01L29/788 ,  H01L29/792 ,  H01L29/78

    Abstract: The invention relates to a ferroelectric transistor comprising two source/drain regions (13) and a channel region arranged therebetween on a semiconductor substrate (11). A first dielectric intermediate layer (14) is located on the surface of the channel region and said layer contains Al2O3. A ferroelectric layer (15) and a gate electrode (16) are arranged above the first dielectric intermediate layer (14). A tunnel of compensatory charges from the channel region is suppressed in the first dielectric intermediate layer (14) by using Al2O3 in the first dielectric intermediate layer, thereby improving the data retention time.

    10.
    发明专利
    未知

    公开(公告)号：DE10009762B4

    公开(公告)日：2004-06-03

    申请号：DE10009762

    申请日：2000-03-01

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： HANEDER THOMAS ,  BACHHOFER HARALD ,  HOENLEIN WOLFGANG ,  SCHINDLER GUENTHER ,  HARTNER WALTER

    IPC: H01L21/02 ,  H01L21/314 ,  H01L21/316 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/108 ,  H01L21/8239

    Abstract: Production of a storage capacitor comprises preparing a first electrode layer (1); applying a 1 nm thick CeO2 layer (2) on the electrode layer; applying an amorphous dielectric layer (3) made from SrBi2Ta2O9 (SBT) or SrBi2(TaNb)2O9 (SBTN) on the CeO2 layer; heating at 590-620[deg] C to crystallize the dielectric layer; and applying a second electrode layer (4) on the dielectric layer. An independent claim is also included for a process for the production of a semiconductor component comprising forming a switching transistor on a semiconductor substrate; and forming the storage capacitor on the transistor. Preferred Features: The electrode layers are made from platinum, a conducting oxide of a platinum or an inert and conducting oxide. The dielectric layer is 20-200 nm thick.

Patent Agency Ranking