公开(公告)号：DE19944740C2

公开(公告)日：2001-10-25

申请号：DE19944740

申请日：1999-09-17

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KIRCHHOFF MARKUS ,  SPERLICH HANS-PETER ,  SCHILLING UWE ,  GABRIC ZVONIMIR ,  SPINDLER OSWALD ,  WEGE STEPHAN ,  GLAWISCHNIG HANS

IPC: H01L21/316 ,  H01L21/318 ,  H01L21/762 ,  H01L21/314 ,  H01L21/768

Abstract: A method for the shrink-hole-free filling of trenches in semiconductor circuits which utilizes selective growth of a layer to be applied is described. In the method, a layer of a selective growing material is applied simultaneously to a growth-promoting layer and to a growth-inhibiting layer. Wherein raised portions which, before the layer of selective growing material is applied, are covered by the growth-inhibiting layer at least on their sides. After the growth-inhibiting layer has been applied, the growth-promoting layer is generated by anisotropic treatment on surfaces parallel to the substrate on and between the raised portions and the layer is then removed again on surfaces parallel to the substrate on the raised portions. The method makes it possible to produce in a particularly simple manner a pattern on the raised portions of which are covered by the growth-inhibiting layer on their sides and on their top whereas the bottom of trenches is covered with a growth-promoting layer.

公开(公告)号：DE10310716B4

公开(公告)日：2005-07-28

申请号：DE10310716

申请日：2003-03-10

Applicant: INFINEON TECHNOLOGIES AG

Inventor： OFFENBERG DIRK ,  BIEMER JUSTIN ,  BOUISSOU AUDE ,  DOW TIM ,  NOTZ REINER ,  PLAGMANN JOERN ,  RUDNICK WOLFRAM ,  SCHEINBACHER GUENTHER ,  SPINDLER OSWALD ,  WITTMANN REINHARD

IPC: H01L23/544

公开(公告)号：DE59707295D1

公开(公告)日：2002-06-20

申请号：DE59707295

申请日：1997-08-28

Applicant: INFINEON TECHNOLOGIES AG ,  FRAUNHOFER GES FORSCHUNG

Inventor： GRASSL THOMAS ,  GABRIC ZVONIMIR ,  SPINDLER OSWALD

IPC: H01L21/768 ,  H01L21/316

Abstract: In a process for smoothening a substrate surface with level differences caused by metallic structures, a metallic layer made of a titanium compound is first applied on the surface and the side faces of the metallic structures before O3-activated separation of SiO2 or SiOF from a silicium precursor stage on the substrate surface provided with the metallic structures.

公开(公告)号：DE10310716A1

公开(公告)日：2004-07-15

申请号：DE10310716

申请日：2003-03-10

Applicant: INFINEON TECHNOLOGIES AG

Inventor： OFFENBERG DIRK ,  BIEMER JUSTIN ,  BOUISSOU AUDE ,  DOW TIM ,  NOTZ REINER ,  PLAGMANN JOERN ,  RUDNICK WOLFRAM ,  SCHEINBACHER GUENTHER ,  SPINDLER OSWALD ,  WITTMANN REINHARD

IPC: H01L23/544

Abstract: The method involves forming a first metal layer (3) on a semiconductor wafer surface (2), forming structural elements (4), covering free areas with an insulating layer (6). Further metal layers, structural elements and insulating layers are then formed. A fourth insulating layer (16) is applied directly to the surface of a third insulating layer (13).

公开(公告)号：DE19631743C2

公开(公告)日：2002-05-29

申请号：DE19631743

申请日：1996-08-06

Applicant: INFINEON TECHNOLOGIES AG ,  FRAUNHOFER GES FORSCHUNG

Inventor： GABRIC ZVONIMIR ,  SPINDLER OSWALD ,  GRASL THOMAS

IPC: H01L21/316 ,  H01L21/768 ,  H01L23/522

Abstract: Production of an insulation layer, functioning as an inter-metal dielectric (IMD), involves: (a) covering a substrate surface (2) with a first insulating layer (3) and then a metal (preferably aluminium) layer; (b) photo-structuring the metal layer to form circuit lines (4) which are then covered with a second insulating layer (7) on their surfaces and side faces (6); (c) removing the second insulating layer material (7) from the first insulating layer regions (3) between the circuit lines (4); and (d) depositing a third insulating layer (8) on the resulting structure by ozone-activated CVD with a growth rate which is greater on the first insulating layer material (3) than on the second insulating layer material (7). Preferably, the first insulating layer material (3) is phosphosilicate glass, borophosphosilicate glass or undoped silicate glass and the second insulating layer material (7) is titanium nitride.

公开(公告)号：DE10041699A1

公开(公告)日：2002-03-21

申请号：DE10041699

申请日：2000-08-24

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BACHHOFER HARALD ,  HANEDER THOMAS ,  SPINDLER OSWALD ,  WASER RAINER

IPC: H01L21/02 ,  H01L21/314 ,  H01L21/316 ,  H01L21/8239 ,  H01L41/22

Abstract: In a method for producing ferroelectric strontium bismuth tantalate having the composition SrxBiyTa2O9 (SBT) or SrxBiy(Ta, Nb)2O9 (SBTN), the element strontium, which is normally present in an amount y=2, is provided in excess in a range from 2.1

公开(公告)号：DE10010283A1

公开(公告)日：2001-09-13

申请号：DE10010283

申请日：2000-02-25

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BACHHOFER HARALD ,  SPINDLER OSWALD

IPC: H01L21/02 ,  H01L21/316 ,  H01L21/8242

Abstract: Production of a polycrystalline metal oxide-containing layer (2) comprises: preparing a carrier; forming a polycrystalline metal oxide-containing layer on the carrier; and reducing the surface roughness of the layer. Independent claims are also included for: (A) a process for the production of a storage capacitor, comprising preparing an electrode (1); forming a polycrystalline metal oxide-containing layer (2) on the electrode which acts as a carrier; and applying a second electrode (3) on the layer; and (B) a process for the production of a semiconductor component, comprising forming a switching transistor on a semiconductor substrate; and then forming a storage capacitor on the transistor. Preferred Features: The polycrystalline metal oxide-containing layer is made from a ferro- or para-electric material such as SrBi2Ta2O9. The electrodes are made from a platinum metal, a conducting oxide of platinum, or other conducting oxide.

公开(公告)号：DE19944740A1

公开(公告)日：2001-04-19

申请号：DE19944740

申请日：1999-09-17

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KIRCHHOFF MARKUS ,  SPERLICH HANS-PETER ,  SCHILLING UWE ,  GABRIC ZVONIMIR ,  SPINDLER OSWALD ,  WEGE STEPHAN ,  GLAWISCHNIG HANS

IPC: H01L21/316 ,  H01L21/318 ,  H01L21/762 ,  H01L21/768

Abstract: Shrinkage-free filling of trenches in integrated circuits comprises applying a layer of selectively growing material on a growth-promoting layer and a growth-halting layer (2) so bumps (3) are formed which are covered laterally by the growth-halting layer before applying the layer of selectively growing material. After the growth-halting layer is applied, the growth-promoting layer is produced on surfaces parallel to the substrate (4) by an isotropic treatment and then removed on the surfaces that are parallel to the bumps. Preferred Features: The growth-promoting layer is removed on the parallel surfaces on the bumps by chemical-mechanical polishing. The growth-promoting layer is produced by an oxygen plasma.