公开(公告)号：US20070048897A1

公开(公告)日：2007-03-01

申请号：US11216133

申请日：2005-09-01

Applicant: Norman Card ,  John Lauffer

Inventor： Norman Card ,  John Lauffer

IPC: H01L21/00

CPC classification number: H01L21/67126 ,  H01L21/486 ,  H05K3/4053 ,  H05K3/4069 ,  H05K2201/0116 ,  H05K2201/0959 ,  H05K2203/0139 ,  H05K2203/082 ,  H05K2203/1476

Abstract: A method and apparatus for depositing conductive paste in openings of a circuitized substrate such as a multilayered printed circuit board to produce effective conductive thru-holes capable of being electrically coupled to selected conductive layers of the substrate. The invention comprises using vacuum to draw from the underside of the substrate while substantially simultaneously applying the paste onto the substrate's opposing surface. One example of means for accomplishing such paste application is a squeegee, and in one embodiment, two such squeegees may be used. A porous member is used to engage the substrate's undersurface during the vacuum draw, this member being positioned atop a base vacuum member through which the vacuum is drawn.

公开(公告)号：US07145231B2

公开(公告)日：2006-12-05

申请号：US10844392

申请日：2004-05-13

Applicant: Takehiko Hasebe ,  Takehide Yokozuka ,  Nobuyuki Ushifusa ,  Masahide Harada ,  Eiji Matsuzaki ,  Hiroshi Hozoji

Inventor： Takehiko Hasebe ,  Takehide Yokozuka ,  Nobuyuki Ushifusa ,  Masahide Harada ,  Eiji Matsuzaki ,  Hiroshi Hozoji

IPC: H01L23/34

CPC classification number: H01L24/16 ,  H01L23/142 ,  H01L23/367 ,  H01L23/3677 ,  H01L23/49822 ,  H01L23/49833 ,  H01L24/17 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/29139 ,  H01L2224/2929 ,  H01L2224/32057 ,  H01L2224/32188 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/83385 ,  H01L2224/83851 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01054 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/19106 ,  H05K1/0206 ,  H05K1/0207 ,  H05K1/021 ,  H05K1/056 ,  H05K1/144 ,  H05K3/384 ,  H05K3/4608 ,  H05K3/4641 ,  H05K3/4652 ,  H05K2201/0209 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/09563 ,  H05K2201/09572 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09845 ,  H05K2201/10734 ,  H01L2924/05432 ,  H01L2924/01026 ,  H01L2924/01028 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The invention provides an electronic apparatus having a metal core substrate including a metal plate, an insulating layer formed on the metal plate and a conductive layer formed on the insulating layer, and an electronic part, and to which the conductive layer and a terminal of the electronic part are connected. In the electronic apparatus, a member having a high thermal conductivity is arranged so as to be in contact with both of the metal plate and the electronic part. Accordingly, a heat radiating property of the electronic apparatus is increased.

公开(公告)号：US20060203457A1

公开(公告)日：2006-09-14

申请号：US11079841

申请日：2005-03-14

Applicant: Galliano Busletta ,  Robert Roessler ,  David Stevens

Inventor： Galliano Busletta ,  Robert Roessler ,  David Stevens

IPC: H05K1/18

CPC classification number: H05K1/16 ,  H05K1/0298 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K3/0047 ,  H05K3/4069 ,  H05K3/429 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09645 ,  H05K2201/09845 ,  H05K2203/1476 ,  Y10T29/4913

Abstract: The present invention provides, in one aspect, a printed wiring board (PWB) for attaching electrical components thereto, comprising, multiple PWB insulating layers located between conductive layers, an interconnect edge that intersects the conductive layers, and an electrical device, wherein at least a portion of the electrical device is located along the interconnect edge and electrically connects at least a portion of the conductive layers to each other.

Abstract translation: 本发明在一个方面提供一种用于将电气部件附着到其上的印刷电路板（PWB），包括位于导电层之间的多个PWB绝缘层，与导电层相交的互连边缘以及电气装置，其中至少 电气设备的一部分沿着互连边缘定位并且将至少一部分导电层电连接到彼此。

公开(公告)号：US20060191710A1

公开(公告)日：2006-08-31

申请号：US11429103

申请日：2006-05-08

Applicant: Takashi Fushie ,  Takeshi Kagatsume ,  Shigekazu Matsui

Inventor： Takashi Fushie ,  Takeshi Kagatsume ,  Shigekazu Matsui

IPC: H05K1/03

CPC classification number: H05K3/426 ,  H01L23/5384 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0306 ,  H05K3/388 ,  H05K3/4602 ,  H05K3/4605 ,  H05K3/467 ,  H05K2201/0154 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/068 ,  H05K2201/09536 ,  H05K2201/0959 ,  Y10T29/49165 ,  Y10T428/24926 ,  H01L2924/00

Abstract: A multilayer printed wiring board which permits the formation of fine wiring patterns, thereby increasing the density of wiring patterns. Using photosensitive glass having a coefficient of thermal expansion close to that of a copper film as a core substrate, a through hole is formed in the photosensitive glass by photolithography, a sputtering silicon oxide layer and a sputtering silicon nitride layer are formed to prevent leak of alkali metal ions from the photosensitive glass, a sputtering chromium layer, a sputtering chromium-copper layer and a sputtering copper layer are formed to enhance the adhesion strength between the copper film and the sputtering silicon oxide layer, and a copper film of 1 to 20 μm thick is formed. With resin filled into the interior of the through hole, a wiring layer is patterned by etching, an insulating layer is formed, and the surface is covered with a surface treatment layer and a cover coat.

公开(公告)号：US20060180821A1

公开(公告)日：2006-08-17

申请号：US10562528

申请日：2004-06-21

Applicant: Xue-Jan Fan ,  Peng Xu

Inventor： Xue-Jan Fan ,  Peng Xu

IPC: H01L33/00

CPC classification number: H05K1/0209 ,  F21K9/00 ,  F21V29/70 ,  F21V29/763 ,  F21V29/87 ,  F21V29/89 ,  F21Y2105/10 ,  F21Y2115/10 ,  H01L23/3677 ,  H01L2924/0002 ,  H05K1/0206 ,  H05K1/0272 ,  H05K3/0061 ,  H05K3/42 ,  H05K3/429 ,  H05K2201/09309 ,  H05K2201/0959 ,  H05K2201/09781 ,  H05K2201/10106 ,  H05K2201/10969 ,  H01L2924/00

Abstract: A device 101 for thermal management of an LED 120 employs a heatsink 160, a substrate 111, a trace layer 130 and a via 180. The via 180 includes a sidewall 182 defining a channel 181 extending through substrate 110. The channel 181 is beneath the trace layer 130 and above the heatsink 160 to transfer any heat applied to the trace layer 130 by the LED 120 to the heatsink 160.

Abstract translation: 用于LED 120的热管理的装置101采用散热片160，衬底111，迹线层130和通孔180。 通孔180包括限定延伸穿过基板110的通道181的侧壁182。 通道181位于迹线层130下方并且位于散热器160之上，以将通过LED 120施加到迹线层130的任何热量传递到散热片160。

公开(公告)号：US07084355B2

公开(公告)日：2006-08-01

申请号：US10409792

申请日：2003-04-08

Applicant: Yoshiyuki Kosaka ,  Kazuyasu Sugisawa ,  Kimihiro Yamanaka

Inventor： Yoshiyuki Kosaka ,  Kazuyasu Sugisawa ,  Kimihiro Yamanaka

IPC: H01R12/04

CPC classification number: H05K1/0271 ,  H05K3/4602 ,  H05K2201/09354 ,  H05K2201/0959

Abstract: A multilayer printed circuit board is provided in which microcracks or metallic migration is mitigated when a Resin Fill Plated Through Hole (RFP) is arranged near the edge thereof. The multilayer printed circuit board includes an inner layer having an RFP, outer layers, RFP lands, and conductor layers. The conductor layers are positioned over the RFP lands and the outer edges of the conductor layers extends outward further than the outer edges of the RFP lands. When the multilayer printed circuit board is heated, a stress is generated in and near the RFP. The conductor layers positioned so as to cover the RFP lands, exert a reaction against the stress to suppress generation of microcracks in the multilayer printed circuit board and thereby mitigate metallic migration in the board.

公开(公告)号：US20060113032A1

公开(公告)日：2006-06-01

申请号：US10538506

申请日：2002-12-09

Applicant: Keiichi Murakami

Inventor： Keiichi Murakami

IPC: B29C65/00

CPC classification number: H05K3/281 ,  H05K3/0094 ,  H05K2201/09036 ,  H05K2201/0959 ,  H05K2201/09881 ,  H05K2203/0108 ,  H05K2203/025 ,  H05K2203/0278 ,  H05K2203/1152

Abstract: There is provided a method for manufacturing a printed wiring board, including the following steps. Forming a resin layer on a printed wiring board with circuit patterns formed thereon wherein the resin layer is formed by superposing a semi-cured resin sheet, in which patterns complementary to the circuit patterns are included on a surface of the resin sheet facing the circuit patterns. Pressing and forcing the resin layer into spaces between the circuit patterns and curing the resin layer. And then polishing the cured resin covering said circuit patterns, thereby exposing said circuit patterns.

Abstract translation: 提供一种制造印刷电路板的方法，包括以下步骤。 在其上形成有电路图案的印刷电路板上形成树脂层，其中树脂层通过叠置半固化树脂片形成，其中与电路图案互补的图案包括在面向电路图案的树脂片的表面上 。 将树脂层压迫并迫使电路图案之间的空间和树脂层固化。 然后对覆盖所述电路图案的固化树脂进行抛光，从而露出所述电路图案。

公开(公告)号：US07013560B2

公开(公告)日：2006-03-21

申请号：US10707015

申请日：2003-11-14

Applicant: Po-Chih Liu

Inventor： Po-Chih Liu

IPC: H05K3/02 ,  H05K3/10

CPC classification number: H01L21/4857 ,  H01L21/4853 ,  H05K3/108 ,  H05K3/243 ,  H05K3/28 ,  H05K3/421 ,  H05K3/4602 ,  H05K2201/09481 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/054 ,  H05K2203/1461 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A substrate comprises at least a semi-finished substrate, a circuit line, a contact and a solder mask layer. The circuit line and the contact are formed on the semi-finished substrate. The circuit line and the contact are connected together non-integrally. The solder mask layer is formed over the semi-finished substrate to cover the circuit line. The solder mask layer has an opening in which the contact is formed.

Abstract translation: 基板至少包括半成品基板，电路线，接触件和焊接掩模层。 电路线和触点形成在半成品基板上。 电路线和触点非整体连接在一起。 焊接掩模层形成在半成品衬底上以覆盖电路线。 焊接掩模层具有形成接触的开口。

公开(公告)号：US06989559B2

公开(公告)日：2006-01-24

申请号：US10249788

申请日：2003-05-08

Applicant: Wen-Long Chen ,  Cheng-Chieh Yang ,  Chih-Liang Hu

Inventor： Wen-Long Chen ,  Cheng-Chieh Yang ,  Chih-Liang Hu

IPC: H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC classification number: H05K3/0094 ,  H01L21/561 ,  H01L23/3121 ,  H01L23/49805 ,  H01L23/49844 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2224/92 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12032 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H05K3/0052 ,  H05K3/284 ,  H05K3/403 ,  H05K2201/0959 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/92247 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A discrete circuit component is made from a substrate with the first and second surfaces thereof each having a corresponding matrix of electrically conductive segments. A plated through-hole connects each of the conductive segments of each the first and second conductive segments electrically. The through-hole is first clogged and then subsequently cleared of clogging in the fabrication stages.

Abstract translation: 离散电路部件由衬底制成，其第一和第二表面各自具有相应的导电段的矩阵。 电镀通孔将每个第一和第二导电段的导电段电连接。 首先堵塞通孔，然后在制造阶段中清除堵塞。

公开(公告)号：US06984915B2

公开(公告)日：2006-01-10

申请号：US10348788

申请日：2003-01-22

Applicant: Jack T. Galyean

Inventor： Jack T. Galyean

IPC: H01R39/08

CPC classification number: H01R12/526 ,  H01R39/10 ,  H05K3/107 ,  H05K3/181 ,  H05K3/244 ,  H05K3/4623 ,  H05K2201/0376 ,  H05K2201/09036 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09827 ,  Y10T29/49009 ,  Y10T29/49011 ,  Y10T29/53143

Abstract: A slip ring and a method for manufacturing a slip ring utilizes a first double clad copper laminate with a first side and a second side separated by a first dielectric and a second double clad copper laminate with a third side and a fourth side separated by a second dielectric. Copper is selectively removed from the second and third sides to provide desired patterns in the copper. The second and third sides are joined in a desired orientation. Substantially, all of the copper from a window in the first and fourth sides is removed to expose the first and second dielectrics. A plurality of concentric grooves is machined into the first and second dielectrics from the first and fourth sides and the concentric grooves are metalized to provide a plurality of concentric metalized rings.