公开(公告)号：US07781679B1

公开(公告)日：2010-08-24

申请号：US11340298

申请日：2006-01-26

Applicant: Christopher Schreiber ,  Christopher Dunn

Inventor： Christopher Schreiber ,  Christopher Dunn

IPC: H05K1/00

CPC classification number: H05K3/44 ,  H05K1/056 ,  H05K3/16 ,  H05K3/4076 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09827 ,  Y10T428/30 ,  Y10T428/31678

Abstract: A disk drive suspension interconnect, and method therefor. The interconnect has a metal grounding layer, a metal conductive layer and an insulative layer between the metal grounding layer and the conductive metal layer. A circuit component such as a slider is electrically connected to the conductive layer along a grounding path from the circuit component and the conductive layer to the metal grounding layer through an aperture in the insulative layer. For improved electrical connection a tie layer is provided through the insulative layer onto the grounding layer in bonding relation with the ground layer. A conductor is deposited onto both the conductive metal layer and the tie layer in conductive metal layer and tie layer bonding relation, and the circuit component is thus bonded to the grounding layer by the conductor.

Abstract translation: 磁盘驱动器悬挂互连及其方法。 互连在金属接地层和导电金属层之间具有金属接地层，金属导电层和绝缘层。 诸如滑块的电路部件沿着从电路部件和导电层到金属接地层的通过绝缘层的孔的接地路径电连接到导电层。 为了改善电连接，通过绝缘层将接合层提供到与接地层结合的接地层上。 导电体以导电金属层和连接层结合关系沉积在导电金属层和连接层两者上，并且电路部件因此被导体结合到接地层。

公开(公告)号：US07768132B2

公开(公告)日：2010-08-03

申请号：US11165680

申请日：2005-06-24

Applicant: Yusuke Igarashi ,  Takeshi Nakamura ,  Yasunori Inoue ,  Ryosuke Usul ,  Hideki Mizuhara

Inventor： Yusuke Igarashi ,  Takeshi Nakamura ,  Yasunori Inoue ,  Ryosuke Usul ,  Hideki Mizuhara

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/04 ,  H01L23/10 ,  H01L23/34

CPC classification number: H01L23/5384 ,  H01L23/3128 ,  H01L24/48 ,  H01L2221/68377 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H05K3/4647 ,  H05K2201/0355 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2203/0369 ,  H05K2203/0733 ,  H05K2203/1476 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A circuit device including a multilayer wiring structure having an improved heat radiation performance, and a manufacturing method thereof is provided. A circuit device of the invention includes a first wiring layer and a second wiring layer laminated while interposing a first insulating layer. The first wiring layer is connected to the second wiring layer in a desired position through a connecting portion formed so as to penetrate the first insulating layer. The connecting portion includes a first connecting portion protruding in a thickness direction from the first wiring layer, and a second connecting portion protruding in the thickness direction from the second wiring layer. The first connecting portion and the second connecting portion contact each other at an intermediate portion in the thickness direction of the insulating layer.

Abstract translation: 提供一种包括具有改善的散热性能的多层布线结构的电路装置及其制造方法。 本发明的电路器件包括第一布线层和在插入第一绝缘层的同时层叠的第二布线层。 第一布线层通过形成为穿透第一绝缘层的连接部分而在期望位置连接到第二布线层。 连接部分包括从第一布线层沿厚度方向突出的第一连接部分和从第二布线层沿厚度方向突出的第二连接部分。 第一连接部和第二连接部在绝缘层的厚度方向的中间部彼此接触。

公开(公告)号：US07745737B2

公开(公告)日：2010-06-29

申请号：US11478922

申请日：2006-06-30

Applicant: Yu-Hsu Lin ,  Shang-Tsang Yeh ,  Chao-Chen Huang ,  Chuan-Bing Li

Inventor： Yu-Hsu Lin ,  Shang-Tsang Yeh ,  Chao-Chen Huang ,  Chuan-Bing Li

IPC: H01R12/04 ,  H05K1/11 ,  H01K3/22

CPC classification number: H05K1/116 ,  H05K1/0216 ,  H05K3/429 ,  H05K2201/0352 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09718 ,  Y10T29/49165

Abstract: A printed circuit board (PCB) having vias for reducing reflections of input signals includes a first signal layer, a second signal layer, one via, an input signal line arranged on the first signal layer, and an output signal line arranged on the second signal layer. The via further includes a drill hole, a first pad, and a second pad. The first pad is electrically connected with the input signal line, and the second pad is electrically connected with the output signal line. An outer diameter of the first pad is smaller than an outer diameter of the second pad.

Abstract translation: 具有用于减少输入信号的反射的通孔的印刷电路板（PCB）包括第一信号层，第二信号层，一个通孔，布置在第一信号层上的输入信号线和布置在第二信号上的输出信号线 层。 通孔还包括钻孔，第一垫和第二垫。 第一焊盘与输入信号线电连接，第二焊盘与输出信号线电连接。 第一垫的外径小于第二垫的外径。

公开(公告)号：US07738258B2

公开(公告)日：2010-06-15

申请号：US11391375

申请日：2006-03-29

Applicant: Masaki Ohno ,  Masanori Tamaki

Inventor： Masaki Ohno ,  Masanori Tamaki

IPC: H05K7/00

CPC classification number: H05K1/114 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/49838 ,  H01L2224/16 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/15311 ,  H05K3/4602 ,  H05K2201/094 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/10378 ,  H05K2201/10734 ,  H01L2924/00

Abstract: A semiconductor mounting board 80 is prepared by electrically joining an IC chip 70 via an interposer 60 of high rigidity to external pads 41 and internal pads 43, which are formed on the uppermost surface of a build-up layer 30. When the IC chip 70 generates heat, since pads 41 are positioned away from the center, a large shearing stress is applied to the portions at which pads 41 are joined to the interposer 60 in comparison to the portions at which pads 43 are joined to the interposer 60. Here, pads 41 are formed at substantially flat wiring portions and thus when joined to the interposer 60 by means of solder bumps 51, voids and angled portions, at which stress tends to concentrate, are not formed in the interiors of solder bumps 51. The joining reliability is thus high.

Abstract translation: 通过将IC芯片70通过高刚性的插入件60电连接到形成在积聚层30的最上表面上的外部焊盘41和内部焊盘43来制备半导体安装板80.当IC芯片70 产生热量，因为焊盘41位于远离中心的位置，与衬垫43接合到插入器60的部分相比，大的剪切应力施加到焊盘41接合到插入件60的部分。这里， 焊盘41形成在基本上平坦的布线部分处，因此当通过焊料凸块51接合到插入件60时，不会在焊料凸块51的内部形成空隙和倾斜部分，其中应力趋于集中。连接可靠性 因此高。

公开(公告)号：US07738257B2

公开(公告)日：2010-06-15

申请号：US11610385

申请日：2006-12-13

Applicant: Islam Salama ,  Yongki Min ,  Huankiat Seh

Inventor： Islam Salama ,  Yongki Min ,  Huankiat Seh

IPC: H05K1/18

CPC classification number: H05K1/162 ,  H05K1/0269 ,  H05K3/4644 ,  H05K3/4652 ,  H05K2201/0175 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09627 ,  H05K2201/09718 ,  H05K2201/09918 ,  H05K2203/0353 ,  Y10T29/4913 ,  Y10T29/49155

Abstract: A microelectronic device, a method of fabricating the device, and a system including the device. The device includes: a substrate including a polymer build-up layer, and a passive structure embedded in the substrate. The passive structure includes a top conductive layer overlying the polymer build-up layer, a dielectric layer overlying the top conductive layer, and a bottom conductive layer overlying the dielectric layer. The device further includes a conductive via extending through the polymer build-up layer and electrically insulated from the bottom conductive layer, an insulation material insulating the conductive via from the bottom conductive layer, and a bridging interconnect disposed at a side of the top conductive layer facing away from the dielectric layer, the bridging interconnect electrically connecting the conductive via to the top conductive layer.

Abstract translation: 微电子器件，制造该器件的方法以及包括该器件的系统。 该装置包括：包含聚合物累积层的基底和嵌入基底中的被动结构。 被动结构包括覆盖聚合物积聚层的顶部导电层，覆盖顶部导电层的电介质层和覆盖在电介质层上的底部导电层。 该器件还包括延伸穿过聚合物积聚层并与底部导电层电绝缘的导电通孔，将导电通孔与底部导电层绝缘的绝缘材料以及布置在顶部导电层侧面的桥接互连 背离电介质层，桥接互连将导电通孔电连接到顶部导电层。

公开(公告)号：US20100116540A1

公开(公告)日：2010-05-13

申请号：US12611261

申请日：2009-11-03

Applicant: Jun ISHII ,  Toshiki NAITOU ,  Mitsuru HONJO

Inventor： Jun ISHII ,  Toshiki NAITOU ,  Mitsuru HONJO

IPC: H05K1/11 ,  B05D5/12

CPC classification number: H05K3/4685 ,  G11B5/484 ,  G11B5/486 ,  H05K1/0228 ,  H05K1/0245 ,  H05K1/025 ,  H05K1/0265 ,  H05K1/056 ,  H05K3/06 ,  H05K2201/09236 ,  H05K2201/09254 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09627 ,  H05K2201/0979 ,  H05K2203/0323 ,  Y10T29/49155

Abstract: An end of a first line and an end of a second line of a first write wiring pattern are arranged on both sides of a third line of a second write wiring pattern. Circular connection portions are provided at the ends of the first line and the second line. In addition, through holes are formed in respective portions of a base insulating layer below the connection portions. Each connection portion comes in contact with a connecting region of a suspension body within the through hole.

Abstract translation: 第一写入布线图案的第一行的一端和第二行的末端布置在第二写入布线图案的第三行的两侧。 圆形连接部设置在第一线和第二线的端部。 此外，在连接部分下方的基底绝缘层的各个部分中形成通孔。 每个连接部分与通孔内的悬架体的连接区域接触。

公开(公告)号：US20100110590A1

公开(公告)日：2010-05-06

申请号：US12588797

申请日：2009-10-28

Applicant: Tetsuya Ohsawa ,  Hayato Abe ,  Yoshinari Yoshida ,  Toshiki Naito

Inventor： Tetsuya Ohsawa ,  Hayato Abe ,  Yoshinari Yoshida ,  Toshiki Naito

IPC: G11B5/60

CPC classification number: G11B13/04 ,  G11B5/4833 ,  G11B5/484 ,  G11B5/4853 ,  G11B2005/0021 ,  H05K1/056 ,  H05K1/182 ,  H05K3/06 ,  H05K3/445 ,  H05K2201/0394 ,  H05K2201/09509 ,  H05K2201/096 ,  H05K2201/0969 ,  H05K2201/10106 ,  H05K2201/10537 ,  H05K2201/10545 ,  H05K2201/10727 ,  H05K2203/0323 ,  H05K2203/0361

Abstract: A suspension board with circuit includes a conductive pattern, including a slider arranged on a surface side of the suspension board with circuit and mounted with a magnetic head, the magnetic head being electrically connected with the conductive pattern; and a light emitting device arranged on the back surface side of the suspension board with circuit and electrically connected with the conductive pattern, in which the conductive pattern includes a first terminal provided on a surface of the suspension board with circuit and electrically connected with the magnetic head; and a second terminal provided on the back surface of the suspension board with circuit and electrically connected with the light emitting device.

Abstract translation: 具有电路的悬挂板包括导电图案，包括布置在具有电路的悬挂板的表面侧上的滑块，并安装有磁头，磁头与导电图案电连接; 以及发光装置，其配置在具有电路的电路的背面侧并与导电图形电连接，其中导电图案包括设置在具有电路的悬挂板的表面上的第一端子，并与磁性电连接 头; 以及设置在所述悬挂板的后表面上并具有电路并与所述发光装置电连接的第二端子。

公开(公告)号：US07703199B2

公开(公告)日：2010-04-27

申请号：US11440316

申请日：2006-05-24

Applicant: David Vincent Caletka ,  Krishna Darbha ,  Donald W. Henderson ,  Lawrence P. Lehman ,  George Henry Thiel

Inventor： David Vincent Caletka ,  Krishna Darbha ,  Donald W. Henderson ,  Lawrence P. Lehman ,  George Henry Thiel

IPC: H05K3/30

CPC classification number: H01L23/49811 ,  B23K3/0623 ,  B23K2101/40 ,  H01L21/563 ,  H01L23/13 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05017 ,  H01L2224/05026 ,  H01L2224/05078 ,  H01L2224/05551 ,  H01L2224/05568 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/8121 ,  H01L2224/81385 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15787 ,  H05K1/113 ,  H05K3/284 ,  H05K3/3436 ,  H05K2201/0116 ,  H05K2201/0133 ,  H05K2201/0382 ,  H05K2201/068 ,  H05K2201/09036 ,  H05K2201/09509 ,  H05K2201/0969 ,  H05K2201/10674 ,  H05K2201/10977 ,  Y02P70/613 ,  Y10T29/49144 ,  Y10T29/49146 ,  Y10T29/49149 ,  Y10T29/49171 ,  H01L2924/00011 ,  H01L2924/00 ,  H01L2224/29099 ,  H01L2224/05552

Abstract: Solder balls, such as, low melt C4 solder balls undergo volume expansion during reflow. Where the solder balls are encapsulated, expansion pressure can cause damage to device integrity. A volume expansion region in the semiconductor chip substrate beneath each of the solder balls accommodates volume expansion. Air-cushioned diaphgrams, deformable materials and non-wettable surfaces may be used to permit return of the solder during cooling to its original site. A porous medium with voids sufficient to accommodate expansion may also be used.

Abstract translation: 诸如低熔点C4焊球的焊球在回流期间经历体积膨胀。 当焊球被封装时，膨胀压力可能会损坏器件的完整性。 每个焊球下方的半导体芯片基板中的体积扩展区容纳体积膨胀。 可以使用气垫缓冲图，可变形材料和不可润湿的表面，以允许在冷却期间焊料返回到其原始位置。 也可以使用具有足以适应膨胀的空隙的多孔介质。

公开(公告)号：US07691189B2

公开(公告)日：2010-04-06

申请号：US11736495

申请日：2007-04-17

Applicant: Honchin En ,  Tohru Nakai ,  Takeo Oki ,  Naohiro Hirose ,  Kouta Noda

Inventor： Honchin En ,  Tohru Nakai ,  Takeo Oki ,  Naohiro Hirose ,  Kouta Noda

IPC: C23C18/40 ,  B05D1/18

CPC classification number: H05K3/4644 ,  C23C18/1607 ,  C23C18/1653 ,  C23C18/22 ,  C23C18/30 ,  C23C18/34 ,  C23C18/405 ,  C23C28/00 ,  C23C28/023 ,  C23C28/42 ,  C25D3/38 ,  C25D5/022 ,  C25D5/18 ,  C25D5/34 ,  C25D7/123 ,  H01L2224/16225 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K3/0038 ,  H05K3/108 ,  H05K3/181 ,  H05K3/241 ,  H05K3/381 ,  H05K3/382 ,  H05K3/384 ,  H05K3/421 ,  H05K3/423 ,  H05K3/427 ,  H05K3/4602 ,  H05K3/4652 ,  H05K3/4661 ,  H05K2201/0215 ,  H05K2201/0344 ,  H05K2201/0347 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/0353 ,  H05K2203/0723 ,  H05K2203/1476 ,  H05K2203/1492 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: The present invention is directed to a process for manufacturing multilayer printed circuit boards which is capable of simultaneous via hole filling and formation of conductor circuit and via holes of good crystallinity, and by which uniform deposition can be constructed on a substrate and high-density wiring and highly reliable conductor connections can be realized without annealing.

Abstract translation: 本发明涉及一种制造多层印刷电路板的方法，该印刷电路板能够同时通孔填充和形成导体电路和具有良好结晶度的通孔，并且可以在基板和高密度布线上构造均匀的沉积 并且可以实现高可靠性的导体连接而不退火。

公开(公告)号：US20100052148A1

公开(公告)日：2010-03-04

申请号：US12541253

申请日：2009-08-14

Applicant: Shih-Ping Hsu

Inventor： Shih-Ping Hsu

IPC: H01L23/498

CPC classification number: H05K1/112 ,  H01L21/563 ,  H01L23/49816 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05111 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/73203 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/3011 ,  H05K3/3436 ,  H05K2201/094 ,  H05K2201/09436 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/10674 ,  H05K2201/10977 ,  Y02P70/613 ,  H01L2924/00014

Abstract: Provided are a package structure and a package substrate, including: a substrate body having a plurality of matrix-arranged electrical contact pads formed on at least one surface thereof, wherein a solder mask layer is formed on said surface and has a plurality of openings for exposing the electrical contact pads, respectively; a first electroless-plated layer disposed on the electrical contact pads, on the walls of the openings and at the peripheries of the openings; and a second electroless-plated layer disposed on the first electroless-plated layer, the first and second electroless-plated layers constituting a recessed electrical connection structure. By forming the even electroless-plated layers on the electrical contact pads. The invention overcomes drawbacks of the prior art, namely breakage of interfaces between solder bumps and electrical contact pads and even damage of the package structure otherwise caused by excessive differences in stress between the solder bumps.

Abstract translation: 提供一种封装结构和封装基板，包括：基板主体，其具有形成在其至少一个表面上的多个矩阵布置的电接触焊盘，其中在所述表面上形成焊接掩模层，并且具有多个开口， 分别暴露电接触垫; 设置在电接触垫上，开口壁上和开口周边的第一化学镀层; 以及设置在所述第一化学镀层上的第二无电镀层，所述第一和第二无电镀层构成凹陷的电连接结构。 通过在电接触焊盘上形成均匀的无电镀层。 本发明克服了现有技术的缺点，即焊料凸块与电接触焊盘之间的界面的破坏，甚至损坏包装结构，否则由焊料凸块之间的应力过大的差异引起。