Abstract:
A compact radio equipment includes internal circuits on two or more printed circuit boards electrically connected to each other and securely mounted in structure. With this structure, a first metal shield frame is mounted on a first printed circuit board to cover components mounted on the first printed circuit board. A second printed circuit board is mounted on the first metal shield frame.
Abstract:
Electronics packages are provided with structure that provides a significantly-reduced package footprint and also facilitates substantial reduction of package fabrication time and cost. The footprint reduction is realized with a frame that defines an aperture wall which surrounds first sets of components on the first side of a printed circuit board and also extends away from the printed circuit board to provide package input/output access along the perimeter of the package footprint. The second side of the printed circuit board receives a second set of components and this set is protected by a board fill. The frame and printed circuit board are configured for realization from frame and board panels whose planar forms substantially reduce package fabrication time and cost because they facilitate the use of modern high-speed printed circuit board (PCB) fabrication processes.
Abstract:
The present invention provides a semiconductor device which includes a U-shaped metal package base, and a semiconductor chip having at least surface electrodes and being mounted on the inner bottom portion of the U-shaped metal package base, wherein the metal package base has, in a portion thereof ranging from the opened side end portion of the inner side wall to the semiconductor chip, a creep-up preventive zone preventing solder entering from the opened side end portion from creeping up. The device makes it possible to solve problems which have been apprehended for conventional semiconductor devices configured as mounting a semiconductor chip on a small semiconductor package, in that reduction in distance between external terminal portions of the metal package and the semiconductor chip results in contact of a solder for mounting with the semiconductor chip to thereby adversely affect the electrical properties and reliability thereof, and in that resin filling or partial plating for avoiding intrusion of the solder raises the cost.
Abstract:
A multilayer module which includes parts-containing module whose circuit board has been mounted at one surface with electronic component and the electronic component is covered with resin layer. Connection terminals have been provided either at resin layer or at the other surface of circuit board, also through hole has been provided for connection between the two surfaces of module. Also included is module, which has been provided with connection terminals at a place corresponding to connection terminal, and through hole for connection between the connection terminals and electronic component. Disposed between conductor layer and conductor layer is insulation layer, which insulation layer having conductive bond for connection between connection terminals, respectively. In the above-described configuration, places of through hole and electronic component in module are not restricted by a location of through hole.
Abstract:
An electrical connector is disclosed to include an electrically insulative housing, which houses a plurality of metal contact pins, each metal contact pin having a bottom bonding face protruding over the bottom side of the housing, a metal shield, which is coupled to the housing and has two bonding portions at two sides, and a bonding adjustment architecture provided between the metal shield and the housing for allowing vertical movement of the metal shield relative to the housing to adjust the elevation of the bonding portions so that the bonding portions and the bonding face of each metal contact pin can be positively bonded to a circuit board by SMT.
Abstract:
An exemplary Electromagnetic Interference (EMI) shielding package (1) includes a substrate (10), a metal cap (15), and a potting compound (18). The substrate has a plurality of electronic components (11a, 11b, 12) fixed thereon. The metal cap includes a horizontal base panel (152) and a plurality of peripheral walls (151) vertical to the base panel. A related method for making the EMI shielding package includes: providing a substrate with a plurality of electronic components fixed thereon; providing a metal cap including a horizontal base panel and a plurality of peripheral walls vertical to the base panel; attaching the walls to the substrate, thereby covering selected one or more of the electronic components that need to be shielded with the metal cap; sealing the electronic components and the metal cap with a potting compound; and curing the potting compound to form an encapsulation.
Abstract:
A technique for eliminating electrically conductive vias is disclosed. In one embodiment, the technique is realized as an improved multilayer circuit board for eliminating electrically conductive vias. The multilayer circuit board has a top layer and a buried layer separated by at least one dielectric layer, wherein the buried layer includes an electrically conductive power plane portion and an electrically conductive ground plane portion. The improvement comprises a cavity in the multilayer circuit board extending through the top layer and the at least one dielectric layer so as to expose at least a portion of the power plane portion and the ground plane portion of the buried layer within the cavity. The cavity is sized to accommodate an electronic component therein such that the electronic component makes electrical contact with the exposed portion of the power plane portion and the ground plane portion of the buried layer, thereby eliminating the need for electrically conductive vias electrically connected to the power plane portion and the ground plane portion of the buried layer.
Abstract:
The present invention provides a semiconductor device which comprises a U-shaped metal package base, and a semiconductor chip having at least surface electrodes and being mounted on the inner bottom portion of the U-shaped metal package base, wherein the metal package base has, in a portion thereof ranging from the opened side end portion of the inner side wall to the semiconductor chip, a creep-up preventive zone preventing solder entering from the opened side end portion from creeping up. The device makes it possible to solve problems which have been apprehended for conventional semiconductor devices configured as mounting a semiconductor chip on a small semiconductor package, in that reduction in distance between external terminal portions of the metal package and the semiconductor chip results in contact of a solder for mounting with the semiconductor chip to thereby adversely affect the electrical properties and reliability thereof, and in that resin filling or partial plating for avoiding intrusion of the solder raises the cost.
Abstract:
The invention proposes an assembly including a printed-circuit electronics card (2) mounted on a metal substrate (1), as well as a metal screening cover (3) electrically connected to the substrate (1). The substrate (1) exhibits a recessed gutter (4) in which the edge of the cover (3) is accommodated. The said edge is crimped onto the said substrate (1) in the gutter (4). The invention also proposes a method of producing such an assembly.
Abstract:
This disclosure concerns systems and devices configured to implement impedance matching schemes in a high speed data transmission environment. In one example, an optoelectronic assembly is provided that includes a TO package having a base through which one or more leads pass. The leads are electrically coupled to an optoelectronic device in the TO package, and are electrically isolated from the base. Some or all of the leads include a ground ring that is electrically isolated from the lead and electrically coupled with the base. A circuit interconnect is also included that is electrically coupled to the optoelectronic device and the TO package. The circuit interconnect includes a dielectric substrate having signal traces that are electrically coupled to the signal leads. A ground signal conductor disposed on the dielectric substrate is electrically coupled with the ground rings.