公开(公告)号：US07718900B2

公开(公告)日：2010-05-18

申请号：US11298675

申请日：2005-12-12

Applicant: Eiji Takaike

Inventor： Eiji Takaike

IPC: H05K1/00

CPC classification number: H01L23/5389 ,  H01L21/568 ,  H01L21/6835 ,  H01L24/19 ,  H01L24/24 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2223/6677 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/24137 ,  H01L2224/24227 ,  H01L2224/24265 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06572 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/351 ,  H01L2924/3511 ,  H05K1/185 ,  H05K1/189 ,  H05K3/28 ,  H05K3/361 ,  H05K2201/0367 ,  H05K2201/055 ,  H05K2201/10666 ,  H01L2224/82 ,  H01L2924/00

Abstract: An electronic parts packaging structure including an insulating layer acting as a flexible substrate, an electronic parts buried in the insulating layer in a state that a whole electronic parts is covered with the insulating layer, and a wiring layer buried in the insulating layer and connected electrically to a connection pad of the electronic parts. A structure body in which a plurality of electronic parts are buried in the insulating layer may be folded and electronic parts may be connected electrically.

Abstract translation: 一种电子部件封装结构，包括充当柔性基板的绝缘层，在整个电子部件被绝缘层覆盖的状态下埋入绝缘层中的电子部件，以及埋入绝缘层中的电连接并电连接 到电子部件的连接垫。 可以折叠多个电子部件埋在绝缘层中的结构体，电子部件可以电连接。

公开(公告)号：US20100090324A1

公开(公告)日：2010-04-15

申请号：US12474429

申请日：2009-05-29

Applicant: Hye-Jin KIM

Inventor： Hye-Jin KIM

IPC: H01L23/52 ,  H01L23/48 ,  H01L23/488

CPC classification number: H01L23/49816 ,  H01L23/3128 ,  H01L23/49827 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/181 ,  H05K3/3436 ,  H05K2201/09572 ,  H05K2201/10666 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor package having a solder ball having a double connection structure which reduces a total height of a package on package (POP). The semiconductor package includes a first semiconductor package in which a semiconductor device is mounted on a lower surface of a first substrate, and a through hole is formed in a solder ball pad region of the first substrate, a second semiconductor package in which a semiconductor device is mounted on an upper surface of a second substrate, and a solder ball pad of the second substrate is formed to correspond to the through hole of the first substrate and is mounted on the first substrate, and a common solder ball that is disposed below the first substrate and is connected to the solder ball pad of the second substrate through the through hole.

Abstract translation: 一种具有双重连接结构的焊球的半导体封装，其减少了封装（POP）上的封装的总高度。 半导体封装包括第一半导体封装，其中半导体器件安装在第一衬底的下表面上，并且通孔形成在第一衬底的焊球焊盘区域中;第二半导体封装，其中半导体器件 安装在第二基板的上表面上，并且形成第二基板的焊球垫，以对应于第一基板的通孔，并且安装在第一基板上，并且配置公共焊球， 并且通过通孔与第二基板的焊球焊盘连接。

公开(公告)号：US20090294953A1

公开(公告)日：2009-12-03

申请号：US12471712

申请日：2009-05-26

Applicant: Lu-Chen Hwan ,  Po Ching Chen

Inventor： Lu-Chen Hwan ,  Po Ching Chen

IPC: H01L23/522 ,  H01L21/50

CPC classification number: H01L23/49572 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/13099 ,  H01L2224/1319 ,  H01L2224/133 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07811 ,  H01L2924/12041 ,  H01L2924/12043 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/16195 ,  H05K3/321 ,  H05K2201/10666 ,  H05K2201/10727 ,  H01L2924/00 ,  H01L2924/00014

Abstract: The present invention discloses an integrated circuit module and method of manufacturing the same. The integrated circuit module includes a chip and a carrier supporting the chip. The carrier defines a front side and a back side, and the chip is disposed on the front side. The carrier includes a first insulating layer defining a first opening at the back side, a second insulating layer defining a second opening and a chip accommodation opening at the front side, and a patterned conductive layer sandwiched in between the first insulating layer and the second insulating layer. The patterned conductive layer is formed with an inner contacting portion exposed through the chip accommodation opening and an outer contacting portion exposed through the first opening and the second opening. The inner contacting portion is connected to the chip through the chip accommodation opening. The outer contacting portion is provided for electronically connecting an electronic device to the patterned conductive layer selectively at the front side through the second opening and at the back side through the first opening.

Abstract translation: 本发明公开了一种集成电路模块及其制造方法。 集成电路模块包括芯片和支持芯片的载体。 载体限定前侧和后侧，并且芯片设置在前侧。 载体包括限定在后侧的第一开口的第一绝缘层，限定第二开口的第二绝缘层和在前侧的芯片容纳开口，以及夹在第一绝缘层和第二绝缘层之间的图案化导电层 层。 图案化导电层形成有通过芯片容纳开口暴露的内部接触部分和通过第一开口和第二开口露出的外部接触部分。 内部接触部分通过芯片容纳开口连接到芯片。 外部接触部分被设置用于通过第二开口在电子设备和图案化导电层的前侧选择性地连接电子器件，并且通过第一开口在后侧。

公开(公告)号：US07619496B2

公开(公告)日：2009-11-17

申请号：US11977276

申请日：2007-10-24

Applicant: Alexandre Rogozine

Inventor： Alexandre Rogozine

IPC: H01P1/205 ,  H01P1/213

CPC classification number: H01P1/2056 ,  H01P1/2136 ,  H05K1/0243 ,  H05K3/3442 ,  H05K2201/10068 ,  H05K2201/10666

Abstract: A resonator/filter adapted for direct surface mounting to the surface of a printed circuit board. The resonator/filter comprises a block of dielectric material including at least one resonator through-hole extending therethrough and respective top, bottom and side surfaces defining respective regions of dielectric material covered with conductive material. The top block surface defines at least a first conductive region. A second conductive region on the bottom surface of the block defines an input/output contact which allows the filter to be mounted on the board with the bottom filter surface seated thereon, thus providing a direct ground contact between the board and the resonator through-hole for improved attenuation performance particularly at higher frequencies. A plurality of transmission line embodiments electrically interconnect the first and second conductive regions.

Abstract translation: 适用于直接表面安装到印刷电路板表面的谐振器/滤波器。 谐振器/滤波器包括介电材料块，其包括延伸穿过其中的至少一个谐振器通孔以及限定用导电材料覆盖的介电材料的相应区域的相应顶部，底部和侧面。 顶部块表面限定至少第一导电区域。 块的底表面上的第二导电区域限定了输入/输出触点，其允许滤波器安装在板上，底部滤波器表面位于其上，从而在板和谐振器通孔之间提供直接接地 用于改善衰减性能，特别是在较高频率下。 多个传输线实施例将第一和第二导电区域电互连。

公开(公告)号：US07566961B2

公开(公告)日：2009-07-28

申请号：US11609840

申请日：2006-12-12

Applicant: Yeoung-Jun Cho

Inventor： Yeoung-Jun Cho

IPC: H01L23/02

CPC classification number: H05K3/3436 ,  H01L23/49816 ,  H01L25/105 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/0002 ,  H05K2201/0379 ,  H05K2201/10515 ,  H05K2201/10666 ,  H05K2201/10734 ,  H05K2203/0455 ,  Y02P70/613 ,  H01L2924/00

Abstract: A multi-stacked package includes a first package, a second package and a combining member. The second package supports the first package, and is electrically connected to the first package and has at least one joint hole. The combining member extends from the first package to below the second package to pass through the joint hole so that the combining member is partially exposed to improve the coherence between the first package and the second package.

Abstract translation: 多层堆叠包括第一包装，第二包装和组合部件。 第二包装件支撑第一包装，并且电连接到第一包装并且具有至少一个接合孔。 组合构件从第一包装延伸到第二包装下方以通过接合孔，使得组合构件部分地露出以改善第一包装和第二包装之间的相干性。

公开(公告)号：US20090178829A1

公开(公告)日：2009-07-16

申请号：US12352038

申请日：2009-01-12

Applicant: Tsui-Chuan WANG ,  Chin-Mei HUANG

Inventor： Tsui-Chuan WANG ,  Chin-Mei HUANG

IPC: H05K1/00

CPC classification number: H05K1/118 ,  H05K3/363 ,  H05K2201/09481 ,  H05K2201/09709 ,  H05K2201/10666

Abstract: An anti-breakage structure for a transmitting end of flexible printed circuitboard (FPC) is disclosed, which comprises at least a via hole, being formed on the FPC at a position corresponding to each pin of the transmitting end while enabling the at least one via hole formed on any two neighboring pins to be arranged in a staggered manner without being align on the same line. As the via holes formed on any two neighboring pins of the FPC's transmitting end are not aligned with each other but are scattered so that the area where stress is likely to concentrate is increased when the FPC is subjected to an external force, stresses can be distributed evenly through the whole transmitting end of the FPC without forming any specific stress concentration area.

Abstract translation: 公开了一种用于柔性印刷电路板（FPC）的发送端的防破坏结构，其至少包括通孔，其在与发送端的每个引脚相对应的位置处形成在FPC上，同时使得至少一个通孔 在任何两个相邻销上形成的孔以交错方式布置而不在同一条线上对齐。 由于形成在FPC的发送端的任何两个相邻销上的通孔彼此不对齐，而是被散射，使得当FPC受到外力时，应力易集中的区域增加，可以分布应力 均匀地穿过FPC的整个传送端，而不形成任何特定的应力集中区域。

公开(公告)号：US20080277142A1

公开(公告)日：2008-11-13

申请号：US12081835

申请日：2008-04-22

Applicant: Hitoki Kanagawa ,  Tetsuya Ohsawa ,  Yasunari Ooyabu

Inventor： Hitoki Kanagawa ,  Tetsuya Ohsawa ,  Yasunari Ooyabu

IPC: H05K1/00

CPC classification number: H05K1/112 ,  G11B5/4833 ,  H01L2224/11003 ,  H01L2224/742 ,  H05K1/056 ,  H05K3/06 ,  H05K3/244 ,  H05K3/28 ,  H05K3/363 ,  H05K3/44 ,  H05K2201/0394 ,  H05K2201/09063 ,  H05K2201/0969 ,  H05K2201/10666 ,  H05K2203/0323 ,  H05K2203/041 ,  H05K2203/0455 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49204

Abstract: A wired circuit board having terminals that can provide reliable placement of molten metals on the terminals, to connect between the terminals and the external terminals with a high degree of precision. An insulating base layer 3 is formed on a supporting board 2, and a conductive pattern 4 is formed on the insulating base layer 3 so that a number of lines of wire 4a, 4b, 4c, 4d, magnetic head connecting terminals 7, and external connecting terminals 8 are integrally formed and also first through holes 9 are formed in the external connecting terminals 8. Thereafter, after an insulating cover layer 10 is formed, third through holes 20 and second through holes 19 are formed in the supporting board 2 and in the insulating base layer 3, respectively, to communicate with the first through holes 9. This can provide the result that when the external connecting terminals 8 are connected to the external terminals 23, the connection can be performed while confirming the placement of the solder balls 21 from the respective through holes.

Abstract translation: 一种具有端子的布线电路板，其端子可以提供熔融金属在端子上的可靠放置，以高精度连接端子和外部端子。 绝缘基层3形成在支撑基板2上，导电图案4形成在基底绝缘层3上，使得多条导线4a，4b，4c，4d的线，磁头连接端子 如图7所示，外部连接端子8一体形成，并且第一通孔9形成在外部连接端子8中。 此后，在形成绝缘覆盖层10之后，分别在支撑板2和绝缘基底层3中形成第三通孔20和第二通孔19，以与第一通孔9连通。 这可以得到当外部连接端子8连接到外部端子23时的结果，可以在确认从各个通孔放置焊球21的同时进行连接。

公开(公告)号：US07448923B2

公开(公告)日：2008-11-11

申请号：US11562905

申请日：2006-11-22

Applicant: Harshad K Uka

Inventor： Harshad K Uka

IPC: H01R4/02

CPC classification number: H05K3/363 ,  H01R4/024 ,  H01R12/62 ,  H01R43/0235 ,  H01R43/0249 ,  H01R43/0256 ,  H05K2201/09036 ,  H05K2201/09063 ,  H05K2201/10666 ,  H05K2201/2036 ,  H05K2203/063 ,  H05K2203/1178

Abstract: Conductive pads of a flex circuit may be electrically connected to conductive pads of a rigid circuit board. The conductive pads of the flex circuit may be sized, configured and alignable to the conductive pads of the rigid circuit board. A spacer with a plurality of apertures may be sized, configured and aligned to the conductive pads of the flex circuit and the rigid circuit board. Solder paste may be disposed between respective conductive pads of the flex circuit and the rigid circuit board within the apertures of the spacer. When the flex circuit, rigid circuit board and the spacer are assembled, the solder paste is displaced through relief vents formed through the conductive pads of the flex circuit, rigid circuit board or both the flex circuit or rigid circuit board. The solder paste is reflowed and forms a rivet structure attaching the flex circuit to the rigid circuit board as well as providing an electrical connection between the conductive pads of the flex circuit and the rigid circuit board.

Abstract translation: 柔性电路的导电焊盘可以电连接到刚性电路板的导电焊盘。 柔性电路的导电焊盘的尺寸，构造和对准刚性电路板的导电焊盘。 具有多个孔的间隔物的尺寸，配置和对准到柔性电路和刚性电路板的导电垫。 焊膏可以设置在柔性电路的相应导电焊盘和间隔件的孔内的刚性电路板之间。 当柔性电路，刚性电路板和间隔件组装时，焊膏通过柔性电路，刚性电路板或柔性电路或刚性电路板的导电焊盘形成的通孔形成位移。 焊膏被回流并且形成将柔性电路连接到刚性电路板的铆钉结构，以及在柔性电路的导电焊盘和刚性电路板之间提供电连接。

公开(公告)号：US20080139011A1

公开(公告)日：2008-06-12

申请号：US11562905

申请日：2006-11-22

Applicant: Harshad K. Uka

Inventor： Harshad K. Uka

IPC: H01R12/00

CPC classification number: H05K3/363 ,  H01R4/024 ,  H01R12/62 ,  H01R43/0235 ,  H01R43/0249 ,  H01R43/0256 ,  H05K2201/09036 ,  H05K2201/09063 ,  H05K2201/10666 ,  H05K2201/2036 ,  H05K2203/063 ,  H05K2203/1178

Abstract: Conductive pads of a flex circuit may be electrically connected to conductive pads of a rigid circuit board. The conductive pads of the flex circuit may be sized, configured and alignable to the conductive pads of the rigid circuit board. A spacer with a plurality of apertures may be sized, configured and aligned to the conductive pads of the flex circuit and the rigid circuit board. Solder paste may be disposed between respective conductive pads of the flex circuit and the rigid circuit board within the apertures of the spacer. When the flex circuit, rigid circuit board and the spacer are assembled, the solder paste is displaced through relief vents formed through the conductive pads of the flex circuit, rigid circuit board or both the flex circuit or rigid circuit board. The solder paste is reflowed and forms a rivet structure attaching the flex circuit to the rigid circuit board as well as providing an electrical connection between the conductive pads of the flex circuit and the rigid circuit board.

Abstract translation: 柔性电路的导电焊盘可以电连接到刚性电路板的导电焊盘。 柔性电路的导电焊盘的尺寸，构造和对准刚性电路板的导电焊盘。 具有多个孔的间隔物的尺寸，配置和对准到柔性电路和刚性电路板的导电垫。 焊膏可以设置在柔性电路的相应导电焊盘和间隔件的孔内的刚性电路板之间。 当柔性电路，刚性电路板和间隔件组装时，焊膏通过柔性电路，刚性电路板或柔性电路或刚性电路板的导电焊盘形成的通孔形成位移。 焊膏被回流并且形成将柔性电路连接到刚性电路板的铆钉结构，以及在柔性电路的导电焊盘和刚性电路板之间提供电连接。

公开(公告)号：US20070053167A1

公开(公告)日：2007-03-08

申请号：US11517402

申请日：2006-09-08

Applicant: Jun Ueda

Inventor： Jun Ueda

IPC: H05K7/20

CPC classification number: H01L23/3121 ,  H01L23/66 ,  H01L24/45 ,  H01L24/48 ,  H01L25/162 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/07811 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/1305 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/1532 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19106 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0218 ,  H05K1/0237 ,  H05K1/144 ,  H05K1/145 ,  H05K2201/0715 ,  H05K2201/10378 ,  H05K2201/10477 ,  H05K2201/10666 ,  H05K2201/2018 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: An electronic circuit module includes (i) a semiconductor integrated circuit component which is a transistor integrated circuit formed on a semiconductor substrate, (ii) a passive element component constituting a peripheral circuit of the semiconductor integrated circuit component, and (iii) first and second circuit substrates each of which has a component mounting surface on which at least one of the semiconductor integrated circuit component and the passive element component. The respective component mounting surfaces of the first and second circuit substrate face one another. The first circuit substrate functions as one outer wall of a housing, where the electronic circuit module contacts an external circuit substrate on which the electronic circuit module is mounted. The second circuit substrate functions as the other outer wall of the housing of the module.

Abstract translation: 电子电路模块包括：（i）半导体集成电路部件，其是形成在半导体基板上的晶体管集成电路，（ii）构成半导体集成电路部件的外围电路的无源元件部件，以及（iii）第一和第二 电路基板，每个基板具有其上至少一个半导体集成电路部件和无源元件部件的部件安装表面。 第一和第二电路基板的各个部件安装表面彼此面对。 第一电路基板用作壳体的一个外壁，其中电子电路模块接触安装有电子电路模块的外部电路基板。 第二电路基板用作模块壳体的另一个外壁。