公开(公告)号：US11847851B2

公开(公告)日：2023-12-19

申请号：US17675832

申请日：2022-02-18

Applicant: INVENSENSE, INC.

Inventor： Julius Ming-Lin Tsai ,  Mike Daneman ,  Sanjiv Kapoor

IPC: B06B1/06 ,  B81B7/00 ,  G06V40/13 ,  B81C1/00 ,  G01H11/08

CPC classification number: G06V40/1306 ,  B06B1/067 ,  B06B1/0666 ,  B81B7/007 ,  B81C1/00238 ,  B81C1/00246 ,  B81C1/00301 ,  G01H11/08 ,  B06B2201/70 ,  B81B2201/0271 ,  B81B2201/032 ,  B81B2203/0127 ,  B81B2207/012 ,  B81B2207/015 ,  B81C2201/0105 ,  B81C2201/0109 ,  B81C2203/035 ,  B81C2203/036 ,  B81C2203/0792

Abstract: Microelectromechanical (MEMS) devices and associated methods are disclosed. Piezoelectric MEMS transducers (PMUTs) suitable for integration with complementary metal oxide semiconductor (CMOS) integrated circuit (IC), as well as PMUT arrays having high fill factor for fingerprint sensing, are described.

公开(公告)号：US11800297B2

公开(公告)日：2023-10-24

申请号：US17494120

申请日：2021-10-05

Applicant: INVENSENSE, INC.

Inventor： Roberto Brioschi ,  Kazunori Hayata ,  JR-Cheng Yeh ,  Dinesh Kumar Solanki

IPC: H04R19/04 ,  B81B7/00 ,  B81C1/00 ,  H04R1/04 ,  H04R3/00

CPC classification number: H04R19/04 ,  B81B7/0064 ,  B81C1/00333 ,  H04R1/04 ,  H04R3/00 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81B2201/0271 ,  B81B2201/0292 ,  B81B2203/0127 ,  B81B2207/015 ,  B81C2203/0109 ,  H04R2201/003

Abstract: A MEMS sensor includes a through hole to allow communication with an external environment, such as to send or receive acoustic signals or to be exposed to the ambient environment. In addition to the information that is being measured, light energy may also enter the environment of the sensor via the through hole, causing short-term or long-term effects on measurements or system components. A light mitigating structure is formed on or attached to a lid of the MEMS die to absorb or selectively reflect the received light in a manner that limits effects on the measurements or interest and system components.

公开(公告)号：US20230303389A1

公开(公告)日：2023-09-28

申请号：US17702599

申请日：2022-03-23

Applicant: Exo Imaging, Inc.

Inventor： Liang WANG ,  David KREVOR ,  Naresh MANTRAVADI ,  Brian BIRCUMSHAW ,  Jason TAUSCHER

IPC: B81C1/00 ,  B81B7/00

CPC classification number: B81C1/00825 ,  B81B7/0016 ,  B81B2201/0271 ,  B81B2207/012 ,  B81C2203/0792

Abstract: Described herein are methods and systems useful in the fabrication of ultrasound transducer devices. Fabrication of ultrasound transducer devices can comprise manipulation of components having extremely small cross-sectional thicknesses, which can increase the risk of damage to the components. For example, inadvertent application of forces sufficient to damage such components is a significant risk during fabrication steps. As described herein, the risk of damage to an ultrasound transducer device component having a small cross-sectional thickness, such as an ultrasound microelectromechanical system (MEMS) wafer, can be reduced by partially or completely coating or filling all or a portion of the component with a stabilizing material, for example, prior to subjecting the component to forces associated with manipulation of the component during the fabrication process.

公开(公告)号：US20230278856A1

公开(公告)日：2023-09-07

申请号：US18315799

申请日：2023-05-11

Applicant: Taiwan Semiconductor manufacturing Co., Ltd.

Inventor： Yu-Chia Liu ,  Chia-Hua Chu ,  Chun-Wen Cheng

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81B7/0006 ,  B81C1/00246 ,  B81B7/0051 ,  B81B2201/0264 ,  B81B2201/0271 ,  B81B2201/0257 ,  B81C2203/0714 ,  B81C2201/112 ,  B81C2201/0176 ,  B81C2201/0181 ,  B81C2201/0132 ,  B81C2201/0133 ,  B81C2203/0735

Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.

公开(公告)号：US11703330B2

公开(公告)日：2023-07-18

申请号：US16836387

申请日：2020-03-31

Applicant: The Regents of the University of California

Inventor： Andrei M. Shkel ,  Mohammad H. Asadian Ardakani ,  Yusheng Wang

IPC: G01C19/5719 ,  B81C1/00 ,  H03H3/007 ,  H03H9/10 ,  B81B3/00 ,  G01C19/5691 ,  B81B7/00

CPC classification number: G01C19/5719 ,  B81C1/00182 ,  H03H3/0072 ,  H03H9/1057 ,  B81B3/0051 ,  B81B7/0016 ,  B81B2201/0242 ,  B81B2201/0271 ,  B81B2203/0127 ,  B81B2203/0172 ,  B81C1/00158 ,  G01C19/5691

Abstract: A dual-shell architecture and methods of fabrication of fused quartz resonators is disclosed. The architecture may include two encapsulated and concentric cavities using plasma-activated wafer bonding followed by the high-temperature glassblowing. The dual-shell architecture can provide a protective shield as well as a “fixed-fixed” anchor for the sensing element of the resonators. Structures can be instrumented to operate as a resonator, a gyroscope, or other vibratory sensor and for precision operation in a harsh environment. Methods for fabricating a dual-shell resonator structure can include pre-etching cavities on a cap wafer, pre-etching cavities on a device wafer, bonding the device wafer to a substrate wafer to form a substrate pair and aligning and bonding the cap wafer to the substrate pair to form a wafer stack with aligned cavities including a cap cavity and a device cavity. The wafer stack may be glassblown to form a dual-shell structure.

公开(公告)号：US11697586B2

公开(公告)日：2023-07-11

申请号：US17027751

申请日：2020-09-22

Applicant: Teknologian tutkimuskeskus VTT Oy

Inventor： Aarne Oja ,  Jaakko Saarilahti

IPC: B81B7/00 ,  B81C1/00 ,  G01L9/00

CPC classification number: B81B7/0048 ,  B81C1/00325 ,  G01L9/0072 ,  B81B2201/0264 ,  B81B2201/0271 ,  B81B2203/0127 ,  B81B2203/04 ,  B81C2201/0132

Abstract: The present publication discloses a micromechanical structure including at least one active element, the micromechanical structure comprising a substrate, at least one layer formed on the substrate forming the at least part of the at least one active element, mechanical contact areas through which the micromechanical structure can be connected to other structures like printed circuit boards and like. In accordance with the invention the micromechanical structure includes weakenings like trenches around the mechanical contact areas for eliminating the thermal mismatch between the active element of the micromechanical structure and the other structures.

公开(公告)号：US11685650B2

公开(公告)日：2023-06-27

申请号：US16983141

申请日：2020-08-03

Applicant: SiTime Corporation

Inventor： Aaron Partridge ,  Markus Lutz ,  Pavan Gupta

IPC: H01L23/051 ,  B81C1/00 ,  H01L41/113 ,  B81B7/00

CPC classification number: B81C1/00277 ,  B81B7/007 ,  B81B7/0035 ,  B81B7/0058 ,  B81C1/00269 ,  B81C1/00301 ,  H01L23/051 ,  H01L41/1136 ,  B81B2201/0271 ,  B81B2203/0315 ,  B81B2203/04 ,  B81B2207/07 ,  B81C2201/0171 ,  B81C2203/031 ,  B81C2203/036 ,  B81C2203/037 ,  B81C2203/038 ,  H01L2924/0002 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor layer having an opening and a MEMS resonator formed in the opening is disposed between first and second substrates to encapsulate the MEMS resonator. An electrical contact that extends from the opening to an exterior of the MEMS device is formed at least in part within the semiconductor layer and at least in part within the first substrate.

公开(公告)号：US20230172068A1

公开(公告)日：2023-06-01

申请号：US17539206

申请日：2021-12-01

Applicant: Vanguard International Semiconductor Corporation

Inventor： RAKESH CHAND ,  MUNIANDY SHUNMUGAM ,  RAMACHANDRAMURTHY PRADEEP YELEHANKA

IPC: H01L41/23 ,  H01L41/16 ,  H01L41/09 ,  H01L41/113 ,  B81B7/00

CPC classification number: H01L41/23 ,  H01L41/16 ,  H01L41/09 ,  H01L41/1132 ,  B81B7/0032 ,  B81B2201/0271 ,  B81B2201/0235 ,  B81B2201/0242

Abstract: A method of fabricating a semiconductor substrate includes the following steps. A first wafer is provided and a first surface of the first wafer is etched to form a plurality of cavities. A second wafer is formed on the first surface, where forming the second wafer includes the following steps: providing a core substrate; forming a first insulating layer on the core substrate; and depositing a polysilicon layer on the first insulating layer and the core substrate. In addition, the polysilicon layer is bonded with the first wafer to cover the cavities, where the polysilicon layer is disposed between the first insulating layer and the first wafer. In addition, a semiconductor substrate and MEMS devices using the semiconductor substrate are also provided.

公开(公告)号：US11655141B2

公开(公告)日：2023-05-23

申请号：US16585283

申请日：2019-09-27

Applicant: BFLY OPERATIONS, INC.

Inventor： Jianwei Liu ,  Keith G. Fife ,  Joseph Lutsky ,  Lingyun Miao

IPC: B81B7/00 ,  B81C1/00 ,  H04R31/00 ,  A61B8/00 ,  G10K13/00 ,  G10K11/28

CPC classification number: B81B7/0038 ,  A61B8/4483 ,  B81C1/00158 ,  G10K13/00 ,  H04R31/003 ,  B81B2201/0271 ,  G10K11/28

Abstract: A method of forming an ultrasound transducer device includes bonding a membrane to a substrate so as to form a sealed cavity between the membrane and the substrate. An exposed surface located within the sealed cavity includes a getter material that is electrically isolated from a bottom electrode of the cavity.

公开(公告)号：US20230142881A1

公开(公告)日：2023-05-11

申请号：US17986280

申请日：2022-11-14

Applicant: Northeastern University

Inventor： Matteo RINALDI ,  Flavius POP ,  Bernard HERRERA

IPC: B81B3/00

CPC classification number: B81B3/0021 ,  H01L41/1138 ,  B81B2201/0271 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81B2203/04 ,  B81B2207/053

Abstract: Devices for ultrasonic transmission and/or reception having a piezoelectric micromachined ultrasonic transducer (pMUT). The device employs a material such as lithium niobate as a piezoelectric layer in a membrane suspended over a cavity. Two activation electrodes on an upper surface of the membrane can activate one or more flexural modes of mechanical vibration in the membrane, the flexural modes of vibration including a displacement in a cross-sectional plane of the membrane. The device can be used individually or in an array. The device can be configured for use in a liquid medium or in biological tissue. A method of operating an ultrasonic transducer is provided. A method of fabrication of an ultrasonic transducer is provided.