公开(公告)号：US07338290B2

公开(公告)日：2008-03-04

申请号：US11585959

申请日：2006-10-25

Applicant: Kenji Motohashi ,  Takashi Yanagimoto ,  Hideji Miyanishi ,  Kazumasa Aoki

Inventor： Kenji Motohashi ,  Takashi Yanagimoto ,  Hideji Miyanishi ,  Kazumasa Aoki

IPC: H01R12/00 ,  H05K1/00

CPC classification number: H05K1/117 ,  H05K1/0224 ,  H05K1/0298 ,  H05K2201/0792 ,  H05K2201/093 ,  H05K2201/09381 ,  H05K2201/0969 ,  H05K2201/09727

Abstract: A design rule for a printed wiring board is provided. A conductive layer and a pad are separate from each other in a distance defined by the design rule, which sufficiently prevents the capacitance coupling between the conductive layer and the pad.

Abstract translation: 提供印刷电路板的设计规则。 导电层和焊盘在由设计规则限定的距离内彼此分开，这足以防止导电层和焊盘之间的电容耦合。

公开(公告)号：US20080042852A1

公开(公告)日：2008-02-21

申请号：US11656520

申请日：2007-01-23

Applicant: Shunji Baba ,  Shigeru Hashimoto ,  Yoshiyasu Sugimura ,  Tsuyoshi Niwata

Inventor： Shunji Baba ,  Shigeru Hashimoto ,  Yoshiyasu Sugimura ,  Tsuyoshi Niwata

IPC: G08B13/14 ,  H01L23/02

CPC classification number: G06K19/07749 ,  G06K19/077 ,  G06K19/07728 ,  H05K1/0271 ,  H05K1/189 ,  H05K2201/09727 ,  H05K2201/2009

Abstract: The RFID tag includes a base that can bend and unbend; a communication antenna wired on the base; a circuit chip that is electrically connected to the antenna and performs radio communication via the antenna; a reinforcing member as a chip reinforcing member that covers at least the periphery of the circuit chip and a section of the antenna wiring, the covering preformed at least in an upper side with respect to the base designated as a bottom, and that has a concavo-convex shape and intersects with the antenna wiring at a concave section of the concavo-convex shape; and an adhesive that adheres the reinforcing member to the base, and in which an edge along a concave section of the edge of the reinforcing member traverses over the antenna.

Abstract translation: RFID标签包括可以弯曲和不弯曲的基座; 连接在基座上的通信天线; 与天线电连接并通过天线执行无线电通信的电路芯片; 作为至少覆盖电路芯片的周边和天线布线的一部分的芯片加强构件​​的加强构件，所述覆盖件至少在相对于被指定为底部的基部的上侧预先形成，并且具有凹部 并且在凹凸形状的凹部与天线配线相交; 以及粘合剂，其将加强构件粘附到基部，并且其中沿着加强构件的边缘的凹部的边缘穿过天线。

公开(公告)号：US07332816B2

公开(公告)日：2008-02-19

申请号：US10108628

申请日：2002-03-29

Applicant: Naohiro Hirose ,  Takashi Kariya ,  Yoji Mori

Inventor： Naohiro Hirose ,  Takashi Kariya ,  Yoji Mori

IPC: H01L23/48 ,  H01K1/11 ,  H01K7/00

CPC classification number: H01R9/09 ,  H01L23/12 ,  H01L23/48 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H05K1/0256 ,  H05K1/0263 ,  H05K1/0265 ,  H05K1/0271 ,  H05K1/113 ,  H05K1/115 ,  H05K1/116 ,  H05K3/184 ,  H05K3/241 ,  H05K3/382 ,  H05K3/4602 ,  H05K3/4661 ,  H05K2201/09227 ,  H05K2201/09236 ,  H05K2201/09254 ,  H05K2201/09272 ,  H05K2201/09454 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09627 ,  H05K2201/09727 ,  H05K2201/09781 ,  H05K2201/10734 ,  H05K2203/0594 ,  Y10T29/49155 ,  Y10T29/49194 ,  Y10T428/31504

Abstract: A filet F is added to a portion constituting a corner portion C equal to or smaller than 90° in a crossing portion X of wiring patterns 58b, 58c and 58d, and a wiring pattern 58 is formed. Since the filet F is added, the wiring patterns are not made thin and are not disconnected in the crossing portion X. Further, since there is no stress concentrated to the crossing portion X, disconnection is not caused in the wiring patterns and no air bubbles are left between the crossing portion X of the wiring patterns and an interlayer resin insulating layer so that reliability of a printed wiring board is improved.

Abstract translation: 在布线图案58b，58c和58d的交叉部分X中，将构图F添加到构成等于或小于90°的拐角部分C的部分，并且形成布线图案58。 由于添加了纸张F，所以布线图案不会变薄，并且在交叉部分X中不会断开。另外，由于不会对交叉部分X集中的应力，因此布线图案中不会导致断线，也不会产生气泡 留在布线图案的交叉部分X和层间树脂绝缘层之间，从而提高了印刷线路板的可靠性。

公开(公告)号：US20080030286A1

公开(公告)日：2008-02-07

申请号：US11755791

申请日：2007-05-31

Applicant: Myun-Joo Park ,  Jae-jun LEE

Inventor： Myun-Joo Park ,  Jae-jun LEE

IPC: H01P5/12

CPC classification number: H05K1/0216 ,  G11C7/1006 ,  H05K1/0237 ,  H05K1/14 ,  H05K2201/044 ,  H05K2201/09727 ,  H05K2201/09781

Abstract: A semiconductor memory device includes memory modules which have memories and a data bus which transfers data to the memory modules, in which the data bus comprises a low frequency band data pass unit which removes the high frequency component of the data and sends the data to the memory modules. The low frequency band data pass unit comprises a plurality of stubs which are connected to the data bus in parallel and are formed as printed circuit board (PCB) patterns. The low frequency band data pass unit comprises a plurality of plates that are connected to the data bus in parallel and are formed as PCB patterns. The low frequency band data pass unit has a shape in which parts having a wide width and parts having a narrow width are alternately connected. Therefore, without adding a separate passive device, the semiconductor memory device reduces the high frequency noise of data transferred through a data bus such that the voltage margin of the data improves, the cost for passive devices such as capacitors, is reduced, and the process for attaching the passive devices is simplified.

Abstract translation: 半导体存储器件包括具有存储器的存储器模块和将数据传送到存储器模块的数据总线，其中数据总线包括一个低频带数据传递单元，该单元去除数据的高频分量并将数据发送到 内存模块 低频带数据传送单元包括并联连接到数据总线并形成为印刷电路板（PCB）图案的多个短截线。 低频带数据传送单元包括并联连接到数据总线并形成为PCB图案的多个板。 低频带数据传送单元具有宽度宽的部分和宽度窄的部分交替连接的形状。 因此，在不添加单独的无源器件的情况下，半导体存储器件减少通过数据总线传送的数据的高频噪声，从而数据的电压裕度提高，诸如电容器等无源器件的成本降低，并且该过程 用于安装无源器件简化了。

公开(公告)号：US20080006442A1

公开(公告)日：2008-01-10

申请号：US11856849

申请日：2007-09-18

Applicant: Se Yoo

Inventor： Se Yoo

IPC: H05K1/02

CPC classification number: C25D5/02 ,  G02F1/13452 ,  H05K1/0268 ,  H05K1/117 ,  H05K3/323 ,  H05K3/3452 ,  H05K3/361 ,  H05K2201/09727 ,  Y10T29/49121

Abstract: A tap tape of a tape carrier package prevents connection parts from being eroded. The tap tape includes a base film having a device hole formed to mount a driver chip for driving a panel of a flat panel display, input patterns positioned on the base film and having a plurality of electrode pads connected to a side of the device hole, output patterns positioned on the base film and having a plurality of electrode pads connected to the other side of the device hole; and connection parts positioned at the ends of the input patterns or the output patterns and having electrode pads of widths different from widths of the electrode pads.

Abstract translation: 磁带载体封装的分接磁带可防止连接部件受到侵蚀。 抽头带包括具有形成为安装用于驱动平板显示器的面板的驱动器芯片的器件孔的基膜，位于基膜上的输入图案，并且具有连接到器件孔侧的多个电极焊盘， 输出图案位于基膜上并具有连接到装置孔的另一侧的多个电极焊盘; 以及位于输入图案或输出图案的端部处并且具有与电极垫的宽度不同的宽度的电极焊盘的连接部件。

公开(公告)号：US20070264814A1

公开(公告)日：2007-11-15

申请号：US11737165

申请日：2007-04-19

Applicant: Toshimitsu HIRAI ,  Katsuyuki MORIYA

Inventor： Toshimitsu HIRAI ,  Katsuyuki MORIYA

IPC: H01L21/44

CPC classification number: H01L21/288 ,  H01L21/4867 ,  H01L21/76838 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1292 ,  H01L27/3246 ,  H01L29/41733 ,  H01L51/0022 ,  H05K3/125 ,  H05K3/1258 ,  H05K2201/09254 ,  H05K2201/09727 ,  H05K2201/09909 ,  H05K2203/013 ,  H05K2203/1173 ,  H05K2203/1476

Abstract: A method for forming a metal wiring line, comprises: (a) forming a bank including a first opening corresponding to a first film pattern and a second opening corresponding to a second film pattern that is coupled to the first film pattern and has a width narrower than a width of the first film pattern; (b) disposing a droplet of a functional liquid in the first opening so as to dispose the functional liquid in the second opening by an autonomous flow of the functional liquid; (c) hardening the functional liquid disposed in the first opening and the second opening; and (d) forming the first film pattern and the second film pattern by alternately repeating step (b) and step (c) at least one time.

Abstract translation: 一种用于形成金属布线的方法，包括：（a）形成包括对应于第一膜图案的第一开口和对应于第二膜图案的第二开口的堤，该第二膜图案耦合到第一膜图案并且具有宽度较窄 比第一膜图案的宽度大; （b）在所述第一开口中设置功能液滴，以通过所述功能液体的自主流动将所述功能液体配置在所述第二开口中; （c）硬化设置在第一开口和第二开口中的功能液体; 和（d）至少一次交替地重复步骤（b）和步骤（c）来形成第一膜图案和第二膜图案。

公开(公告)号：US07294904B1

公开(公告)日：2007-11-13

申请号：US11054863

申请日：2005-02-10

Applicant: Soon-Shin Chee ,  Ann Chiuchin Lin

Inventor： Soon-Shin Chee ,  Ann Chiuchin Lin

IPC: H05K3/02 ,  H05K1/02 ,  H01L23/58 ,  H01L23/66

CPC classification number: H05K1/0251 ,  H01L23/49816 ,  H01L23/66 ,  H01L2223/6627 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/1903 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0224 ,  H05K1/0245 ,  H05K1/025 ,  H05K1/0298 ,  H05K1/112 ,  H05K2201/09236 ,  H05K2201/09627 ,  H05K2201/09727 ,  H05K2201/10674

Abstract: A packaged integrated circuit includes an integrated circuit and a package substrate. A trace in the package substrate includes a first portion and a second, high-inductance, portion. The high-inductance portion of the trace is proximate to a port of the integrated circuit and provides a selected inductance operating in cooperation with the capacitance of the port to reduce return loss from the port.

Abstract translation: 封装的集成电路包括集成电路和封装衬底。 封装衬底中的迹线包括第一部分和第二高电感部分。 迹线的高电感部分靠近集成电路的端口，并提供与端口的电容协同工作的选定电感，以减少端口的回波损耗。

公开(公告)号：US07294532B2

公开(公告)日：2007-11-13

申请号：US11146610

申请日：2005-06-07

Applicant: Hiroyuki Imamura ,  Nobuyuki Koutani

Inventor： Hiroyuki Imamura ,  Nobuyuki Koutani

IPC: H01L21/44

CPC classification number: H01L21/4853 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/4985 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83192 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/3025 ,  H05K1/111 ,  H05K3/243 ,  H05K2201/0367 ,  H05K2201/09727 ,  H05K2201/098 ,  H05K2201/0989 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A method for manufacturing a semiconductor device that includes mounting a semiconductor chip on a circuit board having an insulating substrate, a plurality of wiring layers arranged on the insulating substrate, and bumps formed on the wiring layers respectively, in which the bump is provided across a longitudinal direction of a corresponding one of the wiring layers so as to extend over regions on both sides of the wiring layer and contact a surface of the insulating substrate, without a stepped portion formed on a surface of the bump, and a cross sectional shape of the bump taken in a width direction of the wiring layer is such that a central portion is higher than both side portions. The method also includes connecting electrode pads of the semiconductor chip to the bumps, thereby achieving connection between the electrode pads of the semiconductor chip and the wiring layers via the bumps.

Abstract translation: 一种半导体器件的制造方法，其包括将半导体芯片安装在具有绝缘基板的电路板上，布置在所述绝缘基板上的多个布线层以及分别形成在所述布线层上的凸块， 相对应的一个布线层的纵向方向延伸到布线层的两侧的区域上并与绝缘基板的表面接触，而不形成在凸起的表面上的阶梯部分，并且横截面形状 在布线层的宽度方向上取得的隆起部使得中央部高于两侧部。 该方法还包括将半导体芯片的电极焊盘连接到凸块，从而通过凸块实现半导体芯片的电极焊盘与布线层之间的连接。

公开(公告)号：US07276697B2

公开(公告)日：2007-10-02

申请号：US10503188

申请日：2003-02-03

Applicant: Michael Leslie Devine

Inventor： Michael Leslie Devine

IPC: G01J5/00

CPC classification number: G01J5/06 ,  G01J5/16 ,  H05K1/0201 ,  H05K1/118 ,  H05K1/147 ,  H05K2201/062 ,  H05K2201/09263 ,  H05K2201/09727

Abstract: Apparatus for protection against undesired thermal transfer comprising a printed circuit board (15), an infrared sensing device (100) electrically connected to the printed circuit board (15) by way of an electrical lead (12), and solid thermally insulating material (18, 20) between the board (15) and the device (100) and protecting that side of the device (100) facing the board (15) from thermal transfer from the board (15) to the device (100). The solid thermally insulating material (18) bounds a passageway (19) in the material (18) through which the lead (12) passes. Advantageously, the in sensing device (100) is in thermal communication with a heat sink (14) and the solid thermally insulating material (20) protects the heat sink (14) also against such thermal transfer from the board (15), i.e. thermal radiation from the board (15) and thermal convection currents induced by the board (15).

Abstract translation: 用于防止不期望的热转印的装置，包括印刷电路板（15），通过电引线（12）电连接到印刷电路板（15）的红外感测装置（100）和固体隔热材料（18） ，20）和保护面对板（15）的装置（100）的该侧不受板（15）到装置（100）的热传递。 固体绝热材料（18）限定了引线（12）通过的材料（18）中的通道（19）。 有利地，感测装置（100）与散热器（14）热连通，并且固体绝热材料（20）还防止散热器（14）抵抗来自板（15）的热传递，即热 来自板（15）的辐射和由板（15）引起的热对流。

公开(公告)号：US20070197058A1

公开(公告)日：2007-08-23

申请号：US11676213

申请日：2007-02-16

Applicant: Tomofumi Kitada ,  Hiroki Maruo

Inventor： Tomofumi Kitada ,  Hiroki Maruo

IPC: H05K1/00

CPC classification number: H05K3/363 ,  H05K1/117 ,  H05K2201/09427 ,  H05K2201/097 ,  H05K2201/09727

Abstract: A printed wiring board having an insulating base material; a wiring formed on at least one surface of the insulating base material, the wiring forming a predetermined circuit pattern; a first connection terminal portion formed on the surface and electrically connected to the wiring, the first connection terminal portion having a first width; a second connection terminal portion formed on the surface and electrically connected to the wiring, the second connection terminal portion having a second width; and a cover layer configured to cover the wiring and expose the first and the second connection terminal portion.

Abstract translation: 一种具有绝缘基材的印刷线路板; 形成在所述绝缘基材的至少一个表面上的布线，所述布线形成预定的电路图案; 第一连接端子部分，形成在表面上并电连接到布线，第一连接端子部分具有第一宽度; 形成在表面上并电连接到布线的第二连接端子部分，第二连接端子部分具有第二宽度; 以及覆盖层，其被配置为覆盖所述布线并暴露所述第一连接端子部和所述第二连接端子部。