中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

372 records (took 0.016 seconds)

    Grid Arrays With Enhanced Fatigue Life
    156.
    发明申请
    Grid Arrays With Enhanced Fatigue Life 审中-公开
    具有增强疲劳寿命的网格阵列

    公开(公告)号：US20170013725A1

    公开(公告)日：2017-01-12

    申请号：US15270940

    申请日：2016-09-20

    Applicant: Massachusetts Institute of Technology

    Inventor： Dmitry Tolpin ,  James H. Kelly ,  Roger M. Maurais

    IPC: H05K3/30 ,  H05K1/11 ,  H05K1/18

    CPC classification number: H05K3/301 ,  H01L2224/16225 ,  H01L2924/10253 ,  H01L2924/351 ,  H01L2924/381 ,  H05K1/111 ,  H05K1/18 ,  H05K1/181 ,  H05K3/30 ,  H05K3/303 ,  H05K3/3436 ,  H05K2201/068 ,  H05K2201/094 ,  H05K2201/09418 ,  H05K2201/09427 ,  H05K2201/10242 ,  Y02P70/611 ,  Y10T29/4913 ,  Y10T29/49133 ,  H01L2924/00

    Abstract: Reliability is improved for the mechanical electrical connection formed between a grid array device, such as a pin grid array device (PGA) or a column grid array device (CGA), and a substrate such as a printed circuit board (PCB). Between adjacent PCB pads, a spacing pattern increases toward the periphery of the CGA, creating a misalignment between pads and columns. As part of the assembly method, columns align with the pads, resulting in column tilt that increases from the center to the periphery of the CGA. An advantage of this tilt is that it reduces the amount of contractions and expansions of columns during thermal cycling, thereby increasing the projected life of CGA. Another advantage of the method is that it reduces shear stress, further increasing the projected life of the CGA.

    Abstract translation: 对于诸如针阵列阵列器件（PGA）或列格栅阵列器件（CGA）的栅格阵列器件和诸如印刷电路板（PCB）的衬底之间形成的机械电连接，可靠性得到改善。 在相邻的PCB焊盘之间，间隔图案朝向CGA的周边增加，导致焊盘和柱之间的未对准。 作为组装方法的一部分，列与焊盘对准，导致从CGA的中心到外围增加的列倾斜。 这种倾斜的一个优点是在热循环期间减少了柱的收缩量和膨胀量，从而增加了CGA的预计使用寿命。 该方法的另一个优点是降低了剪切应力，进一步提高了CGA的寿命。

    Printed circuit board
    157.
    发明授权
    Printed circuit board 有权
    印刷电路板

    公开(公告)号：US09538634B2

    公开(公告)日：2017-01-03

    申请号：US13960469

    申请日：2013-08-06

    Applicant: CANON KABUSHIKI KAISHA

    Inventor： Hiroyuki Yamaguchi

    IPC: H05K1/18 ,  H05K1/02

    CPC classification number: H05K1/0216 ,  H05K1/0231 ,  H05K1/0233 ,  H05K1/0245 ,  H05K2201/0792 ,  H05K2201/09272 ,  H05K2201/09418 ,  H05K2201/10522 ,  H05K2201/10636 ,  Y02P70/611

    Abstract: A printed circuit board (e.g., 103) includes capacitor elements (e.g., 121 and 122). The capacitor element (e.g., 121) returns a common mode current included in a signal output from a signal output terminal (e.g., 111) of a semiconductor element (e.g., 102), to a ground terminal (e.g., 113) of the semiconductor element (e.g., 102). The capacitor element (e.g., 122) returns a common mode current included in a signal output from a signal output terminal (e.g., 112) of the semiconductor element (e.g., 102), to the ground terminal (e.g., 113) of the semiconductor element (e.g., 102). The capacitor elements (e.g., 121 and 122) are arranged such that the mutual inductance between a parasitic inductance of the capacitor element (e.g., 121) and a parasitic inductance of the capacitor element (e.g., 122) for the common mode currents is a negative value. Accordingly, the effective inductances of the first and second capacitor elements for the common mode currents are reduced, which suppresses radiation noise.

    Abstract translation: 印刷电路板（例如，103）包括电容元件（例如121和122）。 电容器元件（例如，121）将从半导体元件（例如，102）的信号输出端子（例如，111）输出的信号中包含的共模电流返回到半导体的接地端子（例如，113） 元素（例如，102）。 电容器元件（例如，122）将包括在从半导体元件（例如，102）的信号输出端子（例如，112）输出的信号中的共模电流返回到半导体的接地端子（例如，113） 元素（例如，102）。 电容器元件（例如，121和122）被布置成使得电容器元件（例如，121）的寄生电感与用于共模电流的电容器元件（例如，122）的寄生电感之间的互感是 负值。 因此，减小了用于共模电流的第一和第二电容器元件的有效电感，这抑制了辐射噪声。

    PRINTED CIRCUIT BOARD
    158.
    发明申请
    PRINTED CIRCUIT BOARD 有权
    印刷电路板

    公开(公告)号：US20160128190A1

    公开(公告)日：2016-05-05

    申请号：US14420373

    申请日：2014-11-10

    Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd.

    Inventor： Lijia Song

    IPC: H05K1/11 ,  H05K1/18

    CPC classification number: H05K1/181 ,  H05K1/111 ,  H05K2201/094 ,  H05K2201/09418 ,  H05K2201/10022 ,  Y02P70/611

    Abstract: A printed circuit board is disclosed. Pins of a plurality of resistors on the PCB are connected to the same input line. At least two out of the resistors are connected to the same input line with access pins overlapped. One shared bonding pad is located in every overlapped area, electrical components are bonded on the shared bonding pads. As at least two out of the resistors are connected to the same input line with the access pins overlapped, the utilization of space is maximized. In this way, not only the dimension of the PCB is reduced, but also the manufacturing cost is reduced at the same time.

    Abstract translation: 公开了印刷电路板。 PCB上的多个电阻器的引脚连接到相同的输入线。 至少两个电阻器连接到相同的输入线路，其中接入引脚重叠。 一个共享焊盘位于每个重叠区域中，电气部件粘合在共享焊盘上。 由于至少两个电阻器连接到与接入引脚重叠的相同输入线路上，空间的利用率最大化。 以这种方式，不仅PCB的尺寸减小，而且同时降低了制造成本。

Patent Agency Ranking