公开(公告)号：US3107414A

公开(公告)日：1963-10-22

申请号：US86198959

申请日：1959-12-24

Applicant: IBM

Inventor： STERLING JOHN L

IPC: H05K1/11 ,  H05K3/04 ,  H05K3/20 ,  H05K3/46

CPC classification number: H05K3/4617 ,  H05K1/117 ,  H05K3/041 ,  H05K3/202 ,  H05K2201/09436 ,  H05K2201/09881 ,  H05K2201/10378 ,  H05K2203/033 ,  Y10T29/49126 ,  Y10T29/4916

公开(公告)号：US2884571A

公开(公告)日：1959-04-28

申请号：US29859952

申请日：1952-07-12

Applicant: SYLVANIA ELECTRIC PROD

Inventor： HANNAHS WILSON H

IPC: H05K3/12 ,  H05K3/18 ,  H05K3/20

CPC classification number: H05K3/205 ,  H05K3/188 ,  H05K2201/0116 ,  H05K2201/09881 ,  H05K2203/0152 ,  H05K2203/0726

公开(公告)号：US20190035993A1

公开(公告)日：2019-01-31

申请号：US16135317

申请日：2018-09-19

Applicant: 3M INNOVATIVE PROPERTIES COMPANY

Inventor： Ravi Palaniswamy ,  Alejandro Aldrin II Agcaoili Narag ,  Siang Sin Foo ,  Hiromitsu Kosugi

IPC: H01L33/62 ,  B32B15/08 ,  B32B27/28 ,  H01L33/48 ,  H01L33/58 ,  B32B7/12 ,  H05K1/03 ,  H05K1/18 ,  H05K3/28

CPC classification number: H01L33/62 ,  B32B7/12 ,  B32B15/08 ,  B32B27/281 ,  B32B2255/10 ,  B32B2255/20 ,  B32B2307/202 ,  B32B2457/202 ,  H01L33/486 ,  H01L33/58 ,  H01L2933/0033 ,  H01L2933/0058 ,  H01L2933/0066 ,  H05K1/0306 ,  H05K1/0346 ,  H05K1/036 ,  H05K1/189 ,  H05K3/28 ,  H05K2201/0154 ,  H05K2201/017 ,  H05K2201/0179 ,  H05K2201/09827 ,  H05K2201/09881 ,  H05K2201/10106

Abstract: Flexible LED assemblies are described. More particularly, flexible LED assemblies having substrates with conductive features positioned on or in the substrate, and layers of ceramic positioned over exposed portions of the substrate to protect against UV degradation, as well as methods of making such assembles, are described.

公开(公告)号：US09560739B2

公开(公告)日：2017-01-31

申请号：US14376744

申请日：2013-04-10

Applicant: NGK SPARK PLUG CO., LTD.

Inventor： Tomohiro Nishida ,  Seiji Mori ,  Makoto Wakazono

IPC: H05K1/02 ,  H05K3/34 ,  H05K3/28 ,  H01L23/498 ,  H05K3/24 ,  H05K1/11

CPC classification number: H05K1/0213 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K1/111 ,  H05K3/244 ,  H05K3/28 ,  H05K3/3452 ,  H05K2201/09881 ,  H05K2201/099 ,  H05K2203/0571 ,  H05K2203/0588 ,  H01L2924/00012 ,  H01L2924/00

Abstract: To provide a wiring substrate which can prevent short circuit between connection terminals, and which realizes reduction of the pitch between the connection terminals. The wiring substrate of the present invention includes a layered structure including one or more insulation layers and one or more conductor layers, and the wiring substrate is characterized in that a plurality of connection terminals are formed on the layered structure so as to be separated from one another; a filling member is filled between the connection terminals; and each of the connection terminals has a side surface composed of a contact surface which is in contact with the filling member, and a spaced surface which is not in contact with the filling member and which is located above the contact surface and below the top surface of the filling member.

Abstract translation: 为了提供能够防止连接端子之间短路的布线基板，实现了连接端子间的间距的减小。 本发明的布线基板包括具有一个或多个绝缘层和一个或多个导体层的层状结构，并且布线基板的特征在于，在层叠结构上形成多个连接端子以与其分离 另一个; 填充构件填充在连接端子之间; 并且每个连接端子具有由与填充构件接触的接触表面构成的侧表面和与填充构件不接触并且位于接触表面上方并在顶表面下方的间隔表面 的填充构件。

公开(公告)号：US20160349867A1

公开(公告)日：2016-12-01

申请号：US14892006

申请日：2015-05-28

Applicant: BOE TECHNOLOGY GROUP CO., LTD. ,  HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.

Inventor： Wenjin Fan ,  Taofeng Xie ,  Ming Hu

IPC: G06F3/041

CPC classification number: G06F3/041 ,  G06F3/0416 ,  H05K3/28 ,  H05K3/361 ,  H05K2201/0376 ,  H05K2201/09881 ,  H05K2201/099

Abstract: Embodiments of the invention provide a touch panel and a display device, which relates to the technical field of display and solves the problem that the connecting electrodes of an existing touch panel are easily eroded by water, oxygen, etc. in the air. A touch panel comprises a circuit binding area formed with a plurality of connecting electrodes for binding and electrically connecting with a circuit board. The touch panel further comprises a protective layer at least covering one side surface of the connecting electrode.

Abstract translation: 本发明的实施例提供一种与显示技术领域相关的触摸面板和显示装置，并且解决了现有触摸面板的连接电极容易被空气中的水，氧等侵蚀的问题。 触摸面板包括与多个连接电极形成的电路装订区域，用于与电路板结合并电连接。 触摸面板还包括至少覆盖连接电极的一个侧表面的保护层。

公开(公告)号：US20160135281A1

公开(公告)日：2016-05-12

申请号：US14996623

申请日：2016-01-15

Applicant: Astec International Limited

Inventor： Daryl WEISPFENNIG ,  Bradley SCHUMACHER ,  Kwong Kei CHIN

IPC: H05K1/02 ,  H01L23/495 ,  H05K1/03 ,  H05K1/09 ,  H05K1/11 ,  H05K1/18

CPC classification number: H05K1/0203 ,  H01L23/49537 ,  H01L23/49541 ,  H01L23/49568 ,  H01L23/49582 ,  H01L2924/0002 ,  H05K1/0263 ,  H05K1/0298 ,  H05K1/0313 ,  H05K1/09 ,  H05K1/115 ,  H05K1/181 ,  H05K3/202 ,  H05K3/42 ,  H05K3/4602 ,  H05K2201/0352 ,  H05K2201/09881 ,  H05K2201/09972 ,  H05K2201/10166 ,  H05K2201/10689 ,  H05K2203/175 ,  Y02P70/611 ,  Y10T29/49126 ,  H01L2924/00

Abstract: An integrated circuit assembly includes a first electrically conductive sheet, a second electrically conductive sheet electrically isolated from the first electrically conductive sheet, a non-conductive material disposed between the first and second electrically conductive sheets, an electrical trace disposed on the non-conductive material and electrically isolated from the first and second electrically conductive sheets, and an integrated circuit having at least one lead directly connected to the first electrically conductive sheet, at least one lead directly connected to the second electrically conductive sheet, and at least one lead electrically connected to the electrical trace. Other integrated circuit assemblies and method for making integrated circuit assemblies are also disclosed.

Abstract translation: 集成电路组件包括第一导电片，与第一导电片电隔离的第二导电片，设置在第一和第二导电片之间的非导电材料，设置在非导电材料上的电迹线 并且与第一和第二导电片电隔离，以及集成电路，其具有直接连接到第一导电片的至少一个引线，直接连接到第二导电片的至少一个引线，以及至少一个引线电连接 到电痕迹。 还公开了用于制造集成电路组件的其它集成电路组件和方法。

公开(公告)号：US20160088741A1

公开(公告)日：2016-03-24

申请号：US14853125

申请日：2015-09-14

Applicant: Océ-Technologies B.V.

Inventor： Hendrikus J.T.M. VAN DEN BERSSELAAR

IPC: H05K3/46 ,  H05K1/02 ,  H05K3/38 ,  H05K3/06

CPC classification number: H05K1/03 ,  H05K1/0298 ,  H05K3/0085 ,  H05K3/061 ,  H05K3/38 ,  H05K3/462 ,  H05K3/4644 ,  H05K2201/0367 ,  H05K2201/09881 ,  H05K2203/013

Abstract: A method of manufacturing a multi-layer printed circuit board by bonding together a plurality of circuit board layers, each of which includes a substrate and a conductive circuit pattern on at least one surface of the substrate, includes the steps of: coating the surface of the substrate with a continuous layer of conductive material, masking the layer with a resist, etching away a part of the conductive material so as to obtain the circuit pattern with conductive parts separated by gaps, and filling the gaps with an electrically insulating adhesive material to a level that is at least equal to the thickness of the layer of conductive material. The resist is left on the conductive parts and the adhesive material is selected to be chemically compatible with the resist.

Abstract translation: 一种多层印刷电路板的制造方法，其特征在于，在所述基板的至少一个表面上包含基板和导电电路图案的多个电路基板层粘合在一起，其特征在于，包括： 具有连续导电材料层的衬底，用抗蚀剂掩蔽该层，蚀刻掉导电材料的一部分，以获得具有由间隙分离的导电部件的电路图案，并用电绝缘粘合剂材料填充间隙 至少等于导电材料层的厚度的水平。 抗蚀剂留在导电部分上，并且粘合剂材料被选择为与抗蚀剂化学相容。

公开(公告)号：US09258880B2

公开(公告)日：2016-02-09

申请号：US13987701

申请日：2013-08-22

Applicant: INTEL CORPORATION

Inventor： Aleksandar Aleksov ,  Vladimir Noveski ,  Sujit Sharan ,  Shankar Ganapathysubramanian

IPC: H05H1/02 ,  H05K1/02 ,  H01L21/48 ,  H01L23/15 ,  H01L23/498 ,  H05K3/46 ,  H05K1/03 ,  H05K3/06 ,  H05K3/10 ,  H05K3/20 ,  H05K3/38

CPC classification number: H05K1/0201 ,  H01L21/4807 ,  H01L23/15 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0306 ,  H05K3/06 ,  H05K3/107 ,  H05K3/205 ,  H05K3/388 ,  H05K3/4617 ,  H05K3/4629 ,  H05K3/4647 ,  H05K2201/0175 ,  H05K2201/0187 ,  H05K2201/0376 ,  H05K2201/096 ,  H05K2201/09881 ,  H05K2203/0733 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2924/00

Abstract: A layer or layers for use in package substrates and die spacers are described. The layer or layers include a plurality of ceramic wells lying within a plane and separated by metallic vias. Recesses within the ceramic wells are occupied by a dielectric filler material.

公开(公告)号：US09204553B2

公开(公告)日：2015-12-01

申请号：US13582149

申请日：2011-03-22

Applicant: Jose Antonio Cubero Pitel ,  Andreu Fores Montserrat ,  Maria Leonor Torrijos Ezquerra

Inventor： Jose Antonio Cubero Pitel ,  Andreu Fores Montserrat ,  Maria Leonor Torrijos Ezquerra

IPC: H05K3/20 ,  H05K3/06 ,  H05K3/24 ,  H05K1/09

CPC classification number: H05K3/06 ,  H05K1/09 ,  H05K3/243 ,  H05K2201/0376 ,  H05K2201/09881 ,  Y10T29/49155

Abstract: A method is provided for producing a printed circuit board. The method includes the step of providing an insulating substrate having a layer of aluminum material applied to the substrate. A portion of the layer of aluminum material is removed for defining a circuit trace. A layer of conductive material is applied to the layer of aluminum material.

Abstract translation: 提供了一种用于制造印刷电路板的方法。 该方法包括提供具有施加到基板的铝材料层的绝缘基板的步骤。 去除铝材料层的一部分以限定电路迹线。 将一层导电材料施加到铝材料层上。

公开(公告)号：US09179552B2

公开(公告)日：2015-11-03

申请号：US14235729

申请日：2013-04-10

Applicant: NGK SPARK PLUG CO., LTD.

Inventor： Tomohiro Nishida ,  Seiji Mori ,  Makoto Wakazono

IPC: H05K1/11 ,  H05K3/28 ,  H01L21/56 ,  H05K3/34

CPC classification number: H05K3/28 ,  H01L21/563 ,  H05K1/11 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/09881 ,  H05K2201/10977 ,  H05K2203/025 ,  H05K2203/0783

Abstract: To obtain a wiring board that allows improving flowability of an underfill to be filled up a clearance between an electronic component and the wiring board. The present invention is a wiring board with a laminated body where one or more layer of each of an insulating layer and a conductor layer are laminated. The wiring board includes a plurality of connecting terminals formed separately from one another on the laminated body, a filling member filled up between the plurality of connecting terminals, and a solder resist layer laminated on the laminated body. The filling member is in contact with at least a part of each side surface of the plurality of connecting terminals. The solder resist layer includes an opening that exposes the plurality of connecting terminals. The filling member has a surface roughness rougher than a surface roughness of a top surface of the solder resist layer.

Abstract translation: 为了获得能够改善底部填充物的流动性的布线板，填充电子部件与布线基板的间隙。 本发明是层叠有绝缘层和导体层的一层以上的层叠体的布线基板。 布线板包括在层叠体上彼此分开形成的多个连接端子，填充在多个连接端子之间的填充部件和层叠在层叠体上的阻焊层。 填充构件与多个连接端子的每个侧表面的至少一部分接触。 阻焊层包括露出多个连接端子的开口。 填充构件具有比阻焊层的顶表面的表面粗糙度更粗糙的表面粗糙度。