公开(公告)号：US09832864B2

公开(公告)日：2017-11-28

申请号：US15161731

申请日：2016-05-23

Applicant: CANON KABUSHIKI KAISHA

Inventor： Junichiro Iri ,  Ryo Sato ,  Kazuhiro Idogawa ,  Chiaki Muraoka ,  Hiromasa Amma ,  Takuya Iwano

IPC: H05K1/02 ,  B41J2/175 ,  B41J2/14 ,  H05K3/00

CPC classification number: H05K1/028 ,  B41J2/14 ,  B41J2/1752 ,  B41J2/1753 ,  B41J2/17553 ,  H05K1/0296 ,  H05K3/0058 ,  H05K2201/09227 ,  H05K2201/09254 ,  H05K2201/09272 ,  H05K2201/09663 ,  H05K2201/09727 ,  H05K2201/0979

Abstract: A liquid ejection head includes a circuit board having a wire pattern divided into a plurality of portions in order to provide the circuit board with very reliable bonding.

公开(公告)号：US20170332488A1

公开(公告)日：2017-11-16

申请号：US15666540

申请日：2017-08-01

Applicant: NHK SPRING CO., LTD.

Inventor： Katsumi MIZUNO ,  Daiki IKEDA

IPC: H05K1/05 ,  H05K3/20 ,  H05K1/03 ,  H05K3/44

CPC classification number: H05K1/056 ,  H05K1/0256 ,  H05K1/0263 ,  H05K1/0373 ,  H05K3/103 ,  H05K3/20 ,  H05K3/202 ,  H05K3/44 ,  H05K2201/0137 ,  H05K2201/09672 ,  H05K2201/09727 ,  H05K2201/1028 ,  H05K2203/0278 ,  H05K2203/1105

Abstract: According to one embodiment, a metal base circuit board includes a metal base substrate, a first circuit pattern, and a first insulating layer between the metal base substrate and the first circuit pattern. The first insulating layer covers a lower surface of the first circuit pattern and at least part of a side surface of the first circuit pattern, the lower surface facing the metal base substrate, the at least part of the side surface being adjacent to the lower surface.

公开(公告)号：US20170311446A1

公开(公告)日：2017-10-26

申请号：US15253615

申请日：2016-08-31

Applicant: STMICROELECTRONICS, INC. ,  STMICROELECTRONICS S.R.L.

Inventor： Simon DODD ,  Roberto BRIOSCHI

IPC: H05K1/18 ,  H05K1/03 ,  H05K3/10 ,  H05K3/40 ,  H05K1/11

CPC classification number: H05K1/181 ,  B81C1/0023 ,  H01L2924/1461 ,  H05K1/0272 ,  H05K1/0293 ,  H05K1/0306 ,  H05K1/111 ,  H05K3/10 ,  H05K3/4007 ,  H05K2201/0175 ,  H05K2201/0338 ,  H05K2201/0391 ,  H05K2201/09727 ,  H05K2201/09763 ,  H05K2201/09827 ,  H05K2201/10083 ,  H05K2201/10159 ,  H05K2201/10181 ,  H05K2203/171 ,  H05K2203/175

Abstract: The present disclosure is directed to a ceramic substrate that includes a plurality of contact pads, a plurality of electrical traces, and a microelectromechanical die. Contacts on the die are coupled to the plurality of contact pads through the plurality of electrical traces. The substrate also includes a plurality of memory bits formed directly on the substrate. Each memory bit is coupled between a first one of the contact pads and a second one of the contact pads.

公开(公告)号：US09795027B2

公开(公告)日：2017-10-17

申请号：US14717280

申请日：2015-05-20

Applicant: FUJIKURA LTD.

Inventor： Hirohito Watanabe ,  Taiji Ogawa

IPC: H05K1/02 ,  H01P3/08 ,  H01P1/02 ,  H05K1/03

CPC classification number: H05K1/0225 ,  H01P1/022 ,  H01P3/08 ,  H01P3/085 ,  H05K1/025 ,  H05K1/0393 ,  H05K2201/0715 ,  H05K2201/09027 ,  H05K2201/09681 ,  H05K2201/09727

Abstract: To suppress occurrence of a difference in transmission time due to a difference in length between signal lines, there is provided a printed wiring board having: an insulating substrate (10); a first signal line (L31) formed on the insulating substrate (10); a second signal line (L32) having a shorter length than that of the first signal line (L31); and a ground layer (30) formed for the first signal line (L31) and the second signal line (L31) via an insulating material (10). The ground layer (30) includes a first ground layer (G31) corresponding to a first region (D1) and a second ground layer (G32) corresponding to a second region (D2). The first region (D1) is defined based on the first signal line (L31) and has a first predetermined width (W31). The second region (D2) is defined based on the second signal line (L32) and has a second predetermined width (W32). The first ground layer (G31) has a remaining ratio lower than a remaining ratio of the second ground layer (G32).

公开(公告)号：US09781823B2

公开(公告)日：2017-10-03

申请号：US15273110

申请日：2016-09-22

Applicant: Apple Inc.

Inventor： Benjamin B. Lyon ,  Shih-Chang Chang ,  Martin Paul Grunthaner

IPC: G06F3/045 ,  H05K1/02 ,  G06F3/041 ,  G09G3/20

CPC classification number: H05K1/0242 ,  G06F3/0412 ,  G06F3/0416 ,  G06F2203/04108 ,  G09G3/2092 ,  H05K1/0265 ,  H05K2201/0784 ,  H05K2201/09272 ,  H05K2201/09727 ,  Y10T29/49155

Abstract: The border routing of conductive traces in devices, such as displays, touch sensor panels, and touch screens, to improve border area space usage, thereby reducing device size, and to reduce trace resistance, thereby improving device operation, is disclosed. The conductive traces can form a staggered stair-step configuration in the device border area, in which the average widths of the traces can be different from each other and each trace can have segments with different widths. The conductive traces can be coupled to an active area of the device to transmit signals to and from the active area in accordance with a device operation. The varying widths can help improve the border area space usage, reduce trace resistance, and reduce the differences in resistance between traces.

公开(公告)号：US09666925B2

公开(公告)日：2017-05-30

申请号：US14796027

申请日：2015-07-10

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Kuniaki Yosui ,  Nobuo Ikemoto ,  Shigeru Tago ,  Zhujun Yang ,  Jun Sasaki ,  Fumie Matsuda ,  Wataru Tamura

IPC: H05K7/00 ,  H01P3/02 ,  H05K1/18 ,  H05K1/02 ,  H01P3/08 ,  H05K1/14

CPC classification number: H01P3/026 ,  H01P3/085 ,  H05K1/0225 ,  H05K1/0227 ,  H05K1/0242 ,  H05K1/025 ,  H05K1/028 ,  H05K1/147 ,  H05K1/18 ,  H05K2201/09618 ,  H05K2201/09727

Abstract: A main transmission line includes a substantially elongated dielectric body in which first and second substantially elongated signal conductors are disposed with a distance therebetween in a width direction. A first reference ground conductor and a first auxiliary ground conductor sandwich therebetween the first signal conductor in a thickness direction. A second reference ground conductor and a second auxiliary ground conductor sandwich therebetween the second signal conductor in the thickness direction. The second auxiliary ground conductor includes two substantially elongated conductors and a first bridge conductor, and the second auxiliary ground conductor includes two substantially elongated conductors and a second bridge conductor. The positions of the first and second bridge conductors in a lengthwise direction are different.

公开(公告)号：US20170135201A1

公开(公告)日：2017-05-11

申请号：US15410485

申请日：2017-01-19

Applicant: LG Display Co., Ltd.

Inventor： InHo YEO ,  KyongShik JEON

IPC: H05K1/02 ,  H05K1/14 ,  H05K1/11

CPC classification number: H05K1/0218 ,  H05K1/0219 ,  H05K1/0296 ,  H05K1/111 ,  H05K1/117 ,  H05K1/118 ,  H05K1/14 ,  H05K2201/04 ,  H05K2201/09709 ,  H05K2201/09727 ,  H05K2201/09781 ,  H05K2201/10128

Abstract: An electronic device connection unit includes a substrate and a plurality of signal pads on the substrate configured to send signals from an electronic device to a driving printed circuit board (PCB). One or more active ground pads on the substrate are configured to connect at least the driving PCB to a reference voltage of the electronic device. One or more dummy ground pads on the substrate are configured to connect to the reference voltage of the electronic device without extending onto the driving PCB. One or more connectors are connected to the one or more dummy ground pads, where each of the one or more connectors is configured to electrically couple at least a subset of the one or more dummy ground pads to the one or more active ground pads.

公开(公告)号：US09648732B2

公开(公告)日：2017-05-09

申请号：US14455052

申请日：2014-08-08

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Youko Nakamura ,  Norihiro Nashida

IPC: H05K1/18 ,  H01L23/28 ,  H05K1/02 ,  H01L31/048 ,  H01L33/56 ,  H01L23/12 ,  H01L33/52 ,  H01L21/56 ,  H01L23/31 ,  H01L23/373 ,  H01L23/433 ,  H01L23/498 ,  H01L23/00 ,  H05K1/11 ,  H05K7/00 ,  H01L23/29 ,  H01L25/07

CPC classification number: H05K1/0296 ,  H01L21/56 ,  H01L21/563 ,  H01L23/12 ,  H01L23/28 ,  H01L23/3121 ,  H01L23/3735 ,  H01L23/4334 ,  H01L23/49811 ,  H01L23/49833 ,  H01L24/01 ,  H01L25/072 ,  H01L31/048 ,  H01L33/52 ,  H01L33/56 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/351 ,  H05K1/115 ,  H05K1/185 ,  H05K2201/09609 ,  H05K2201/09727 ,  H05K2201/098 ,  H01L2924/00

Abstract: A semiconductor device includes: a conductive-patterned insulating substrate; conductive blocks fixed to conductive patterns of the conductive-patterned insulating substrate; a semiconductor chip fixed to each conductive block; a printed circuit board that has a conductive post fixed to the semiconductor chip; and a resin. The semiconductor device is configured such that the average volume of a conductive film per unit area of each conductive pattern around a section thereof, to which the corresponding conductive block is fixed, is reduced from the conductive block toward the outside.

公开(公告)号：US09614362B2

公开(公告)日：2017-04-04

申请号：US14556004

申请日：2014-11-28

Applicant: KYOCERA Document Solutions Inc.

Inventor： Kohei Ishido

IPC: H02H3/08 ,  H05K1/02

CPC classification number: H02H3/085 ,  H05K1/0212 ,  H05K1/0265 ,  H05K2201/09727 ,  H05K2201/10151

Abstract: An overcurrent protection device satisfactorily detects overcurrent without adding complicated component or occupying large space. Penetration member penetrates board face A having a first wiring circuit and face B with a second one, transmitting heat from face A to B. Connection/disconnection part is inserted into first wiring circuit, switching current to heat generation part for generating heat with current, formed in portion of first circuit, continued with one end of penetration member. Temperature detection member disposed near or abutted against other end of penetration member on face B detects transmitted heat, outputting signal. Control part controls connection/disconnection part on signal. Heat generation part is narrower than width w1 not generating heat in steady state, having width w2 to raise temperature upon overcurrent, and being sandwiched between patterns with width w1. Control part turns off current with heat generation part temperature raised to or above prescribed threshold.

公开(公告)号：US09609742B2

公开(公告)日：2017-03-28

申请号：US14014652

申请日：2013-08-30

Applicant: SK hynix Inc.

Inventor： Eul Chul Jang ,  Qwan Ho Chung ,  Sang Joon Lim ,  Sung Woo Han

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H05K1/02 ,  H01L23/498 ,  H01L23/552

CPC classification number: H05K1/0224 ,  H01L23/49838 ,  H01L23/552 ,  H01L2924/0002 ,  H05K1/0219 ,  H05K1/0253 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09345 ,  H05K2201/09681 ,  H05K2201/097 ,  H05K2201/09727 ,  H01L2924/00

Abstract: Package substrates are provided. The package substrate may include a power line and a ground line on a first surface of a substrate body; a plurality of signal lines on the first surface between the power line and the ground line; and a lower ground pattern and a lower power pattern positioned on a second surface of the substrate body opposite to the first surface. The lower ground pattern may be disposed to be opposite to the power line and the lower power pattern may be disposed to be opposite to the ground line. Related semiconductor packages are also provided.