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    PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME
    12.
    发明申请
    PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME 有权
    印刷线路板及其制造方法

    公开(公告)号：US20160044780A1

    公开(公告)日：2016-02-11

    申请号：US14820978

    申请日：2015-08-07

    Applicant: IBIDEN CO., LTD.

    Inventor： Yasushi INAGAKI ,  Kota NODA

    IPC: H05K1/02 ,  H05K1/09 ,  H05K3/18 ,  H05K3/20 ,  H05K3/06 ,  H05K3/40 ,  H05K1/11 ,  H05K3/00

    CPC classification number: H05K1/111 ,  H05K1/0271 ,  H05K1/0296 ,  H05K1/09 ,  H05K1/115 ,  H05K3/007 ,  H05K3/06 ,  H05K3/061 ,  H05K3/188 ,  H05K3/202 ,  H05K3/205 ,  H05K3/4007 ,  H05K3/4069 ,  H05K2201/0302 ,  H05K2201/0341 ,  H05K2201/0367 ,  H05K2201/09563 ,  H05K2201/098 ,  H05K2203/06 ,  Y02P70/611

    Abstract: A printed wiring board includes an insulating layer, a first conductor layer embedded into a first surface of the insulating layer and including connecting portions to connect an electronic component, a second conductor layer projecting from a second surface of the insulating layer, a solder resist layer covering the first conductor layer and having an opening structure exposing the connecting portions, a barrier metal layer formed on the connecting portions such that the barrier layer is projecting from the first surface of the insulating layer, and metal posts formed on the barrier layer such that the metal posts are positioned on the connecting portions, respectively. Each metal post has width which is greater than width of a respective connecting portion, and the barrier metal layer includes a metal material which is different from a metal material forming the metal posts and a metal material forming the first conductor layer.

    Abstract translation: 印刷布线板包括绝缘层，第一导体层，其嵌入绝缘层的第一表面中，并且包括用于连接电子部件的连接部分，从绝缘层的第二表面突出的第二导体层，阻焊层 覆盖第一导体层并具有露出连接部分的开口结构，形成在连接部分上的阻挡金属层，使得阻挡层从绝缘层的第一表面突出，以及形成在阻挡层上的金属柱，使得 金属柱分别位于连接部分上。 每个金属柱的宽度大于相应连接部分的宽度，并且阻挡金属层包括与形成金属柱的金属材料不同的金属材料和形成第一导体层的金属材料。

    Method of producing printed circuit board, and printed board produced by the method
    15.
    发明授权
    Method of producing printed circuit board, and printed board produced by the method 有权
    制造印刷电路板的方法和通过该方法制造的印刷电路板

    公开(公告)号：US09185811B2

    公开(公告)日：2015-11-10

    申请号：US13642471

    申请日：2011-03-02

    Applicant: Yoichi Saito ,  Shigeru Michiwaki ,  Noriaki Taneko ,  Shukichi Takii

    Inventor： Yoichi Saito ,  Shigeru Michiwaki ,  Noriaki Taneko ,  Shukichi Takii

    IPC: H05K3/02 ,  H01R43/00 ,  H05K3/00 ,  H05K1/00 ,  B29C65/00 ,  H05K3/20 ,  H05K3/26

    CPC classification number: H05K3/205 ,  H05K3/26 ,  H05K2201/0376 ,  H05K2201/098 ,  H05K2203/0152 ,  H05K2203/025 ,  H05K2203/1572

    Abstract: A method of producing a printed circuit board includes: forming a metal layer on a support plate; forming a mask layer on the metal layer; forming a pattern plating having a stem as plating up to a level of the mask layer, and a cap as a portion of plating exceeding the mask layer and having an outgrowth lying over the surface of the mask layer; laminating an insulating base on a conductive circuit board constituted by the support plate, the metal layer and the pattern plating to form a circuit board intermediate in which the pattern plating is buried in the base; removing the support plate and the metal layer to form an exposed surface; and mechanically polishing the exposed surface until the stem of the pattern plating is removed, to increase the width of the conductive pattern on the exposed surface.

    Abstract translation: 制造印刷电路板的方法包括：在支撑板上形成金属层; 在所述金属层上形成掩模层; 形成具有作为所述掩模层的水平的电极的杆的图案电镀，以及作为超过所述掩模层并且具有位于所述掩模层的表面上的生长的电镀部分的帽; 在由支撑板，金属层和图案电镀构成的导电电路板上层叠绝缘基底，以形成电路板中间，其中图案电镀埋在基座中; 移除支撑板和金属层以形成暴露表面; 并且机械抛光露出的表面，直到去除图案电镀的杆，以增加暴露表面上的导电图案的宽度。

    Conductor structure with integrated via element
    16.
    发明授权
    Conductor structure with integrated via element 有权
    具有集成通孔元件的导体结构

    公开(公告)号：US09144150B2

    公开(公告)日：2015-09-22

    申请号：US13452600

    申请日：2012-04-20

    Applicant: Paul Y. Wu

    Inventor： Paul Y. Wu

    IPC: H05K1/11 ,  H05K1/02

    CPC classification number: H05K1/0221 ,  H05K1/0242 ,  H05K1/0251 ,  H05K2201/09672 ,  H05K2201/098 ,  H05K2201/09854

    Abstract: An electrical circuit structure can include a first trace formed using a first conductive layer and a second trace formed using a second conductive layer. The first trace can be vertically aligned with the second trace. The electrical circuit structure can include a via segment formed of conductive material in a third conductive layer between the first conductive layer and the second conductive layer. The via segment can contact the first trace and the second trace forming a first conductor structure configured to convey an electrical signal in a direction parallel to the first conductive layer.

    Abstract translation: 电路结构可以包括使用第一导电层形成的第一迹线和使用第二导电层形成的第二迹线。 第一条迹线可以与第二条迹线垂直对齐。 电路结构可以包括在第一导电层和第二导电层之间的第三导电层中由导电材料形成的通孔段。 通路段可以接触第一迹线和第二迹线，形成构造成在平行于第一导电层的方向上传送电信号的第一导体结构。

    Profile engineered thin film devices and structures
    19.
    发明授权
    Profile engineered thin film devices and structures 有权
    型材设计薄膜器件和结构

    公开(公告)号：US08822301B2

    公开(公告)日：2014-09-02

    申请号：US13791721

    申请日：2013-03-08

    Applicant: Arvind Kamath ,  Erik Scher ,  Patrick Smith ,  Aditi Chandra ,  Steven Molesa

    Inventor： Arvind Kamath ,  Erik Scher ,  Patrick Smith ,  Aditi Chandra ,  Steven Molesa

    IPC: H01L21/20

    CPC classification number: H01L21/36 ,  C23C18/08 ,  C23C18/122 ,  C23C18/1245 ,  C23C18/1295 ,  H01L21/02532 ,  H01L21/02601 ,  H01L21/02628 ,  H01L21/28273 ,  H01L21/28518 ,  H01L21/288 ,  H01L21/76871 ,  H01L21/76895 ,  H01L27/1285 ,  H01L27/1292 ,  H01L28/40 ,  H01L29/0657 ,  H01L29/66143 ,  H01L29/6675 ,  H01L29/7881 ,  H01L29/872 ,  H05K1/16 ,  H05K1/162 ,  H05K3/125 ,  H05K2201/098

    Abstract: The present invention relates to electrically active devices (e.g., capacitors, transistors, diodes, floating gate memory cells, etc.) having dielectric, conductor, and/or semiconductor layers with smooth and/or dome-shaped profiles and methods of forming such devices by depositing or printing (e.g., inkjet printing) an ink composition that includes a semiconductor, metal, or dielectric precursor. The smooth and/or dome-shaped cross-sectional profile allows for smooth topological transitions without sharp steps, preventing feature discontinuities during deposition and allowing for more complete step coverage of subsequently deposited structures. The inventive profile allows for both the uniform growth of oxide layers by thermal oxidation, and substantially uniform etching rates of the structures. Such oxide layers may have a uniform thickness and provide substantially complete coverage of the underlying electrically active feature. Uniform etching allows for an efficient method of reducing a critical dimension of an electrically active structure by simple isotropic etch.

    Abstract translation: 本发明涉及具有平滑和/或圆顶形轮廓的电介质，导体和/或半导体层的电活性器件（例如，电容器，晶体管，二极管，浮动栅极存储单元等）和形成这种器件的方法 通过沉积或印刷（例如喷墨印刷）包括半导体，金属或电介质前体的油墨组合物。 平滑和/或圆顶形的横截面轮廓允许平滑的拓扑转变而没有尖锐的步骤，防止沉积期间的特征不连续性，并允许随后沉积的结构的更完整的阶梯覆盖。 本发明的轮廓允许通过热氧化均匀生长氧化物层，以及基本均匀的结构蚀刻速率。 这样的氧化物层可以具有均匀的厚度并且提供基本的电活性特征的基本上完整的覆盖。 均匀蚀刻允许通过简单的各向同性蚀刻来降低电活性结构的临界尺寸的有效方法。

    Printed wiring board, method for forming the printed wiring board, and board interconnection structure
    20.
    发明授权
    Printed wiring board, method for forming the printed wiring board, and board interconnection structure 失效
    印刷电路板，印刷电路板的形成方法以及电路板互连结构

    公开(公告)号：US08492657B2

    公开(公告)日：2013-07-23

    申请号：US12840751

    申请日：2010-07-21

    Applicant: Tomofumi Kitada ,  Hiroki Maruo ,  Ryo Takami

    Inventor： Tomofumi Kitada ,  Hiroki Maruo ,  Ryo Takami

    IPC: H05K1/03

    CPC classification number: H05K3/363 ,  H01L2924/0002 ,  H05K2201/09745 ,  H05K2201/098 ,  H05K2201/09845 ,  H01L2924/00

    Abstract: A board interconnection structure having a first printed wiring board in which a first conductive circuit is arranged on a first insulating layer, the first conductive circuit having, on an end portion thereof, a first connection terminal in which an upper surface width is narrower than a bottom surface width; a second printed wiring board in which a second conductive layer having a second connection terminal is arranged on a second insulating layer; and a connection layer that forms fillets along longitudinal side surfaces of the first connection terminal, and interconnects the first connection terminal and the second connection terminal. The first connection terminal may have a projection portion.

    Abstract translation: 一种电路板互连结构，具有第一印刷线路板，其中第一导电电路布置在第一绝缘层上，所述第一导电电路在其端部上具有第一连接端子，其中上表面宽度窄于 底面宽度; 第二印刷线路板，其中具有第二连接端子的第二导电层布置在第二绝缘层上; 以及连接层，其沿着所述第一连接端子的纵向侧表面形成圆角，并且将所述第一连接端子和所述第二连接端子互连。 第一连接端子可以具有突出部分。

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