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公开(公告)号:US09907160B2
公开(公告)日:2018-02-27
申请号:US15157339
申请日:2016-05-17
Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
Inventor: Chih-Hao Lin
CPC classification number: H05K1/0245 , H01P3/026 , H05K1/0216 , H05K1/0224 , H05K1/115 , H05K1/144 , H05K2201/041 , H05K2201/093
Abstract: A design for printed circuit board with reduced susceptibility to common-mode noise includes a first substrate, a differential pair of signal lines with two differential transmission lines laid on the first substrate, a second substrate, a metal layer located between the first substrate and the second substrate, and a grounding layer The second substrate is located between the second substrate and the grounding layer, and a conductive structure is located in the second substrate and couples the metal layer to the grounding layer. A length of the metal layer is substantially equal to a length of each of the two differential transmission lines.
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公开(公告)号:US09900974B2
公开(公告)日:2018-02-20
申请号:US15171704
申请日:2016-06-02
Applicant: FINISAR CORPORATION
Inventor: Wenhua Ling , Yan Yang Zhao , Yongsheng Liu , Yuheng Lee
CPC classification number: H05K1/021 , G02B6/00 , G02B6/4246 , G02B6/4269 , G02B6/4272 , G02B6/428 , H05K1/0204 , H05K1/0274 , H05K1/0298 , H05K1/0306 , H05K1/115 , H05K1/144 , H05K1/181 , H05K2201/041 , H05K2201/09509 , H05K2201/10121
Abstract: In one example embodiment, an optoelectronic assembly includes a multilayer ceramic substrate that includes multiple ceramic layers and a via disposed through at least one of the ceramic layers. The via may be formed from a conductive material that is configured to communicate a signal through the via. The multilayer ceramic substrate may be configured to dissipate heat emitted by an electronic component coupled to the multilayer ceramic substrate.
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公开(公告)号:US20180045903A1
公开(公告)日:2018-02-15
申请号:US15726475
申请日:2017-10-06
Applicant: OLYMPUS CORPORATION
Inventor: Yusuke NAKAGAWA
CPC classification number: G02B6/428 , G02B6/03616 , G02B6/12 , G02B6/122 , G02B6/4214 , G02B6/4298 , G02B2006/12069 , H05K1/0274 , H05K1/144 , H05K1/181 , H05K2201/041 , H05K2201/10121 , H05K2201/10151 , H05K2201/10174 , H05K2201/10303 , H05K2201/2054
Abstract: An optical-electric circuit board includes: a polymer-type optical waveguide substrate provided with a reflective surface which optically couples a first optical path and a second optical path to each other; and electrical wiring, wherein at least a portion of a member which configures the reflective surface is formed of a conductive member, the electrical wiring is formed of first wiring disposed on a side of a first principal surface of the optical waveguide substrate and second wiring disposed on a side of a second principal surface of the optical waveguide substrate, and the conductive member electrically connects the first wiring and the second wiring with each other.
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公开(公告)号:US20170351475A1
公开(公告)日:2017-12-07
申请号:US15537251
申请日:2016-01-05
Applicant: BARCO N.V.
Inventor: Karim MEERSMAN , Greet ADAMS
CPC classification number: G06F3/1446 , G09G3/32 , G09G2300/026 , G09G2320/0233 , G09G2320/0242 , G09G2330/02 , G09G2380/02 , H05K1/028 , H05K3/365 , H05K2201/041 , H05K2201/10106 , H05K2201/10265 , H05K2201/10318
Abstract: A tiled display including discrete luminous sources distributed over at least two adjacent flexible display tiles, each of the flexible display tiles being configured to drive the discrete luminous sources on it when connected to a power supply and when receiving data and control signals. The power, data and control signals are provided to the tiles through conducting tracks formed on a carrier substrate, where an electrical connection between a first conductor on the carrier substrate and a second conductor on a tile is established by using a connecting element having a resilient means keeping it pressed and in contact with a surface of the first conductor or second conductor. Additionally, a carrier substrate and to a flexible display tile for use in such tiled displays.
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公开(公告)号:US09831144B2
公开(公告)日:2017-11-28
申请号:US14428376
申请日:2013-08-28
Applicant: QUBEICON LTD.
Inventor: Shimon Podval
IPC: H05K1/18 , H01L23/13 , H01L23/498 , H01L25/065 , H05K1/11 , H05K1/14 , H05K1/02 , H01L23/00 , H05K3/34
CPC classification number: H01L23/13 , H01L23/49838 , H01L23/49855 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/16 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/81 , H01L25/0655 , H01L2224/0401 , H01L2224/04042 , H01L2224/05554 , H01L2224/05555 , H01L2224/06135 , H01L2224/131 , H01L2224/16225 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/48464 , H01L2224/48465 , H01L2224/48471 , H01L2224/48472 , H01L2224/49113 , H01L2224/49177 , H01L2224/73265 , H01L2224/81203 , H01L2224/81205 , H01L2224/81385 , H01L2924/00014 , H01L2924/15162 , H01L2924/15192 , H05K1/0204 , H05K1/117 , H05K1/141 , H05K3/3415 , H05K3/3442 , H05K2201/041 , H05K2201/09063 , H05K2201/09154 , H05K2201/09163 , H05K2201/0939 , H05K2201/09472 , Y02P70/613 , H01L2924/014 , H01L2224/32225 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207
Abstract: A submount for connecting a semiconductor device to an external circuit, the submount comprising: a planar substrate formed from an insulating material and having relatively narrow edge surfaces and first and second relatively large face surfaces; at least one recess formed along an edge surface; a layer of a conducting material formed on a surface of each of the at least one recess; a first plurality of soldering pads on the first face surface configured to make electrical contact with a semiconductor device; and electrically conducting connections each of which electrically connects a soldering pad in the first plurality of soldering pads to the layer of conducting material of a recess of the at least one recess.
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公开(公告)号:US09829915B2
公开(公告)日:2017-11-28
申请号:US14496876
申请日:2014-09-25
Applicant: Intel Corporation
Inventor: Kevin E. Wells , Richard C. Stamey
CPC classification number: G06F1/16 , H01L2924/0002 , H05K1/115 , H05K1/141 , H05K3/3436 , H05K3/421 , H05K3/4694 , H05K2201/041 , H05K2201/09972 , H05K2201/10159 , H05K2201/10719 , Y02P70/613 , Y10T29/49128 , H01L2924/00
Abstract: Described are apparatuses for modular printed circuit boards (PCB) and methods for producing modular PCBs. An apparatus may include a first PCB module with a first pattern of routing structures on one or more layers of the first PCB module. The apparatus may further include a second PCB module with a second pattern of routing structures on one or more layers of the second PCB module. The second pattern of routing structures may be aligned with and electrically coupled to the first pattern of routing structures without connectors. Other embodiments may be described and/or claimed.
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公开(公告)号:US09823703B2
公开(公告)日:2017-11-21
申请号:US14626723
申请日:2015-02-19
Applicant: Google Inc.
Inventor: Paul Eremenko , Ara Knaian , Seth Newburg , David Fishman
CPC classification number: G06F1/1658 , G06F1/1684 , H04M1/0254 , H04M1/0274 , H04W88/02 , H05K1/144 , H05K2201/041 , H05K2201/042 , H05K2201/043 , H05K2201/044
Abstract: Examples herein include modules and connections for modules to couple to a computing device. An example module includes a housing comprising an end to couple to a computing device, multiple capacitive pads that each include data contacts to enable data transfer, a power contact pad to provide or receive power, and a ground contact pad to couple to ground. The ground contact pad is larger in size than the power contact pad, and the ground contact pad is positioned closer than the power contact pad to the end of the housing configured to couple to the computing device.
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公开(公告)号:US20170323849A1
公开(公告)日:2017-11-09
申请号:US15528049
申请日:2015-11-10
Applicant: TSINGHUA UNIVERSITY
IPC: H01L23/498 , H01L21/48 , H01L23/15 , H05K1/14 , H05K3/36
CPC classification number: H01L23/49827 , H01L21/48 , H01L21/4853 , H01L21/486 , H01L23/15 , H01L23/49816 , H01L23/49833 , H01L23/49838 , H01L2924/0002 , H05K1/0306 , H05K1/141 , H05K1/144 , H05K3/366 , H05K3/368 , H05K2201/041 , H05K2201/042 , H05K2201/09827 , H05K2201/10378 , H05K2201/10734 , H01L2924/00
Abstract: Disclosed is an adapter panel and a method of manufacturing the same comprising a panel body having a first surface and an opposing second surface, wherein a through-hole in a frustrum shape is formed through the panel body and filled by a conical electrical conductor between the first and second surface. The conical electrical conductor has a plane end flush with the first surface and a tip end protruding from the second surface. The panel body further comprises a wiring structure on the first surface electrically connected to the plane end of the conical electrical conductor. Bonding to a dielectric plate can be achieved by directly inserting the tip end of the conical electrical conductor into a solder ball.
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公开(公告)号:US20170295648A1
公开(公告)日:2017-10-12
申请号:US15517109
申请日:2015-10-20
Applicant: KONICA MINOTA, INC.
Inventor: Seiji OHASHI
CPC classification number: H05K1/148 , G06F1/1626 , G06F1/1637 , G09F9/30 , H01L51/524 , H04M1/0266 , H04M1/0277 , H04M1/22 , H04M1/23 , H04M2201/38 , H05K1/118 , H05K1/144 , H05K1/189 , H05K3/323 , H05K2201/041 , H05K2201/10106 , H05K2201/10128 , H05K2201/10136
Abstract: Provided is an electronic device that makes it possible to minimize decreases in mounting yield. In the electronic device, an OLED panel and an FPC are crimped and connected using an ACF. The FPC comprises a pattern that is symmetrical with respect to a line corresponding to a direction perpendicular to a straight line that connects electrodes connected to the OLED panel within the range in which the OLED panel is mounted.
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公开(公告)号:US20170224203A1
公开(公告)日:2017-08-10
申请号:US15493902
申请日:2017-04-21
Applicant: OLYMPUS CORPORATION
Inventor: Fuminori TANAHASHI
CPC classification number: A61B1/04 , A61B1/00 , A61B1/00004 , A61B1/00045 , A61B1/00163 , A61B1/005 , G02B23/243 , G02B23/2484 , H04N5/2252 , H04N2005/2255 , H05K1/111 , H05K1/144 , H05K3/366 , H05K2201/041 , H05K2201/09036
Abstract: An image pickup apparatus for an endoscope of the present invention includes a first circuit board on which a lead portion, a window portion in which a part of the lead portion is exposed, and a second circuit board on which a circuit pattern is fixed by soldering to the lead portion exposed on the window portion, and the lead portion that is exposed on the window portion extends from one end side of the window portion to the other end side, and has an enlarged end portion of the lead portion that is placed between two or more insulating layers and is formed with a larger width than a width of the lead portion in the window portion, at the other end side.
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