公开(公告)号：US20070170561A1

公开(公告)日：2007-07-26

申请号：US11330307

申请日：2006-01-11

Applicant: James Wehrly

Inventor： James Wehrly

IPC: H01L23/02

CPC classification number: H05K1/189 ,  H01L23/13 ,  H01L23/5385 ,  H01L23/5387 ,  H01L25/18 ,  H01L2924/0002 ,  H05K1/147 ,  H05K1/182 ,  H05K3/326 ,  H05K2201/056 ,  H05K2201/091 ,  H05K2201/10515 ,  H05K2201/10689 ,  H01L2924/00

Abstract: The present invention provides an improvement on the use of flexible circuit connectors for electrically coupling IC devices to one another in a stacked configuration by use of the flexible circuit to provide the connection of the stacked IC module to other circuits. Use of the flexible circuit as the connection of the IC module allows the flexible circuit to provide strain relief and allows stacked IC modules to be assembled with a lower profile than with previous methods. The IC module can be connected to external circuits through the flexible circuit connectors by a variety of means, including solder pads, edge connector pads, and socket connectors. This allows for IC devices to occupy less space then with previous methods, which is beneficial in modules such as memory modules with multiple, stacked memory devices.

Abstract translation: 本发明提供了使用柔性电路连接器来改进使用柔性电路将叠层IC模块连接到其它电路的层叠结构中的IC器件彼此电连接的柔性电路连接器。 使用柔性电路作为IC模块的连接允许柔性电路提供应变消除，并允许堆叠的IC模块以比以前的方法更低的轮廓组装。 IC模块可以通过各种方式通过柔性电路连接器连接到外部电路，包括焊盘，边缘连接器焊盘和插座连接器。 这允许IC器件占用较少的空间，然后使用先前的方法，这在诸如具有多个堆叠的存储器件的存储器模块的模块中是有益的。

公开(公告)号：US20070159545A1

公开(公告)日：2007-07-12

申请号：US11436946

申请日：2006-05-18

Applicant: James Wehrly ,  Ron Orris ,  Leland Szewerenko ,  Tim Roy ,  Julian Partridge ,  David Roper

Inventor： James Wehrly ,  Ron Orris ,  Leland Szewerenko ,  Tim Roy ,  Julian Partridge ,  David Roper

IPC: G06F17/50 ,  H03K19/177 ,  H04N5/335 ,  H03K19/00 ,  H01L25/00 ,  H04N3/14

CPC classification number: H01L25/18 ,  H01L23/5387 ,  H01L25/105 ,  H01L2224/49175 ,  H01L2924/15311 ,  H05K1/147 ,  H05K1/189 ,  H05K3/326 ,  H05K3/3421 ,  H05K3/3436 ,  H05K3/3447 ,  H05K2201/055 ,  H05K2201/091 ,  H05K2201/09463 ,  H05K2201/10515 ,  H05K2201/10689

Abstract: The present invention provides a system and method for combining a leaded package IC and a semiconductor die using a flex circuitry to reduce footprint for the combination. A leaded IC package is disposed along the obverse side of a flex circuit. In a preferred embodiment, leads of the leaded IC package are configured to allow the lower surface of the body of the leaded IC package to contact the surface of the flex circuitry either directly or indirectly through an adhesive. A semiconductor die is connected to the reverse side of the flex circuit. In one embodiment, the semiconductor die is disposed on the reverse side of the flex while, in an alternative embodiment, the semiconductor die is disposed into a window in the flex circuit to rest directly or indirectly upon the body of the leaded IC package. Module contacts are provided in a variety of configurations. In a preferred embodiment, the leaded IC package is a flash memory and the semiconductor die is a controller.

公开(公告)号：US20070158821A1

公开(公告)日：2007-07-12

申请号：US11482325

申请日：2006-07-07

Applicant: Leland Szewerenko ,  James Douglas Wehrly ,  David L. Roper

Inventor： Leland Szewerenko ,  James Douglas Wehrly ,  David L. Roper

IPC: H01L23/12

CPC classification number: H05K3/326 ,  H01L23/13 ,  H01L23/5385 ,  H01L23/5387 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/147 ,  H05K1/182 ,  H05K1/189 ,  H05K3/3421 ,  H05K3/3436 ,  H05K3/3447 ,  H05K2201/055 ,  H05K2201/056 ,  H05K2201/091 ,  H05K2201/09463 ,  H05K2201/10515 ,  H05K2201/10689 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The present invention provides a system and method for combining a leaded package IC and a semiconductor die using a flex circuitry. The leaded packaged IC is disposed along one side of a flex circuit. The semiconductor die is disposed along the flex circuitry and preferably is between at least a part of the flex circuitry and the body of the leaded packaged IC. Preferably, the die is attached to a conductive layer of the flex circuitry. The flex circuitry preferably employs at least two conductive layers and the leaded packaged IC and die are preferably connected to one of the conductive layers of the flex circuitry. In preferred modules, the leaded packaged IC is preferably a flash memory device and the semiconductor die is preferably a controller.

Abstract translation: 本发明提供一种使用柔性电路组合引线封装IC和半导体管芯的系统和方法。 引线封装IC沿柔性电路的一侧设置。 半导体管芯沿着柔性电路布置，并且优选地位于柔性电路的至少一部分和引线封装IC的主体之间。 优选地，管芯附接到柔性电路的导电层。 柔性电路优选地采用至少两个导电层，并且有铅封装的IC和管芯优选地连接到柔性电路的导电层中的一个。 在优选的模块中，有铅封装的IC优选地是闪存器件，并且半导体管芯优选地是控制器。

公开(公告)号：US20070128924A1

公开(公告)日：2007-06-07

申请号：US11674181

申请日：2007-02-13

Applicant: Koji NAKAYAMA

Inventor： Koji NAKAYAMA

IPC: H01R12/24

CPC classification number: H01R12/62 ,  B41J2/14209 ,  B41J2/1609 ,  B41J2/1623 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1631 ,  B41J2/1634 ,  B41J2002/14217 ,  B41J2002/14225 ,  B41J2002/14306 ,  B41J2002/14459 ,  B41J2002/14491 ,  H05K1/0393 ,  H05K3/363 ,  H05K3/4007 ,  H05K2201/0191 ,  H05K2201/091 ,  H05K2203/0195 ,  Y10T29/49002 ,  Y10T29/49021 ,  Y10T29/49147 ,  Y10T29/49151

Abstract: The ink jet head is provided with a piezo-electric sheet having a plurality of contacts distributed on a surface thereof. A flat connector is fixed so as to cover the surface of the piezo-electric sheet. A plurality of conductive spots and a plurality of conductive lines are formed on a surface of the flat connector. One of each of the conductive lines is connected with one of each of the conductive spots, and the plurality of conductive spots is disposed with the same distributive pattern as the plurality of contacts. The flat connector is provided with a sheet formed of an insulating material, and is provided with a plurality of projections corresponding to the conductive spots. At least a distal end of each of the projections is covered with one of the conductive spots. The flat connector and the piezo-electric sheet are fixed such that the conductive spots make contact with the contacts of the piezo-electric sheet. Portions of the flat connector having projections are thinner than the surrounding area of the flat connector.

Abstract translation: 喷墨头设置有在其表面上分布有多个触点的压电片。 固定平面连接器以覆盖压电片的表面。 在扁平连接器的表面上形成多个导电点和多条导线。 每个导电线中的一个与每个导电点中的一个连接，并且多个导电点以与多个触点相同的分布图案设置。 扁平连接器设置有由绝缘材料形成的片材，并且设置有与导电点对应的多个突起。 每个突起的至少远端用一个导电点覆盖。 扁平连接器和压电片是固定的，使得导电点与压电片的触点接触。 具有突起的扁平连接器的部分比扁平连接器的周围区域薄。

公开(公告)号：US20070097550A1

公开(公告)日：2007-05-03

申请号：US11553892

申请日：2006-10-27

Applicant: Ooki Yamaguchi ,  Takao Haino ,  Hideaki Abe

Inventor： Ooki Yamaguchi ,  Takao Haino ,  Hideaki Abe

IPC: G11B5/60

CPC classification number: H05K3/3442 ,  G11B5/4853 ,  H05K1/056 ,  H05K1/189 ,  H05K3/326 ,  H05K3/3494 ,  H05K2201/091 ,  H05K2201/10727 ,  H05K2203/107 ,  Y02P70/613

Abstract: A magnetic head assembly is provided. The magnetic head assembly includes a slider in which a head element is mounted. A flexure supports the slider. The flexure includes a pair of outriggers, a connection portion, and a tongue portion. A flexible wiring substrate is fixedly bonded to the surface of the flexure. An electrode pad of the slider and an electrode pad of the flexible wiring substrate are bonded to each other by solder. A plurality of solder bonded portions are arranged on the connection portion. A deformable portion is formed in the pair of outriggers and located on an extended line on which the solder bonded portions are arranged, so that the free end side of the flexure is deformable.

Abstract translation: 提供磁头组件。 磁头组件包括其中安装有头元件的滑块。 挠性件支撑滑块。 挠曲件包括一对外伸支架，连接部分和舌部。 柔性布线基板固定地粘合到挠曲件的表面上。 滑块的电极焊盘和柔性布线基板的电极焊盘通过焊料彼此接合。 多个焊接接合部分布置在连接部分上。 可变形部分形成在该对外伸支架中并且位于其上布置焊料接合部分的延伸线上，使得挠曲件的自由端侧可变形。

公开(公告)号：US20070072450A1

公开(公告)日：2007-03-29

申请号：US11234985

申请日：2005-09-26

Applicant: Michael McAllister ,  Harald Pross ,  Gerhard Ruehle ,  Wolfgang Scholz ,  Gerhard Schoor

Inventor： Michael McAllister ,  Harald Pross ,  Gerhard Ruehle ,  Wolfgang Scholz ,  Gerhard Schoor

IPC: H01R12/00

CPC classification number: H05K3/0061 ,  H05K3/325 ,  H05K2201/09018 ,  H05K2201/091 ,  H05K2201/10598 ,  H05K2201/10719

Abstract: A MCM system board uses a stiffener arrangement to enhance mechanical, thermo and electrical properties by incorporating an LGA compression connector in a computer system. The present designs of large scale computing systems (LSCS) in IBM use a MCM that is attached to a system board and held together by a stiffening frame. Due to the nature of the manufacturing of the system board, there can be significant gaps formed in the mounting area of the MCM between the board and the stiffener. A method is described that not only fills the void, it also, in addition promotes thermo conduction of excess heat away from the MCM and at the same time promotes enhanced electrical properties of the LGA connections of the MCM to the system board.

公开(公告)号：US20070068700A1

公开(公告)日：2007-03-29

申请号：US11527852

申请日：2006-09-26

Applicant: Tomonari Ohtsuki ,  Yasue Yamazaki ,  Hirofumi Daimon ,  Kozo Matsuo ,  Sachi Takami

Inventor： Tomonari Ohtsuki ,  Yasue Yamazaki ,  Hirofumi Daimon ,  Kozo Matsuo ,  Sachi Takami

IPC: H05K1/11 ,  B23K26/16 ,  H01K3/10 ,  H05K1/00 ,  C25D5/02

CPC classification number: C25D5/022 ,  B23K26/0661 ,  C25D5/10 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/0401 ,  H01L2224/05001 ,  H01L2224/0554 ,  H01L2224/05552 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/3011 ,  H05K1/0346 ,  H05K1/0393 ,  H05K3/002 ,  H05K3/0032 ,  H05K3/061 ,  H05K3/321 ,  H05K3/326 ,  H05K3/368 ,  H05K3/4015 ,  H05K3/42 ,  H05K2201/0367 ,  H05K2201/0373 ,  H05K2201/09081 ,  H05K2201/091 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/09827 ,  H05K2201/10234 ,  H05K2201/10303 ,  H05K2201/10424 ,  H05K2203/0554 ,  H05K2203/0557 ,  H05K2203/0789 ,  H05K2203/0793 ,  Y10T29/49165 ,  Y10T29/49224 ,  H01L2924/00012

Abstract: A board consisting of a polyimide layer and copper foils is worked from one direction by etching to form through-holes, and the copper foils and inside of the through-holes are plated with copper, or the board is worked by etching or laser machining to form blind holes to expose the copper foils on the other side and through-holes simultaneously, and copper foils and insides of the blind holes and the through-holes are plated with copper. A metal ball plated with a noble metal is fixed on the copper foil by solidification of a metal paste to form an electric contact. Two superimposed plastic sheets are formed with holes each having a projection on inner wall of the hole, thereby vertically holding conductors by the projections of the holes of the superimposed plastic sheets. A laser beam machining method fabricates grooves or slits in a workpiece.

Abstract translation: 由聚酰亚胺层和铜箔构成的板通过蚀刻从一个方向加工形成通孔，铜箔和通孔内部镀有铜，或者通过蚀刻或激光加工对板进行加工 形成盲孔以同时露出另一侧的铜箔和通孔，盲孔和铜箔的铜箔和通孔用铜电镀。 镀有贵金属的金属球通过金属糊固化形成电接触而固定在铜箔上。 两个叠加的塑料片形成有孔，每个孔在孔的内壁上具有突起，由此通过叠加的塑料片的孔的突起垂直地保持导体。 激光束加工方法在工件中制造槽或狭缝。

公开(公告)号：US07141884B2

公开(公告)日：2006-11-28

申请号：US10872727

申请日：2004-06-22

Applicant: Toshiyuki Kojima ,  Seiichi Nakatani ,  Yasuhiro Sugaya ,  Yoshiyuki Yamamoto

Inventor： Toshiyuki Kojima ,  Seiichi Nakatani ,  Yasuhiro Sugaya ,  Yoshiyuki Yamamoto

IPC: H01L29/40

CPC classification number: H05K1/186 ,  H01L23/3121 ,  H01L23/315 ,  H01L23/5385 ,  H01L27/14618 ,  H01L27/14643 ,  H01L27/148 ,  H01L31/0203 ,  H01L31/02325 ,  H01L2224/16225 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/19041 ,  H01L2924/19105 ,  H05K1/0272 ,  H05K3/20 ,  H05K3/4614 ,  H05K2201/0108 ,  H05K2201/0209 ,  H05K2201/091 ,  H05K2201/10121 ,  H05K2201/10378 ,  H05K2201/10674

Abstract: In a module with a built-in semiconductor, higher densification is achieved by disposing inner vias close to a semiconductor device. A module which has a space (107) between a first wiring layer (102a) and a built-in semiconductor device (105). The module is obtained by: mounting the semiconductor device (105) on a first wiring layer (102a) of a wiring board (103) without using a sealing resin; stacking on the circuit board an electrically insulating substrate having a through bore (inner via) (104) filled with a conductive paste and an opening for receiving the semiconductor device, and a mold release carrier having a second wiring layer (102b) in the stated order; and heating and pressurizing so that the semiconductor device (105) is incorporated in a core layer (101) which is formed by curing the electrically insulating substrate.

Abstract translation: 在具有内置半导体的模块中，通过将靠近半导体器件的内部通孔布置来实现更高的致密化。 一种在第一布线层（102a）和内置半导体器件（105）之间具有空间（107）的模块。 该模块通过以下方法获得：不使用密封树脂将半导体器件（105）安装在布线板（103）的第一布线层（102a）上; 在电路板上堆叠具有填充有导电浆料的通孔（内通孔）（104）和用于接收半导体器件的开口的电绝缘基板，以及具有第二布线层（102b）的脱模载体 命令; 加热加压使半导体器件（105）结合在通过固化电绝缘基板而形成的芯层（101）中。

公开(公告)号：US07132756B2

公开(公告)日：2006-11-07

申请号：US10692938

申请日：2003-10-24

Applicant: Yasuhiro Sugaya ,  Toshiyuki Asahi ,  Shingo Komatsu ,  Yoshiyuki Yamamoto ,  Seiichi Nakatani

Inventor： Yasuhiro Sugaya ,  Toshiyuki Asahi ,  Shingo Komatsu ,  Yoshiyuki Yamamoto ,  Seiichi Nakatani

IPC: H01L23/48

CPC classification number: H05K3/328 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49894 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L24/94 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/05568 ,  H01L2224/16 ,  H01L2224/2402 ,  H01L2224/24226 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/01039 ,  H01L2924/01044 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/19105 ,  H01L2924/3011 ,  H05K1/0271 ,  H05K1/0373 ,  H05K3/20 ,  H05K3/326 ,  H05K3/4614 ,  H05K3/4626 ,  H05K2201/091 ,  H05K2201/10674 ,  H01L2224/97 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/05144 ,  H01L2924/00014 ,  H01L2224/05147

Abstract: A semiconductor device (1) of the present invention includes a semiconductor element (103) including electrode parts (104), and a wiring substrate (108) including an insulation layer (101), electrode-part-connection electrodes (102) provided in the insulation layer (101), and external electrodes (107) that is provided in the insulation layer (101) and that is connected electrically with the electrode-part-connection electrodes (102), in which the electrode parts (104) and the electrode-part-connection electrodes (102) are connected electrically with each other. The insulation layer (101) has an elastic modulus measured according to JIS K6911 of not less than 0.1 GP a and not more than 5 GPa, and the electrodes (104) and the electrode-part-connection electrodes (102) are connected by metal joint.

公开(公告)号：US20060242827A1

公开(公告)日：2006-11-02

申请号：US10546730

申请日：2005-01-21

Applicant: Toshihiro Nishii

Inventor： Toshihiro Nishii

IPC: H05K3/36 ,  H05K3/20

CPC classification number: H05K3/4069 ,  H05K3/382 ,  H05K3/4614 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/0358 ,  H05K2201/0382 ,  H05K2201/091 ,  H05K2203/1461 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49139 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T428/24917

Abstract: A conductive portion is formed in a hole formed in a material sheet. A metal foil is placed on a surface of the material sheet to provide a laminated sheet. The laminated sheet is heated and pressed to provide a circuit-forming board. The metal foil includes a pressure absorption portion and a hard portion adjacent to the pressure absorption portion. The pressure absorption portion has a thickness changing according to a pressure applied thereto. The circuit-forming board provided by this method provides a high-density circuit board of high quality having reliable electrical connection.