公开(公告)号：US07632446B1

公开(公告)日：2009-12-15

申请号：US12128220

申请日：2008-05-28

Applicant: Michael A. Kindig

Inventor： Michael A. Kindig

IPC: B32B37/12 ,  B29C45/14

CPC classification number: H05K3/284 ,  H05K1/18 ,  H05K2201/10015 ,  H05K2201/10166 ,  H05K2201/10424 ,  H05K2201/2018 ,  H05K2203/1147

Abstract: Electrical components mounted onto a circuit board may be sealed within a frame tray upon the addition of a curable material that encapsulates the circuit board. The electrical components of the circuit board are positioned and sealed within the frame tray such that the cured material does not affect an airflow path which dissipates heat produced by the electrical components during use. The curing of the curable material shields the circuit board from moisture, dust and other environmental contaminates.

Abstract translation: 安装在电路板上的电气部件可以在加入封装电路板的可固化材料之后被密封在框架托盘内。 电路板的电气部件被定位和密封在框架托盘内，使得固化的材料不影响在使用期间散发由电气部件产生的热量的气流路径。 可固化材料的固化使电路板免受湿气，灰尘和其他环境污染。

公开(公告)号：US07606042B2

公开(公告)日：2009-10-20

申请号：US11869644

申请日：2007-10-09

Applicant: Paul Goodwin

Inventor： Paul Goodwin

IPC: H05K1/00

CPC classification number: G11C5/04 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H05K1/0203 ,  H05K1/118 ,  H05K1/181 ,  H05K1/189 ,  H05K3/0061 ,  H05K2201/056 ,  H05K2201/1056 ,  H05K2201/10734 ,  H05K2201/2018 ,  H05K2203/1572 ,  H01L2224/0401

Abstract: Multiple DIMM circuits or instantiations are presented in a single module. In some embodiments, memory integrated circuits (preferably CSPs) and accompanying AMBs, or accompanying memory registers, are arranged in two ranks in two fields on each side of a flexible circuit. The flexible circuit has expansion contacts disposed along one side. The flexible circuit is disposed about a supporting substrate or board to place one complete DIMM circuit or instantiation on each side of the constructed module. In alternative but also preferred embodiments, the ICs on the side of the flexible circuit closest to the substrate are disposed, at least partially, in what are, in a preferred embodiment, windows, pockets, or cutaway areas in the substrate. Other embodiments may only populate one side of the flexible circuit or may only remove enough substrate material to reduce but not eliminate the entire substrate contribution to overall profile. The flexible circuit may exhibit one or two more conductive layers, and may have changes in the layered structure of have split layers. Other embodiments may stagger or offset the ICs or include greater numbers of ICs.

Abstract translation: 多个DIMM电路或实例被呈现在单个模块中。 在一些实施例中，存储器集成电路（优选CSP）和伴随的AMB或伴随的存储器寄存器被布置在柔性电路的每一侧的两个场中的两个等级中。 柔性电路具有沿着一侧设置的扩展触点。 柔性电路围绕支撑衬底或板设置，以在构造的模块的每一侧上放置一个完整的DIMM电路或实例化。 在替代但也优选的实施例中，最靠近基板的柔性电路一侧的IC至少部分地设置在优选实施例中在基板中的窗口，凹穴或切口区域中。 其他实施例可以仅填充柔性电路的一侧，或者可以仅移除足够的衬底材料以减少但不消除整个衬底对整体轮廓的贡献。 柔性电路可以表现出一个或两个更多的导电层，并且可以具有分层的层状结构的变化。 其他实施例可能错开或偏移IC或包括更多数量的IC。

公开(公告)号：US07592704B2

公开(公告)日：2009-09-22

申请号：US12169542

申请日：2008-07-08

Applicant: Terry L. Sterrett ,  Devendra Natekar

Inventor： Terry L. Sterrett ,  Devendra Natekar

IPC: H01L23/053 ,  H01L23/48

CPC classification number: H05K3/4038 ,  H01L21/486 ,  H01L23/49827 ,  H01L24/48 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/14 ,  H05K3/06 ,  H05K2201/09881 ,  H05K2201/10378 ,  H05K2201/2018 ,  H05K2203/0369 ,  H05K2203/1476 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: In one embodiment, a package-to-package stack is assembled comprising a first integrated circuit package, and a second integrated circuit package which are mechanically and electrically connected using an interposer. In one embodiment, the interposer 106 includes columnar interconnects which may be fabricated by etching a conductive member such as copper foil, for example. In one application, the pitch or center to center spacing of the columnar interconnects may be defined by masking techniques to provide an interconnect pitch suitable for a particular application. In yet another aspect, etching rates may be controlled to provide height to width aspect ratios of the columnar interconnects which are suitable for various applications.

Abstract translation: 在一个实施例中，组装包装堆叠包括第一集成电路封装和第二集成电路封装，其使用中介层机械和电连接。 在一个实施例中，插入器106包括可以通过例如蚀刻诸如铜箔的导电构件来制造的柱状互连。 在一个应用中，柱状互连的间距或中心到中心间隔可以通过掩模技术来定义，以提供适合于特定应用的互连间距。 在另一方面，可以控制蚀刻速率以提供适合于各种应用的柱状互连的高宽比长宽比。

公开(公告)号：US07573724B2

公开(公告)日：2009-08-11

申请号：US11146000

申请日：2005-06-07

Applicant: Soon-Yong Hur

Inventor： Soon-Yong Hur

IPC: H01R12/16

CPC classification number: H05K3/325 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/73265 ,  H05K1/141 ,  H05K3/284 ,  H05K2201/10159 ,  H05K2201/10446 ,  H05K2201/10537 ,  H05K2201/10545 ,  H05K2201/2018 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A motherboard may have contact pads arranged along a peripheral region on one or both surfaces thereof. A memory module may have unit packages fixed to an upper plate and a lower plate of a module frame. The unit packages may be spaced apart from each other. The upper and the lower unit packages may have contact terminals facing each other. The contact terminals may be elastically bendable, and/or the unit packages may be mounted on the plates via elastic members. The peripheral region of the motherboard may be inserted into the memory module, so the contact terminals of the memory module may elastically contact with and be electrically coupled to the contact pads of the motherboard.

Abstract translation: 主板可以具有沿着其一个或两个表面上的周边区域布置的接触垫。 存储器模块可以具有固定到模块框架的上板和下板的单元封装。 单元包装可以彼此间隔开。 上部和下部单元封装可以具有彼此面对的接触端子。 接触端子可以是弹性弯曲的，和/或单元包装件可以经由弹性构件安装在板上。 母板的周边区域可以被插入到存储器模块中，因此存储器模块的接触端子可以与母板的接触垫弹性地接触并与其电耦合。

公开(公告)号：US20090196002A1

公开(公告)日：2009-08-06

申请号：US12362149

申请日：2009-01-29

Applicant: Kenji FUKUZONO

Inventor： Kenji FUKUZONO

IPC: H05K1/18 ,  H05K1/11

CPC classification number: H05K1/0271 ,  H05K3/0058 ,  H05K3/301 ,  H05K3/325 ,  H05K3/3436 ,  H05K2201/0311 ,  H05K2201/10659 ,  H05K2201/10734 ,  H05K2201/2009 ,  H05K2201/2018

Abstract: A printed wiring board unit includes an electronic circuit component, a printed wiring board, a plurality of first conductive terminals disposed between the electronic circuit component and the printed wiring board, at least one of the first conductive terminals arranged along a quadrangular outline, and a plurality of second conductive terminals disposed between the electronic circuit component and the printed wiring board, the second conductive terminals arranged at a corner of the quadrangular outline, and the second conductive terminals contacting at least one of the printed wiring board and the electronic circuit component in a relatively displaceable manner.

Abstract translation: 印刷电路板单元包括电子电路部件，印刷线路板，布置在电子电路部件和印刷线路板之间的多个第一导电端子，沿着四边形轮廓布置的至少一个第一导电端子，以及 设置在电子电路部件和印刷线路板之间的多个第二导电端子，布置在四边形轮廓的角部的第二导电端子和与印刷线路板和电子电路部件中的至少一个接触的第二导电端子 相对位移的方式。

公开(公告)号：US20090135576A1

公开(公告)日：2009-05-28

申请号：US12133477

申请日：2008-06-05

Applicant: YUAN-HSIAO CHAO

Inventor： YUAN-HSIAO CHAO

IPC: H05K9/00

CPC classification number: H05K1/144 ,  H05K9/0032 ,  H05K2201/10371 ,  H05K2201/2018

Abstract: A stacking structure (20) of printed circuit board is provided. The stacking structure includes a first printed circuit board (22), a second printed circuit board (24), and at least one electronic component. The first printed circuit board has a first shielding frame (262) arranged thereon, and the second printed circuit board has a second shielding frame (264) arranged thereon. The second printed circuit board is stacked on the first printed circuit board. The at least one electronic component is disposed on at least one opposite surfaces of the first and the second printed circuit board. The first shielding frame is engaged with the second shielding frame for shielding the at least one electronic element. In addition, an electronic device incorporating the stacking structure of printed circuit board (10) is also provided.

Abstract translation: 提供印刷电路板的堆叠结构（20）。 堆叠结构包括第一印刷电路板（22），第二印刷电路板（24）和至少一个电子部件。 第一印刷电路板具有布置在其上的第一屏蔽框架（262），并且第二印刷电路板具有布置在其上的第二屏蔽框架（264）。 第二印刷电路板堆叠在第一印刷电路板上。 所述至少一个电子部件设置在所述第一和第二印刷电路板的至少一个相对的表面上。 第一屏蔽框架与第二屏蔽框架接合以屏蔽至少一个电子元件。 此外，还提供了结合印刷电路板（10）的堆叠结构的电子装置。

公开(公告)号：US20090129029A1

公开(公告)日：2009-05-21

申请号：US11942308

申请日：2007-11-19

Applicant: Jens Niemax

Inventor： Jens Niemax

IPC: H05K7/20 ,  H05K3/30

CPC classification number: H05K3/325 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/838 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/351 ,  H05K2201/0314 ,  H05K2201/2018 ,  H05K2203/0169 ,  Y10T29/4913 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299

Abstract: A method for manufacturing an integrated circuit is disclosed. One embodiment provides placing an elastic, anisotropically conductive material on top of a printed circuit board. An electronic component is placed over the elastic, anisotropically conductive material, fixing the electronic component on the printed circuit board.

Abstract translation: 公开了一种用于制造集成电路的方法。 一个实施例提供将弹性各向异性导电材料放置在印刷电路板的顶部上。 将电子部件放置在弹性各向异性导电材料上，将电子部件固定在印刷电路板上。

公开(公告)号：US20090116201A1

公开(公告)日：2009-05-07

申请号：US12140592

申请日：2008-06-17

Applicant: Shin-Chung HSIEH

Inventor： Shin-Chung HSIEH

IPC: H05K1/14 ,  H05K3/32

CPC classification number: H05K1/0218 ,  H05K1/0271 ,  H05K1/181 ,  H05K2201/2009 ,  H05K2201/2018 ,  Y10T29/49144

Abstract: A circuit board module includes a circuit board and a reinforcing substrate. At least one electronic element is disposed on one surface of the circuit board. The reinforcing substrate is connected to a portion of the surface and disposed around the electronic element. A method for reinforcing the structure of the circuit board module is also disclosed.

Abstract translation: 电路板模块包括电路板和加强基板。 至少一个电子元件设置在电路板的一个表面上。 加强基板连接到表面的一部分并且设置在电子元件周围。 还公开了一种用于加强电路板模块的结构的方法。

公开(公告)号：US20090086455A1

公开(公告)日：2009-04-02

申请号：US12239407

申请日：2008-09-26

Applicant: Hideyuki SAKAMOTO ,  Hidefumi Saito ,  Yasuhiro Koike ,  Masao Tsukizawa

Inventor： Hideyuki SAKAMOTO ,  Hidefumi Saito ,  Yasuhiro Koike ,  Masao Tsukizawa

IPC: H05K7/06 ,  H05K3/36

CPC classification number: H05K1/144 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/19107 ,  H01L2924/3025 ,  H05K3/284 ,  H05K3/3447 ,  H05K7/1432 ,  H05K2201/042 ,  H05K2201/10166 ,  H05K2201/10303 ,  H05K2201/10318 ,  H05K2201/10689 ,  H05K2201/2018 ,  Y10T29/49126 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Provided is a circuit device, in which circuit elements incorporated are electrically connected to each other via a lead so as to achieve both of the enhanced functionality and miniaturization. In a hybrid integrated circuit device, a first circuit board and a second circuit board are incorporated into a case member in a way that a first circuit board is overlaid with a second circuit board. A first circuit element is arranged on the upper face of the first circuit board and a second circuit element is arranged on the upper face of the second circuit board. Leads provided in the hybrid integrated circuit device include a lead connected only to the first circuit element mounted on the first circuit board, a lead connected only to the second circuit element mounted on the second circuit board, and a lead connected to both of the first circuit element and the second circuit element.

Abstract translation: 提供了一种电路装置，其中并入的电路元件经由引线彼此电连接，以便实现增强的功能和小型化两者。 在混合集成电路装置中，第一电路板和第二电路板以第一电路板与第二电路板重叠的方式结合到壳体构件中。 第一电路元件布置在第一电路板的上表面上，第二电路元件布置在第二电路板的上表面上。 在混合集成电路装置中提供的引线包括仅连接到安装在第一电路板上的第一电路元件的引线，仅连接到安装在第二电路板上的第二电路元件的引线，以及连接到第一 电路元件和第二电路元件。

公开(公告)号：US20090081419A1

公开(公告)日：2009-03-26

申请号：US11988723

申请日：2006-06-09

Applicant: Yuichi Idomoto ,  Yasuhiro Okuda

Inventor： Yuichi Idomoto ,  Yasuhiro Okuda

IPC: B32B3/10

CPC classification number: H05K1/119 ,  H01R12/7076 ,  H05K3/0058 ,  H05K3/368 ,  H05K2201/0116 ,  H05K2201/015 ,  H05K2201/09045 ,  H05K2201/09845 ,  H05K2201/10378 ,  H05K2201/2018 ,  Y10T428/24802

Abstract: In a composite porous resin base material, a porous resin film is provided with a functional section whereupon an electrode and/or a circuit is formed. On the periphery surrounding the functional section, a step having a height different from that of the functional section is formed, and a frame plate is arranged on a plane of the step. Provided is the composite porous resin base material which has a structure wherein the frame plate having rigidity is attached to the porous resin base material whereupon the electrode and/or a circuit is formed without deteriorating characteristics such as elasticity and conductivity of the porous resin base material.

Abstract translation: 在复合多孔树脂基材中，多孔树脂膜具有形成电极和/或电路的功能部。 在功能部周边的周边形成有与功能部不同的高度的台阶，并且在台阶的平面上配置框架板。 本发明提供一种复合多孔树脂基材，其特征在于，具有刚性的框架板附着在多孔树脂基材上，由此形成电极和/或电路，而不会导致多孔树脂基材的弹性和导电性等劣化 。