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    Multi-rank memory module that emulates a memory module having a different number of ranks
    23.
    发明授权
    Multi-rank memory module that emulates a memory module having a different number of ranks 有权
    模拟具有不同数量的存储器模块的多级存储器模块

    公开(公告)号：US08626998B1

    公开(公告)日：2014-01-07

    申请号：US13972337

    申请日：2013-08-21

    Applicant: SMART Modular Technologies, Inc.

    Inventor： Mike Hossein Amidi ,  Kelvin A. Marino ,  Satyadev Kolli

    IPC: G06F12/00 ,  G11C8/00

    CPC classification number: G11C8/12 ,  G11C5/04 ,  G11C7/1066 ,  G11C7/22 ,  G11C7/222

    Abstract: A transparent four rank memory module has a front side and a back side. The front side has a third memory rank stacked on a first memory rank. The back side has a fourth memory rank stacked on a second memory rank. An emulator coupled to the memory module activates and controls one individual memory rank from either the first memory rank, the second memory rank, the third memory rank, or the fourth memory rank based on the signals received from a memory controller.

    Abstract translation: 透明的四级存储器模块具有前侧和后侧。 前侧具有堆叠在第一存储器等级上的第三存储器级。 背面具有堆叠在第二存储器等级上的第四存储器级。 耦合到存储器模块的仿真器基于从存储器控制器接收的信号来激活并控制来自第一存储器级，第二存储器级，第三存储器级或第四存储器级的一个单独的存储器级。

    Systems and methods for memory snapshotting
    24.
    发明授权
    Systems and methods for memory snapshotting 有权

    公开(公告)号：US12254188B1

    公开(公告)日：2025-03-18

    申请号：US18239376

    申请日：2023-08-29

    Applicant: SMART Modular Technologies, Inc.

    Inventor： Andrew Mills ,  Torry Steed

    IPC: G06F3/06

    Abstract: Systems and methods for memory snapshots are disclosed. In particular, a memory device may include a volatile section and a backup persistent storage section. A snapshot manager circuit is positioned between a host control circuit or central processors. This snapshot manager circuit acts as a memory virtualization layer within the memory device and may use a redirect on write type command to put a snapshot of actively changed memory to a reserved memory area in the volatile section. A background function may copy the snapshots to the persistent storage section. Because the snapshot manager circuit is in the hardware memory access layers of the memory device, operation of the application is not interrupted or paused to access the specific memory sections. Further, snapshots are more readily available in the memory used by the host control circuit.

    SELECTIVE BACKUP TO PERSISTENT MEMORY FOR VOLATILE MEMORY
    25.
    发明申请
    SELECTIVE BACKUP TO PERSISTENT MEMORY FOR VOLATILE MEMORY 有权

    公开(公告)号：US20250053219A1

    公开(公告)日：2025-02-13

    申请号：US18231470

    申请日：2023-08-08

    Applicant: SMART Modular Technologies, Inc.

    Inventor： Andrew Mills

    IPC: G06F1/30 ,  G06F1/3234

    Abstract: Systems and methods for selective backup to persistent memory from volatile memory are disclosed. In one aspect, a memory controller includes a detection circuit that detects an address for a memory access and determines a range into which that address falls. The memory controller also includes a touched map that is configured to store an indication as to what areas (or ranges) of memory have been accessed, as determined by the detection circuit. In the event of a command or power interruption, a backup routine initially consults the touched map and only backs up those ranges which have been touched. Such selective backup may reduce the amount of time and power required to make a backup, reducing the demands placed on a backup energy source.

    Serial attached non-volatile memory
    26.
    发明授权
    Serial attached non-volatile memory 有权

    公开(公告)号：US12169436B2

    公开(公告)日：2024-12-17

    申请号：US17703362

    申请日：2022-03-24

    Applicant: SMART Modular Technologies, Inc.

    Inventor： Robert Tower Frey ,  Kelvin Marino

    IPC: G06F11/10 ,  G06F1/30 ,  G06F11/07 ,  G06F11/14 ,  G06F13/42

    Abstract: Systems and methods for enabling serial attached Non-Volatile (NV) memory are provided. In some embodiments, a method of operation of a computing system including: in an NV Random Access Memory module (NVRAM) having a non-volatile device, a volatile memory device with data, a NV Controller unit (NVC), and a serial host interface, the method includes: receiving a request for data on the serial host interface and providing the requested data, from the volatile memory device with data, on the serial host interface. The method also includes: detecting a disruptive volatile memory event; copying the data of the volatile memory device to the NV device based on the disruptive volatile memory event; and restoring the data of the volatile memory device from the NV device. In this way, Dynamic Random-Access Memory (DRAM) level endurance and speed/latency can be provided while making it NV.

    SINGLE-SLOT PCIE CARD WITH EXPANDED MEMORY
    27.
    发明公开
    SINGLE-SLOT PCIE CARD WITH EXPANDED MEMORY 审中-公开

    公开(公告)号：US20230411882A1

    公开(公告)日：2023-12-21

    申请号：US18087198

    申请日：2022-12-22

    Applicant: SMART Modular Technologies, Inc.

    Inventor： JINYING SHEN ,  KWANG JIN GOOI

    IPC: H01R12/73 ,  H01R25/00 ,  H05K1/02 ,  H05K1/18

    CPC classification number: H01R12/737 ,  H01R25/006 ,  H05K1/0278 ,  H05K1/189 ,  H05K2201/10189 ,  H05K1/117

    Abstract: A single-slot peripheral component interconnect express (PCIe) card with expanded memory is provided. Embodiments described herein use two rigid circuit boards which are oriented perpendicular to each other. The two rigid circuit boards are connected by a flexible cable, which can be sandwiched between the laminates of the rigid boards. The flexible cable further provides high-speed signal connection and high-power connection between the two rigid boards. In addition, the two rigid boards can be secured by two mechanical retainers. This approach enables a PCIe card to have three or more (e.g., four) dual in-line memory modules (DIMMs) while meeting the PCIe standard for single slot primary side height by placing the DIMM sockets horizontally, thus lowering the overall height of the PCIe card.

    Memory centric computing storage controller system
    28.
    发明授权
    Memory centric computing storage controller system 有权

    公开(公告)号：US11182325B1

    公开(公告)日：2021-11-23

    申请号：US16889727

    申请日：2020-06-01

    Applicant: SMART Modular Technologies, Inc.

    Inventor： Robert Tower Frey

    IPC: G06F13/40 ,  G06F13/16

    Abstract: A deaggregated computing system having a memory centric computing storage controller can transfer data from a source to a destination node while dynamically updating a transfer route between them. The transfer route can be recalculated based on the current conditions of the routing nodes between the source and destination. Recalculating the transfer route can be based on power status, bandwidth, in-use status, current capacity, or failure conditions. The deaggregated computing system can include one or more processor units coupled to one or more storage and memory units all connected by the memory centric computing storage controller that can route control and data packets between the processor units and the storage and memory units. The processor units and the storage units can be connected by a combination of serial data communication links and a data storage fabric network.

    Data storage system with information exchange mechanism and method of operation thereof
    29.
    发明授权
    Data storage system with information exchange mechanism and method of operation thereof 有权

    公开(公告)号：US10826989B2

    公开(公告)日：2020-11-03

    申请号：US14512624

    申请日：2014-10-13

    Applicant: SMART Modular Technologies, Inc.

    Inventor： Fong-Long Lin ,  Michael Rubino

    IPC: H04L29/08

    Abstract: A data storage system, and a method of operation thereof, includes: a host initialization module for initializing a data storage unit; a command process module, coupled to the host initialization module, for processing a read command or a write command performed on the data storage unit; and a status scheduler module, coupled to the command process module, for generating a check status request to inquire a storage unit status of the data storage unit, wherein the check status request occurs without interrupting a host.

    Centralized backup power module
    30.
    发明授权
    Centralized backup power module 有权

    公开(公告)号：US10551892B1

    公开(公告)日：2020-02-04

    申请号：US15709257

    申请日：2017-09-19

    Applicant: SMART Modular Technologies, Inc.

    Inventor： Jinying Shen

    IPC: G06F1/26 ,  G06F1/3287

    Abstract: Approaches, techniques, and mechanisms are disclosed for a centralized backup power support system that improves testability of non-volatile dual in-line memory modules (NVDIMM) on Automatic Test Equipment (ATE) testers and in-system tests. An NVDIMM includes both volatile memories and non-volatile memories. According to an embodiment, a compact backup power distribution board is powered with an external power supply with an individual protection circuit. The backup power distribution board has an unlimited energy capacity for any density of NVDIMM and zero charge waiting time. According to an embodiment, instead of using an electric double-layer capacitor (EDLC) to support backup power, a resistor is used instead of an EDLC on each backup power module. There is no charging time when the backup power module does not have EDLC cells, resulting in significant reduction in test time and production cost and increase in production output.

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