Abstract:
A semiconductor device includes a substrate, a first recessed conductive layer embedded and recessed into a first surface of the substrate, and a first raised conductive layer disposed above the first surface. A first vertical offset exists between an upper surface of the first recessed conductive layer and an upper surface of the first raised conductive layer. The device includes a second recessed conductive layer embedded and recessed into a second surface of the substrate. The second surface of the substrate is opposite the first surface. The device includes a second raised conductive layer disposed beneath the second surface and an interconnect structure disposed on the first recessed and raised conductive layers and the second recessed and raised conductive layers. A second vertical offset exists between a lower surface of the second recessed conductive layer and a lower surface of the second recessed conductive layer.
Abstract:
The semiconductor module includes a plurality of memory die on a first side of a substrate and a plurality of buffer die on a second side of the substrate. Each of the memory die is disposed opposite and electrically coupled to one of the buffer die.
Abstract:
A semiconductor module includes a plurality of rectangular shaped semiconductor devices which are arranged in two rows such that each pair of adjacent semiconductor devices is in orientations differed by 90 degrees from each other. A plurality of wirings connect the semiconductor devices included in one of the two rows to the semiconductor devices included in the other row such that the semiconductor devices arranged in the same orientations are connected to each other.
Abstract:
In an electromagnetic bandgap structure including a plurality of conductive plates and a stitching via part, in which the plurality of conductive plates are placed on a first planar surface, the stitching via part includes a first via having one end part connected to one of the two conductive plates, a second via having one end part connected to the other of the two conductive plates, a spiral connector forming a spirally-shaped serial link structure on at least one vertical planar surface that is perpendicular to the first planar surface, a first conductive pattern connecting one end part of the spiral connector and the other end part of the first via with each other and a second conductive connecting pattern connecting the other end part of the spiral connector and the other end part of the second via with each other.
Abstract:
A resistor layout structure and a manufacture method thereof are provided. The resistor layout structure includes a substrate, a plurality of metals, and a plurality of resistor lumps. The plurality of metals is disposed on the substrate. The plurality of first resistor lumps is disposed on the substrate. The metals are used as a supporting structure during the disposing process. Besides, the metals are interlaced and connected in series connected with the resistor lumps to form the resistor. Therefore, the present invention decreases the resistance variability of the resistor.
Abstract:
The hybridization method provides a first component with first pads and a second component with second pads for accommodating protrusions of a fusible material, so that the first pads and second pads line up two by two in order to form pairs of pads to interconnect the two components when aligned. Then placing the first and second components one on top of the other to form an assembly where some of the protrusions of fusible material on the first and/or second pads respectively consist of at least three larger-sized protrusions, especially taller protrusions, so that before the temperature is increased to the hybridization temperature of the fusible material, the component only rests on the larger protrusions.
Abstract:
According to one embodiment, an electronic apparatus includes a housing, a circuit board accommodated in the hosing and including a first surface and a second surface located on an opposite side to the first surface, a flexible printed wiring board having an elasticity, electrically connected to the circuit board and provided from the first surface of the circuit board over to the second surface, and a pressing portion formed from a part of the flexible printed wiring board as it is bent, and pressing the flexible printed wiring board towards the first surface as it is brought into contact with the inner surface of the housing, which opposes the first surface of the circuit board.
Abstract:
A power line arrangement includes a first power line and a second power line which crosses the first power line at least once. The first and second power lines are connected to a same power supply, and current in the first power line flows in a different direction from current in the second power line at an area where the first and second power lines cross.
Abstract:
A display device includes a display panel on which an image is displayed, and a driving board. The driving board includes a substrate, a first multi-layer ceramic condenser disposed on the substrate and to which a first current is supplied, and a second multi-layer ceramic condenser disposed substantially parallel with the first multi-layer ceramic condenser and to which a second current is supplied. The first current and the second current are supplied to the first multi-layer ceramic condenser and the second multi-layer ceramic condenser, respectively, in opposite directions.
Abstract:
According to one embodiment, an electronic apparatus includes a housing, a circuit board accommodated in the hosing and including a first surface and a second surface located on an opposite side to the first surface, a flexible printed wiring board having an elasticity, electrically connected to the circuit board and provided from the first surface of the circuit board over to the second surface, and a pressing portion formed from a part of the flexible printed wiring board as it is bent, and pressing the flexible printed wiring board towards the first surface as it is brought into contact with the inner surface of the housing, which opposes the first surface of the circuit board.