公开(公告)号：US06753483B2

公开(公告)日：2004-06-22

申请号：US09879385

申请日：2001-06-12

Applicant: Daizo Andoh ,  Fumio Echigo ,  Tadashi Nakamura ,  Yasuhiro Nakatani ,  Yoji Ueda ,  Tousaku Nishiyama ,  Shozo Ochi

Inventor： Daizo Andoh ,  Fumio Echigo ,  Tadashi Nakamura ,  Yasuhiro Nakatani ,  Yoji Ueda ,  Tousaku Nishiyama ,  Shozo Ochi

IPC: H01R1204

CPC classification number: H05K3/4069 ,  H05K1/0366 ,  H05K1/0373 ,  H05K3/4614 ,  H05K3/462 ,  H05K3/4652 ,  H05K2201/0266 ,  H05K2201/0355 ,  H05K2201/10378 ,  H05K2203/0191 ,  H05K2203/1461 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T428/24917

Abstract: The present invention provides a printed circuit board, which includes a dielectric substrate having via holes formed in the thickness direction, and a conductor including a conductive filler is filled in the via holes. The dielectric substrate has patterned wiring layers on both surfaces, and the wiring layers are connected electrically with each other by the conductor. The dielectric substrate is made of a glass cloth or a glass nonwoven fabric impregnated with a thermosetting epoxy resin mixed with fine particles, and the conductive filler in the conductor has an average particle diameter larger than that of the fine particles. Accordingly, the printed circuit board has an improved moisture resistance as a whole and also excellent connection reliability and repair resistance. In addition, the dielectric substrate of the printed circuit board has an improved mechanical strength such as flexural rigidity. The present invention also provides a method of manufacturing such a printed circuit board.

Abstract translation: 本发明提供了一种印刷电路板，其包括具有沿厚度方向形成的通孔的电介质基板，并且包含导电填料的导体填充在通孔中。 电介质基板在两表面上具有图案化的布线层，并且布线层通过导体彼此电连接。 电介质基板由玻璃布或浸渍有与微粒混合的热固性环氧树脂的玻璃无纺布制成，并且导体中的导电填料的平均粒径大于微粒的平均粒径。 因此，印刷电路板整体上具有改善的耐湿性，并且还具有优异的连接可靠性和修复电阻。 此外，印刷电路板的电介质基板具有改善的机械强度，例如弯曲刚度。 本发明还提供一种制造这种印刷电路板的方法。

公开(公告)号：US20030200836A1

公开(公告)日：2003-10-30

申请号：US10407422

申请日：2003-04-07

Applicant: SHOWA DENKO K.K.

Inventor： Hitoshi Amita ,  Takashi Shoji ,  Shunsuke Nagasaki ,  Yoshinori Shibuya ,  Isamu Taguchi ,  Noriko Murase

IPC: C22C029/00

CPC classification number: H05K3/3484 ,  B23K35/0244 ,  B23K35/025 ,  B23K35/262 ,  B23K35/3613 ,  B23K35/3615 ,  B23K35/3616 ,  B23K35/3618 ,  H05K2201/0266

Abstract: A solder powder comprises solder particles having a distribution such that the number of particles having a particle diameter of 20 nullm or less is 30% or less, wherein the oxygen content is 500 ppm or less. A flux for solder paste comprises an organic acid component consisting of an organic acid ester and an ester decomposer catalyst, an organic halogen compound, a reducing agent and a resin component. A solder paste mainly comprises a flux and a solder powder, wherein the water content of the solder paste is 0.5% by weight or less.

Abstract translation: 焊料粉末包含具有使粒径为20μm以下的粒子的数量为30％以下的分布的焊料粒子，其中氧含量为500ppm以下。 用于焊膏的焊剂包括由有机酸酯和酯分解催化剂，有机卤素化合物，还原剂和树脂组分组成的有机酸组分。 焊膏主要包含焊剂和焊料粉末，其中焊膏的含水量为0.5重量％以下。

公开(公告)号：US20030157761A1

公开(公告)日：2003-08-21

申请号：US10373773

申请日：2003-02-27

Applicant: FUJITSU LIMITED

Inventor： Seiki Sakuyama

IPC: H01L021/8238

CPC classification number: H05K3/3484 ,  H01L21/4853 ,  H01L21/6835 ,  H01L23/49883 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11003 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/141 ,  H01L2224/16145 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01056 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1532 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/0266 ,  H05K2201/10477 ,  H05K2201/10674 ,  H05K2201/10734 ,  H05K2203/043 ,  H05K2203/0568 ,  H05K2203/0574 ,  H05K2203/0577 ,  H05K2203/0769

Abstract: The present invention relates to a method for forming bumps on a substrate provided with electrode pads. The method includes providing a mask having openings corresponding to the electrode pads, filling each of the openings with a solder paste, and heat treating the solder paste, wherein the solder paste includes solder powder. Preferably, the solder powder contains no more than 10 wt % of particles whose diameter is greater than the thickness of the mask and no more than 1.5 times this thickness. Preferably, the solder powder contains no more than 10 wt % of particles whose diameter is not less than 40% the diameter of the opening portions, or no less than 30 wt % of particles whose diameter is 40 to 100% the thickness of the mask.

公开(公告)号：US20010008310A1

公开(公告)日：2001-07-19

申请号：US09746336

申请日：2001-03-15

Applicant: FUJITSU LIMITED

Inventor： Seiki Sakuyama ,  Yasuo Yamagishi ,  Masataka Mizukoshi

IPC: H01L021/44 ,  H01L021/48 ,  H01L021/50 ,  H01L023/48 ,  H01L023/52 ,  H01L029/40

CPC classification number: H05K3/3484 ,  H01L21/4853 ,  H01L21/6835 ,  H01L23/49883 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11003 ,  H01L2224/11472 ,  H01L2224/11474 ,  H01L2224/13099 ,  H01L2224/141 ,  H01L2224/16145 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01056 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1532 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/0266 ,  H05K2201/10477 ,  H05K2201/10674 ,  H05K2201/10734 ,  H05K2203/043 ,  H05K2203/0568 ,  H05K2203/0574 ,  H05K2203/0577 ,  H05K2203/0769

Abstract: The present invention relates to a bump formation method, comprising the steps of providing a mask, in which a plurality of openings have been formed corresponding to a plurality of electrode pads, to a substrate provided with this plurality of electrode pads, filling the openings with a solder paste, and heat treating the solder paste. The solder paste contains a solder powder. This solder powder is one that contains no more than 10 wt % particles whose diameter is greater than the thickness of the mask and no more than 1.5 times this thickness. Preferably, this solder powder is one that contains no more than 10 wt % particles whose diameter is greater than 40% of the diameter of the openings, or one that contains no more than 30 wt % particles whose diameter is 40 to 100% the thickness of the mask.

Abstract translation: 凸点形成方法技术领域本发明涉及一种凸块形成方法，包括以下步骤：将具有多个电极焊盘的多个开口形成的掩模提供给设置有该多个电极焊盘的基板， 焊膏，并对焊膏进行热处理。 焊膏含有焊料粉末。 该焊料粉末是含有不超过10重量％的直径大于掩模厚度且不大于该厚度的1.5倍的颗粒。 优选地，该焊料粉末是含有不超过10重量％的直径大于开口直径的40％的颗粒，或者包含不超过30重量％的直径为40至100重量％的颗粒的焊料粉末 的面具。

公开(公告)号：US5502889A

公开(公告)日：1996-04-02

申请号：US1811

申请日：1993-01-08

Applicant: Keith L. Casson ,  Carol Myers ,  Kenneth B. Gilleo ,  Deanna Suilmann ,  Edward Mahagnoul ,  Marion Tibesar

Inventor： Keith L. Casson ,  Carol Myers ,  Kenneth B. Gilleo ,  Deanna Suilmann ,  Edward Mahagnoul ,  Marion Tibesar

IPC: H05K3/28 ,  H05K3/32 ,  H05K3/36 ,  H05K3/46

CPC classification number: H05K3/462 ,  H05K3/323 ,  H05K3/368 ,  H01L2224/293 ,  H01L2924/01019 ,  H01L2924/01322 ,  H01L2924/07811 ,  H01L2924/09701 ,  H05K2201/0233 ,  H05K2201/0266 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/10666 ,  H05K2203/0425 ,  H05K2203/061 ,  H05K2203/1572 ,  H05K3/28 ,  H05K3/321 ,  H05K3/4623 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T29/49149 ,  Y10T428/24917 ,  Y10T428/2857 ,  Y10T428/287

Abstract: A multilayer circuit board having three or more conductive layers, with at least two conductive layers electrically and mechanically connected by an interconnecting adhesive layer, is disclosed. The interconnecting adhesive layer comprises a conductive adhesive material having a plurality of deformable, heat fusible metallic particles dispersed substantially throughout a non-conductive adhesive. The fabricated multilayer circuit boards have interconnections which are reliable, heat resistant, and capable of withstanding thermal cycling and typical circuit board finishing and assembly processes.

Abstract translation: 公开了一种具有三个或更多个导电层的多层电路板，其中至少两个导电层通过互连粘合剂层电连接和机械连接。 互连粘合剂层包括导电粘合剂材料，其具有基本上分散在非导电粘合剂上分散的多个可变形的热熔金属颗粒。 制造的多层电路板具有可靠，耐热和能够承受热循环和典型的电路板精加工和组装过程的互连。

公开(公告)号：US20240365468A1

公开(公告)日：2024-10-31

申请号：US18643279

申请日：2024-04-23

Applicant: IBIDEN CO., LTD.

Inventor： Masashi KUWABARA ,  Susumu KAGOHASHI ,  Jun SAKAI ,  Kyohei YOSHIKAWA

IPC: H05K1/11 ,  H05K1/03

CPC classification number: H05K1/115 ,  H05K1/0306 ,  H05K1/113 ,  H05K2201/0209 ,  H05K2201/0242 ,  H05K2201/0266 ,  H05K2201/09536 ,  H05K2201/09827

Abstract: A wiring substrate includes a first build-up part including an insulating layer and a conductor layer, and a second build-up part laminated on the first build-up part and including an insulating layer and a conductor layer. The minimum width and minimum inter-wiring distance of wirings in the first build-up part are smaller than the minimum width and minimum inter-wiring distance of wirings in the second build-up part. The insulating layer in the first build-up part includes resin and inorganic particles including first inorganic particles partially embedded in the resin and second inorganic particles completely embedded in the resin such that the first inorganic particles have first portions protruding from the resin and second portions embedded in the resin, respectively. The insulating layer of the first build-up part has a surface covered by the conductor layer and including a surface of the resin and exposed surfaces of the first portions.

公开(公告)号：US09999137B2

公开(公告)日：2018-06-12

申请号：US14931356

申请日：2015-11-03

Applicant: Intrinsiq Materials, Inc.

Inventor： David Ciufo ,  Janet Heyen

IPC: H01K3/10 ,  H05K3/40 ,  H05K3/00 ,  H05K3/42 ,  H05K1/03 ,  H05K1/09 ,  H05K3/12 ,  H05K3/22 ,  H05K3/26 ,  H05K3/46

CPC classification number: H05K3/4069 ,  H05K1/0306 ,  H05K1/032 ,  H05K1/097 ,  H05K3/0047 ,  H05K3/1233 ,  H05K3/227 ,  H05K3/26 ,  H05K3/429 ,  H05K3/4617 ,  H05K2201/0266 ,  H05K2201/0347 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2203/0139 ,  H05K2203/085 ,  H05K2203/086 ,  H05K2203/107 ,  H05K2203/1131 ,  H05K2203/143 ,  H05K2203/1438 ,  Y10T29/49165

Abstract: A method for filling a via on a printed circuit board formulates a paste as a dispersion of copper particulate that includes nanocopper particles in a solvent and a binder and depositing the paste into a via cavity formed in the printed circuit board. Heating the paste-filled cavity removes most of the solvent. The method sinters the deposited paste in the via cavity, planarizes the sintered via, and overplates the filled via with copper.

公开(公告)号：US09796018B2

公开(公告)日：2017-10-24

申请号：US14650348

申请日：2013-10-02

Applicant: SUMITOMO METAL MINING CO., LTD.

Inventor： Toshiaki Terao ,  Yuji Kawakami

IPC: B22F1/00 ,  C22C5/06 ,  C09D17/00 ,  H01B1/02 ,  H01B1/22 ,  H05K1/09

CPC classification number: B22F1/0011 ,  B23K35/0244 ,  B23K35/025 ,  B23K35/3006 ,  C09D17/006 ,  C22C5/06 ,  H01B1/02 ,  H01B1/22 ,  H05K1/092 ,  H05K2201/0266

Abstract: Provided is a silver powder which has an appropriate viscosity range at the time of paste production, can be easily kneaded, and prevents the occurrence of flakes. The silver powder to be used has a specific surface area ratio SAB/SAS of 0.5 to 0.9, wherein SAB is a specific surface area measured by the BET method, and SAS is a specific surface area calculated from a mean primary-particle diameter DS measured with a scanning electron microscope. Furthermore, the silver powder preferably has a degree of aggregation of 1.5 to 5.0, the degree being obtained in such a manner that a volume median diameter D50 measured by laser diffraction scattering is divided by the foregoing Ds.

公开(公告)号：US20160150642A1

公开(公告)日：2016-05-26

申请号：US14779232

申请日：2014-03-26

Applicant: KYOCERA CORPORATION

Inventor： Satoshi KAJITA ,  Mitsuhiro HAGIHARA ,  Yuuhei MATSUMOTO

IPC: H05K1/03 ,  H05K1/02 ,  H05K1/11 ,  H05K1/18 ,  H05K1/09

CPC classification number: H05K1/0306 ,  H05K1/0298 ,  H05K1/036 ,  H05K1/09 ,  H05K1/115 ,  H05K1/181 ,  H05K3/0038 ,  H05K3/421 ,  H05K3/4602 ,  H05K3/4655 ,  H05K2201/0116 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/0266 ,  H05K2201/09845 ,  H05K2201/09854 ,  H05K2201/09863 ,  H05K2201/2072

Abstract: A wiring board includes: an inorganic insulating layer having a via hole formed so as to penetrate the inorganic insulating layer in a thickness direction thereof; a conductive layer disposed on the inorganic insulating layer; and a via conductor which adheres to an inner wall of the via hole and is connected with the conductive layer. The inorganic insulating layer includes a first section including a plurality of inorganic insulating particles partly connected to each other, and a resin portion located in gaps between the inorganic insulating particles, and a second section which is interposed between the first section and the via conductor, including a plurality of inorganic insulating particles partly connected to each other, and a conducting portion composed of part of the via conductor which is located in gaps between the inorganic insulating particles.

Abstract translation: 布线板包括：无机绝缘层，其具有形成为在其厚度方向上穿透无机绝缘层的通孔; 设置在无机绝缘层上的导电层; 以及通孔导体，其粘附到通孔的内壁并与导电层连接。 无机绝缘层包括：第一部分，其包括彼此部分连接的多个无机绝缘颗粒，以及位于无机绝缘颗粒之间的间隙中的树脂部分和介于第一部分和通孔导体之间的第二部分， 包括彼此部分连接的多个无机绝缘颗粒和由位于无机绝缘颗粒之间的间隙中的通孔导体的一部分组成的导电部分。

公开(公告)号：US09293384B2

公开(公告)日：2016-03-22

申请号：US13522218

申请日：2011-01-13

Applicant: Yuusaku Ishimine ,  Masayuki Moriyama ,  Kenji Komatsubara

Inventor： Yuusaku Ishimine ,  Masayuki Moriyama ,  Kenji Komatsubara

IPC: H01L23/15 ,  H05K7/20 ,  H05K1/00 ,  B32B33/00 ,  H01L23/13 ,  H01L35/32 ,  C04B35/587 ,  C04B37/02 ,  H05K1/03 ,  H05K3/38

CPC classification number: H01L23/13 ,  C04B35/587 ,  C04B37/026 ,  C04B2235/3206 ,  C04B2235/3217 ,  C04B2235/3224 ,  C04B2235/3878 ,  C04B2235/3882 ,  C04B2235/5276 ,  C04B2235/5436 ,  C04B2235/5445 ,  C04B2235/604 ,  C04B2235/6581 ,  C04B2235/6582 ,  C04B2235/6587 ,  C04B2235/721 ,  C04B2235/723 ,  C04B2235/77 ,  C04B2235/786 ,  C04B2235/80 ,  C04B2235/945 ,  C04B2235/9607 ,  C04B2237/125 ,  C04B2237/368 ,  C04B2237/407 ,  C04B2237/74 ,  H01L23/15 ,  H01L23/3731 ,  H01L23/3735 ,  H01L35/32 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K3/38 ,  H05K2201/0248 ,  H05K2201/0266 ,  H05K2201/0269 ,  Y10T428/24413 ,  Y10T428/24421 ,  Y10T428/25 ,  Y10T428/259 ,  H01L2924/00

Abstract: A silicon nitride substrate comprises a substrate comprising a silicon nitride sintered body, and a plurality of granular bodies containing silicon and integrated to a principal surface of the substrate, wherein a plurality of needle crystals or column crystals comprising mainly silicon nitride are extended from a portion of the granular bodies. A brazing material is applied to a principal surface of the substrate, and a circuit member and a heat radiation member are arranged on the applied brazing material, and bonded by heating. Because of a plurality of granular bodies integrated to the principal surface of the substrate, and a plurality of the needle crystals or the column crystals extended from a portion of the granular bodies, a high anchor effect is produced so that the circuit member and the heat radiation member are firmly bonded to the silicon nitride substrate.

Abstract translation: 氮化硅衬底包括含有氮化硅烧结体的衬底和多个含有硅的颗粒体并且与衬底的主表面集成在一起，其中主要包含氮化硅的多个针状晶体或柱状晶体从一部分 的颗粒体。 将钎焊材料施加到基板的主表面，并且将电路构件和散热构件布置在所施加的钎焊材料上，并通过加热粘合。 由于集成到基板的主面的多个粒状体以及从一部分粒状体延伸的多个针状晶体或柱状晶体，产生高的锚定效应，使得电路部件和热量 辐射构件牢固地结合到氮化硅衬底上。