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    Signal layer interconnects
    32.
    发明授权
    Signal layer interconnects 有权
    信号层互连

    公开(公告)号：US07348494B1

    公开(公告)日：2008-03-25

    申请号：US09821722

    申请日：2001-03-29

    Applicant: Martin R. Handforth ,  Herman Kwong ,  Richard R. Goulette

    Inventor： Martin R. Handforth ,  Herman Kwong ,  Richard R. Goulette

    IPC: H05K1/16

    CPC classification number: H05K3/368 ,  H01R12/52 ,  H01R12/61 ,  H05K1/0218 ,  H05K1/117 ,  H05K3/365 ,  H05K2201/0367 ,  H05K2201/0373 ,  H05K2201/0715 ,  H05K2201/0919 ,  H05K2201/10598

    Abstract: Inner layer traces on a multilayer printed wiring board are exposed to enable direct interconnection with another device such as a printed wiring board. The traces may be exposed by removing at least some of the dielectric substrate material around the traces, or by extending the traces beyond the other layers of the printed wiring board. Corresponding conductors associated with the other device are placed in direct physical contact with the exposed inner layer traces, and may be aligned and secured with guide plates, alignment pins and spring members. Such direct connection mitigates the need for vias, and has more favorable electrical characteristics for high frequency signal transmission.

    Abstract translation: 暴露多层印刷线路板上的内层迹线，以便能够与诸如印刷电路板的其它器件直接互连。 可以通过去除迹线周围的至少一些电介质基板材料，或者通过将迹线延伸超过印刷线路板的其它层来暴露迹线。 与另一装置相关联的相应的导体被放置成与暴露的内层迹线直接物理接触，并且可以与引导板，对准销和弹簧构件对准和固定。 这种直接连接减轻了对通孔的需要，并且对于高频信号传输具有更有利的电特性。

    Fusion bonded assembly with attached leads
    33.
    发明授权
    Fusion bonded assembly with attached leads 失效
    熔接组装与附接导线

    公开(公告)号：US07297875B2

    公开(公告)日：2007-11-20

    申请号：US10833711

    申请日：2004-04-27

    Applicant: Philip J. Lauriello

    Inventor： Philip J. Lauriello

    IPC: H05K1/03

    CPC classification number: H05K3/4092 ,  H05K3/328 ,  H05K3/4611 ,  H05K2201/0129 ,  H05K2201/015 ,  H05K2201/09145 ,  H05K2201/0919 ,  H05K2201/09754 ,  H05K2201/1034 ,  Y10T29/49126

    Abstract: A signal processing module can be manufactured from a plurality of composite substrate layers, each substrate layer includes elements of multiple individual processing modules. Surfaces of the layers are selectively metalicized to form signal processing elements when the substrate layers are fusion bonded in a stacked arrangement. Prior to bonding, the substrate layers are milled to form gaps located at regions between the processing modules. Prior to bonding, the leads are positioned such that they extend from signal coupling points on said metalicized surfaces into the gap regions. The substrate layers are then fusion bonded to each other such that the plurality of substrate layers form signal processing modules with leads that extend from an interior of the modules into the gap areas. The individual modules may then be separated by milling the substrate layers to de-panel the modules.

    Abstract translation: 信号处理模块可以由多个复合衬底层制造，每个衬底层包括多个单独的处理模块的元件。 当衬底层以堆叠布置融合时，这些层的表面被选择性地金属化以形成信号处理元件。 在接合之前，将衬底层研磨以形成位于处理模块之间的区域的间隙。 在接合之前，引线定位成使得它们从所述金属化表面上的信号耦合点延伸到间隙区域中。 然后将衬底层彼此熔合，使得多个衬底层形成具有从模块内部延伸到间隙区域中的引线的信号处理模块。 然后可以通过研磨衬底层来分离各个模块以使模块脱模。

    Shielded electronic circuit unit and method of manufacturing the same
    37.
    发明申请
    Shielded electronic circuit unit and method of manufacturing the same 有权
    屏蔽电子电路单元及其制造方法

    公开(公告)号：US20060266547A1

    公开(公告)日：2006-11-30

    申请号：US11408541

    申请日：2006-04-20

    Applicant: Issei Koga

    Inventor： Issei Koga

    IPC: H05K7/06

    CPC classification number: H05K1/0218 ,  H01L21/561 ,  H01L23/29 ,  H01L23/3121 ,  H01L23/552 ,  H01L24/97 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/1515 ,  H01L2924/15313 ,  H01L2924/19105 ,  H01L2924/3025 ,  H05K1/0306 ,  H05K3/0052 ,  H05K3/284 ,  H05K3/403 ,  H05K3/4611 ,  H05K3/4629 ,  H05K2201/0919 ,  Y10T29/49146 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T29/49789

    Abstract: A metallic film and a grounding pattern are surely connected to each other so as to achieve electrical shield of an electronic circuit unit. In an electronic circuit unit, the metallic film is provided on a top surface of a sealing resin portion for burying an electronic component, the side surfaces of the sealing resin portion that are opposite to each other, and the side surfaces of the multi-layered substrate that are opposite to each other. The metallic film is connected to the grounding patterns that are provided on the top surface of the multi-layered substrate or between the laminated layers of the multi-layered substrate. Therefore, it is possible to achieve a superior electrical shielding effect through the metallic film, as compared with the related art. Since the metallic film is formed on the side surfaces of the sealing resin and the side surfaces of the multi-layered substrate, when the metallic film is formed by a plating method, the blind hole may not be provided in the related art. Therefore, it is possible to achieve the superior circulation of the plating liquid, which results in sure connection between the sure connection between the grounding pattern and the metallic film.

    Abstract translation: 金属膜和接地图可靠地连接在一起，以实现电子电路单元的电气屏蔽。 在电子电路单元中，金属膜设置在密封树脂部分的顶表面上，用于掩埋电子部件，密封树脂部分的彼此相对的侧表面和多层的侧表面 基板彼此相对。 金属膜连接到设置在多层基板的顶表面上或多层基板的层叠层之间的接地图案。 因此，与现有技术相比，可以通过金属膜实现优异的电屏蔽效果。 由于金属膜形成在密封树脂的侧表面和多层基板的侧表面上，所以当通过电镀方法形成金属膜时，在现有技术中可能不提供盲孔。 因此，可以实现电镀液的良好的循环，这导致接地图案和金属膜之间的确定连接之间的确定的连接。

    EDGE CONNECTOR INCLUDING INTERNAL LAYER CONTACT, PRINTED CIRCUIT BOARD AND ELECTRONIC MODULE INCORPORATING SAME
    38.
    发明申请
    EDGE CONNECTOR INCLUDING INTERNAL LAYER CONTACT, PRINTED CIRCUIT BOARD AND ELECTRONIC MODULE INCORPORATING SAME 有权
    边缘连接器，包括内层接触器，印刷电路板和与之同步的电子模块

    公开(公告)号：US20060189175A1

    公开(公告)日：2006-08-24

    申请号：US11064344

    申请日：2005-02-22

    Applicant: Thomas Kinsley

    Inventor： Thomas Kinsley

    IPC: H01R12/00

    CPC classification number: H05K1/117 ,  H01R12/58 ,  H01R12/7076 ,  H01R12/721 ,  H01R2201/06 ,  H05K1/0298 ,  H05K3/403 ,  H05K2201/0919 ,  H05K2201/09845 ,  H05K2203/1572

    Abstract: An edge connector, system, printed circuit board and electronic module are described, which include an edge connector comprised of a substrate, including a first major exterior surface, a second major exterior surface, and a minor exterior surface. The edge connector further includes at least one of a first conductive contact affixed to the first major exterior surface and one of a second conductive contact affixed to the second major exterior surface. Additionally, the edge connector includes at least one third conductive contact conductively coupled to at least a portion of any internal conductive layer of the substrate and the third conductive contact is configured off-plane from the minor exterior surface.

    Abstract translation: 描述了边缘连接器，系统，印刷电路板和电子模块，其包括由包括第一主外表面，第二主外表面和次外表面的基板组成的边缘连接器。 边缘连接器还包括固定到第一主外表面的第一导电触头和固定到第二主外表面的第二导电触头中的至少一个。 另外，边缘连接器包括导电地耦合到衬底的任何内部导电层的至少一部分的至少一个第三导电接触件，并且第三导电接触件被构造成离开次要外表面。

    Board mounted heat sink using edge plating
    40.
    发明申请
    Board mounted heat sink using edge plating 审中-公开
    板式散热器采用边缘电镀

    公开(公告)号：US20060002092A1

    公开(公告)日：2006-01-05

    申请号：US10884727

    申请日：2004-07-02

    Applicant: David Stevens

    Inventor： David Stevens

    IPC: H05K7/20

    CPC classification number: H05K1/0209 ,  H05K3/403 ,  H05K2201/066 ,  H05K2201/0919

    Abstract: The present invention provides a PWB having a heat sink connected to the internal circuits of the PWB that allows for heat dissipation from those internal circuits. In one aspect, the PWB includes at least two insulating layers that are coupled together and that have a conductive layer located therebetween. A conductive interconnect is located on an edge of or through the PWB and is thermally coupled to the conductive layer and a heat sink. The conductive layer forms a thermal conductive path from the conductive layer to the heat sink and thereby allows for heat to be dissipated from within an internal portion of the PWB.

    Abstract translation: 本发明提供了一种PWB，其具有连接到PWB的内部电路的散热器，其允许从那些内部电路散热。 在一个方面，PWB包括耦合在一起并且其间具有导电层的至少两个绝缘层。 导电互连位于PWB的边缘或通过PWB的边缘并且热耦合到导电层和散热器。 导电层形成从导电层到散热片的导热路径，从而允许从PWB的内部部分散热。

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