公开(公告)号：US20160095211A1

公开(公告)日：2016-03-31

申请号：US14868434

申请日：2015-09-29

Applicant: Oclaro Japan, Inc.

Inventor： Fumitoshi GOTO

IPC: H05K1/02 ,  H04B10/40 ,  H05K1/11

CPC classification number: H04B10/40 ,  G02B6/4279 ,  H05K1/0251 ,  H05K1/0274 ,  H05K1/115 ,  H05K3/363 ,  H05K2201/09445 ,  H05K2201/09618 ,  H05K2201/09727

Abstract: An optical module includes: a first circuit board including a first signal terminal part and a first ground terminal part formed on a front surface; and a second circuit board including a second signal terminal part and a second ground terminal part formed on a back surface. The first circuit board further includes: a first dielectric layer; a first signal wire formed on a front surface of the first dielectric layer; a first ground conductor layer formed on a back surface of the first dielectric layer; and a first through ground conductor passing through the first dielectric layer. The first ground terminal part is formed, in a first region and a second region respectively located on both sides of the first signal terminal part in a first direction, and in a third region prescribed at a location beyond the first signal terminal part in a second direction.

Abstract translation: 光学模块包括：第一电路板，包括形成在前表面上的第一信号端子部分和第一接地端子部分; 以及包括形成在背面上的第二信号端子部分和第二接地端子部分的第二电路板。 第一电路板还包括：第一电介质层; 形成在所述第一电介质层的前表面上的第一信号线; 形成在所述第一电介质层的背面上的第一接地导体层; 以及穿过第一介电层的第一通孔接地导体。 第一接地端子部分在第一区域和第二区域中形成，第一区域和第二区域分别位于第一方向上的第一信号端子部分的两侧，并且在第二区域中形成在第二区域中，第二区域在第二区域中被设置在超出第一信号端子部分的位置 方向。

公开(公告)号：US09218084B2

公开(公告)日：2015-12-22

申请号：US14072813

申请日：2013-11-06

Applicant: WINTEK CORPORATION

Inventor： Yueh-Fang Wang

IPC: G06F3/041 ,  H05K3/36 ,  H01R12/65 ,  H05K1/11 ,  H05K3/32

CPC classification number: G06F3/0412 ,  H01R12/65 ,  H05K1/118 ,  H05K3/323 ,  H05K3/361 ,  H05K2201/09445

Abstract: A touch-sensing device includes a substrate, a touch-sensing structure, a signal transmitting layer, a first connecting pin assembly and a second connecting pin assembly. The touch-sensing structure is disposed on the substrate. The signal transmitting layer is disposed on the substrate and electrically connected to the touch-sensing structure. The first connecting pin assembly is disposed on the substrate in a position different from the touch-sensing structure. The first connecting pin assembly has a plurality first connecting pins electrically connected to the signal transmitting layer. The second connecting pin assembly is disposed on the substrate in a position different from the touch-sensing structure. The second connecting pin assembly has a plurality second connecting pins electrically connected to the signal transmitting layer. The first axis of the second connecting pin assembly and the second axis of the first connecting pin assembly are not arranged in the same axis.

Abstract translation: 触摸感测装置包括基板，触摸感测结构，信号传输层，第一连接销组件和第二连接销组件。 触摸感测结构设置在基板上。 信号传输层设置在基板上并电连接到触摸感测结构。 第一连接销组件设置在与触摸感测结构不同的位置的基板上。 第一连接销组件具有电连接到信号传输层的多个第一连接引脚。 第二连接销组件设置在与触摸感测结构不同的位置的基板上。 第二连接销组件具有电连接到信号传输层的多个第二连接引脚。 第二连接销组件的第一轴线和第一连接销组件的第二轴线不排列在相同的轴线上。

公开(公告)号：US20150138742A1

公开(公告)日：2015-05-21

申请号：US14539545

申请日：2014-11-12

Applicant: Finisar Corporation

Inventor： Henry Nguyen ,  Yuxin Zhou ,  Tay Gek-Teng

IPC: H05K1/11 ,  H05K1/18 ,  H05K3/34

CPC classification number: H05K1/113 ,  H01L2924/0002 ,  H05K1/0269 ,  H05K1/111 ,  H05K3/363 ,  H05K3/4007 ,  H05K3/4038 ,  H05K2201/0373 ,  H05K2201/09381 ,  H05K2201/09445 ,  H05K2201/09845 ,  H05K2203/0465 ,  Y02P70/611 ,  H01L2924/00

Abstract: A method of soldering can include: providing a first electronic component having a first buttoned soldering pad including a first soldering pad and one or more first button heads protruding from a first surface of the soldering pad; providing a second electronic component having a soldering pad; and soldering the first buttoned soldering pad to the soldering pad. The method includes introducing solder to spaces around the one or more first buttons of the first buttoned soldering pad. The method includes introducing a first solder to spaces around the one or more first buttons of the first buttoned soldering pad; introducing a second solder to spaces around one or more second buttons of a second buttoned soldering pad of the first electronic component; and forming spaces between the first and second solder that electronically insulate the first solder from the second solder.

Abstract translation: 焊接方法可以包括：提供第一电子部件，其具有包括第一焊接焊盘和从焊盘的第一表面突出的一个或多个第一按钮头的第一按扣焊盘; 提供具有焊盘的第二电子部件; 并将第一个带扣的焊盘焊接到焊盘。 该方法包括将焊料引入第一纽扣焊盘的一个或多个第一按钮周围的空间。 该方法包括：将第一焊料引入第一按扣焊盘的一个或多个第一按钮周围的空间; 将第二焊料引入到第一电子部件的第二按扣焊盘的一个或多个第二按钮周围的空间; 以及在所述第一和第二焊料之间形成用于使所述第一焊料与所述第二焊料电绝缘的空间。

公开(公告)号：US20150124352A1

公开(公告)日：2015-05-07

申请号：US14071430

申请日：2013-11-04

Applicant: HGST Netherlands B.V.

Inventor： Edgar Dennis Rothenberg ,  Yiduo Zhang

IPC: H05K1/11 ,  H01R12/59 ,  G11B5/60 ,  H05K1/02

CPC classification number: G11B33/122 ,  G11B5/4846 ,  H01R12/592 ,  H05K1/118 ,  H05K2201/09445 ,  H05K2201/099

Abstract: A flexible printed circuit (FPC) may have reduced-tolerance electrical connection pads that comprise a connection portion and an adjacent window portion, where the position of a component that is mechanically and electrically connected to the FPC is limited by the geometry of the connection portion of the respective connection pads. The window portion includes an area void of conductive material and bounded by the connection portion on one side and may be bounded by peripheral portions on the other sides, where the peripheral portions are significantly narrower than the connection portion. A portion of the peripheral portions extending from the connection portion may be tucked under a portion of the FPC cover layer to prevent peeling of the peripheral portions.

Abstract translation: 柔性印刷电路（FPC）可以具有包含连接部分和相邻窗口部分的减小公差的电连接焊盘，其中机械地和电连接到FPC的部件的位置被连接部分的几何形状所限制 的各个连接焊盘。 窗口部分包括导电材料区域，并且由一侧上的连接部分限定，并且可以由另一侧的周边部分限定，其中周边部分比连接部分明显窄。 从连接部分延伸的周边部分的一部分可以卷在FPC覆盖层的一部分下面，以防止周边部分的剥离。

公开(公告)号：US20150029636A1

公开(公告)日：2015-01-29

申请号：US14339470

申请日：2014-07-24

Applicant: WINTEK CORPORATION

Inventor： Jung-Sung Lin ,  Hsua-Yun Lee ,  Pin-Hao Chi ,  Chih-Yuan Lin ,  Ming-Chuan Lin

IPC: H05K1/02 ,  H01R12/71 ,  H05F3/02 ,  H05F3/00

CPC classification number: H05K1/0259 ,  H01R12/7005 ,  H01R12/714 ,  H01R12/775 ,  H01R13/6485 ,  H05F3/00 ,  H05F3/02 ,  H05K1/111 ,  H05K1/113 ,  H05K2201/09354 ,  H05K2201/09409 ,  H05K2201/09445 ,  H05K2201/097

Abstract: A connection structure of an electronic device includes a circuit board, a plurality of conductive contact pads and a conductive pattern. The conductive contact pads and the conductive pattern are disposed on the circuit board. The conductive contact pads are electrically insulated from one another. The conductive pattern is electrically insulated from the conductive contact pads. The conductive pattern is disposed on at least three sides of the conductive contact pads so as to generate an electrostatic discharge protection effect for the conductive contact pads.

Abstract translation: 电子设备的连接结构包括电路板，多个导电接触焊盘和导电图案。 导电接触焊盘和导电图案设置在电路板上。 导电接触垫彼此电绝缘。 导电图案与导电接触垫电绝缘。 导电图案设置在导电接触焊盘的至少三个侧面上，以便为导电接触焊盘产生静电放电保护效果。

公开(公告)号：US08251707B2

公开(公告)日：2012-08-28

申请号：US13123036

申请日：2009-10-07

Applicant: Augusto P. Panella ,  Elliot A. Baines ,  Jeng-De Lin

Inventor： Augusto P. Panella ,  Elliot A. Baines ,  Jeng-De Lin

IPC: H01R29/00

CPC classification number: H01R13/6658 ,  H01R12/67 ,  H01R24/64 ,  H01R25/006 ,  H01R2201/04 ,  H04L41/12 ,  H04Q1/136 ,  H05K1/118 ,  H05K1/144 ,  H05K1/147 ,  H05K3/326 ,  H05K2201/0311 ,  H05K2201/042 ,  H05K2201/09063 ,  H05K2201/09072 ,  H05K2201/091 ,  H05K2201/09445 ,  H05K2201/10189

Abstract: A structure for use with data network management systems uses a plurality of cables interconnecting patch panels, network devices and end-user devices and further utilizes integrated circuits to monitor the status of these end-user devices. The structure includes respective primary (36) and secondary (45) circuit boards. A plurality of connective jacks (31) are mounted on the primary circuit board and these jacks are interconnected to switches and other patch panels within the network. Wires from the jacks extend to and connect with end-user devices and a secondary circuit board is spaced apart from the primary circuit board so as to define a hollow nest (42) within the patch panel assembly that houses and protects integrated circuits (45, 52) and the like.

Abstract translation: 用于数据网络管理系统的结构使用互连接线板，网络设备和最终用户设备的多条电缆，并且还利用集成电路来监视这些终端用户设备的状态。 该结构包括相应的初级（36）和次级（45）电路板。 多个连接插座（31）安装在主电路板上，并且这些插孔与网络内的交换机和其他接线板互连。 插座的电线延伸到终端用户设备并与其连接，并且次级电路板与主电路板间隔开，以便在接线板组件内限定一个中空的座（42），该中空座（42）容纳和保护集成电路 52）等。

公开(公告)号：US20110278724A1

公开(公告)日：2011-11-17

申请号：US13105775

申请日：2011-05-11

Applicant: Chao-Yen LIN ,  Yi-Hang Lin

Inventor： Chao-Yen LIN ,  Yi-Hang Lin

IPC: H01L23/498 ,  H01L21/50

CPC classification number: H01L24/05 ,  G06K9/0004 ,  H01L21/561 ,  H01L21/6835 ,  H01L23/3121 ,  H01L23/525 ,  H01L24/08 ,  H01L24/13 ,  H01L24/48 ,  H01L29/06 ,  H01L29/0657 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/02371 ,  H01L2224/02375 ,  H01L2224/02379 ,  H01L2224/02381 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05548 ,  H01L2224/05558 ,  H01L2224/06165 ,  H01L2224/06167 ,  H01L2224/0801 ,  H01L2224/16105 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/24226 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/10156 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15788 ,  H01L2924/3701 ,  H05K1/181 ,  H05K2201/09418 ,  H05K2201/09445 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/03

Abstract: An embodiment of the invention provides a chip package which includes: a carrier substrate; a semiconductor substrate having an upper surface and a lower surface, disposed overlying the carrier substrate; a device region or sensing region located on the upper surface of the semiconductor substrate; a conducting pad located on the upper surface of the semiconductor substrate; a conducting layer electrically connected to the conducting pad and extending from the upper surface of the semiconductor substrate to a sidewall of the semiconductor substrate; and an insulating layer located between the conducting layer and the semiconductor substrate.

Abstract translation: 本发明的实施例提供了一种芯片封装，其包括：载体基板; 具有上表面和下表面的半导体衬底，设置在载体衬底上; 位于所述半导体衬底的上表面上的器件区域或感测区域; 导电焊盘，位于所述半导体衬底的上表面上; 导电层，电连接到导电焊盘并从半导体衬底的上表面延伸到半导体衬底的侧壁; 以及位于导电层和半导体衬底之间的绝缘层。

公开(公告)号：US20110195598A1

公开(公告)日：2011-08-11

申请号：US13123029

申请日：2009-10-07

Applicant: Augusto P. Panella ,  Elliot C. Baines ,  Jeng-De Lin

Inventor： Augusto P. Panella ,  Elliot C. Baines ,  Jeng-De Lin

IPC: H01R13/66 ,  H01R3/00

CPC classification number: H04Q1/136 ,  H01R4/2433 ,  H01R13/2421 ,  H01R13/4538 ,  H01R13/465 ,  H01R13/6473 ,  H01R13/6616 ,  H01R13/6625 ,  H01R24/64 ,  H01R2201/04 ,  H04L41/12 ,  H05K1/118 ,  H05K1/144 ,  H05K1/147 ,  H05K3/326 ,  H05K2201/0311 ,  H05K2201/042 ,  H05K2201/09063 ,  H05K2201/09072 ,  H05K2201/091 ,  H05K2201/09445 ,  H05K2201/10189

Abstract: A termination unit (144) for use with a system that permits the monitoring of a computer network to perform network inventories. The termination unit takes the form of a cap that engages the termination face of a network jack and has a sensing circuit (246) integrated therewith so that, once engaged with the jack, the sensing circuit is connected to two terminals of the jack. The sensing circuit may include a resistor, capacitor or inductor, any of which provide a known sensing value that is different than a sensed value of an end-user device used on the network, but less than infinity so that the system senses when an end-user device is connected to or disconnected from the network.

Abstract translation: 一种与允许监视计算机网络执行网络清单的系统一起使用的终端单元（144）。 终端单元采用与网络插座的端接面接合的帽的形式，并且具有与其一体化的感测电路（246），使得一旦与插座接合，感测电路连接到插座的两个端子。 感测电路可以包括电阻器，电容器或电感器，其中任一个提供与网络上使用的终端用户设备的感测值不同但已经小于无穷远的已知感测值，使得系统感测何时结束 用户设备连接到网络或与网络断开连接。

公开(公告)号：USRE42429E1

公开(公告)日：2011-06-07

申请号：US12790393

申请日：2010-05-28

Applicant: Belgacem Haba

Inventor： Belgacem Haba

IPC: H02H9/00

CPC classification number: H01L23/647 ,  H01L23/36 ,  H01L23/367 ,  H01L23/4985 ,  H01L23/5387 ,  H01L23/552 ,  H01L24/86 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06527 ,  H01L2225/06551 ,  H01L2225/06579 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2924/12032 ,  H01L2924/14 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0246 ,  H05K1/189 ,  H05K3/0061 ,  H05K2201/056 ,  H05K2201/09445 ,  H05K2201/10022 ,  H05K2201/1056 ,  H05K2201/10674 ,  H01L2924/00

Abstract: A semiconductor module is provided which includes a beat heat spreader, at least two semiconductors thermally coupled to the heat spreader, and a plurality of electrically conductive leads electrically connected to the semiconductors. At least one of the electrically conductive leads is common to both of the semiconductors. The semiconductor module also includes a termination resistor electrically coupled to at least one of the semiconductors. A method of making a semiconductor module is also taught, whereby a plurality of electrically conductive leads are provided. At least two semiconductors are electrically coupled to the plurality of electrically conductive leads, where at least one of the electrically conductive leads is common to both of the semiconductors. The semiconductors are then thermally coupled to a heat spreader. Subsequently, a termination resistor is electrically coupled to at least one of the semiconductors.

Abstract translation: 提供一种半导体模块，其包括节拍散热器，与散热器热耦合的至少两个半导体以及电连接到半导体的多个导电引线。 至少一个导电引线对于这两个半导体是共同的。 半导体模块还包括电耦合到至少一个半导体的终端电阻器。 还教导了制造半导体模块的方法，由此提供多个导电引线。 至少两个半导体电耦合到多个导电引线，其中至少一个导电引线对于两个半导体都是共同的。 然后将半导体热耦合到散热器。 随后，终端电阻器电耦合到至少一个半导体。

公开(公告)号：US07787254B2

公开(公告)日：2010-08-31

申请号：US11715205

申请日：2007-03-07

Applicant: James E. Clayton ,  Zakaryae Fathi

Inventor： James E. Clayton ,  Zakaryae Fathi

IPC: H05K1/00

CPC classification number: H05K1/189 ,  H01L23/473 ,  H01L23/5387 ,  H01L2225/06589 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K3/0061 ,  H05K3/0064 ,  H05K2201/056 ,  H05K2201/064 ,  H05K2201/09445 ,  H05K2201/2018 ,  H01L2924/00

Abstract: A multichip module comprises: a first rigid member defining one outer wall of a chamber; a second rigid member defining the opposite wall of the chamber; a sealable interface joining the first and second rigid members at their peripheries, whereby a hollow chamber is formed; a flex circuit having a plurality of integrated circuit chips disposed thereon, the flex circuit affixed to at least one of the first and second rigid members; electrical contacts at least partially extending outward through the sealable interface; and, a fluid inlet and a fluid outlet configured to permit fluid to flow through the chamber whereby heat generated by the integrated circuit chips may be removed from the module.

Abstract translation: 多芯片模块包括：限定室的一个外壁的第一刚性构件; 限定所述腔室的相对壁的第二刚性构件; 可密封的界面，在其周边处连接第一和第二刚性构件，由此形成中空室; 具有设置在其上的多个集成电路芯片的柔性电路，所述柔性电路固定到所述第一和第二刚性构件中的至少一个; 至少部分地通过可密封界面向外延伸的电触点; 以及流体入口和流体出口，其构造成允许流体流过所述室，由此可以从模块移除由集成电路芯片产生的热量。