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    Semiconductor device, and image forming apparatus and image reading apparatus using the same
    43.
    发明授权
    Semiconductor device, and image forming apparatus and image reading apparatus using the same 有权
    半导体装置，以及使用其的图像形成装置和图像读取装置

    公开(公告)号：US09338890B2

    公开(公告)日：2016-05-10

    申请号：US14724286

    申请日：2015-05-28

    Applicant: Oki Data Corporation

    Inventor： Takahito Suzuki ,  Eisuke Kuroki

    IPC: H05K1/18

    CPC classification number: H05K1/181 ,  B41J2/447 ,  H05K2201/09827 ,  H05K2201/10106 ,  H05K2201/10522 ,  H05K2201/2036 ,  Y02P70/611

    Abstract: A semiconductor device includes: a printed wiring board; plural semiconductor array elements mounted on the printed wiring board in a row with an adhesive, each of the semiconductor array elements including plural semiconductor elements arranged in a row, the semiconductor array elements including a first semiconductor array element and a second semiconductor array element adjacent to the first semiconductor array element, the first semiconductor array element having a first facing surface, the second semiconductor array element having a second facing surface facing the first facing surface; a first contact prevention member that is made of organic material and disposed to project from the first facing surface; and a second contact prevention member that is made of organic material and disposed to project from the second facing surface. The first and second contact prevention members are disposed to abut each other or face each other with a gap therebetween.

    Abstract translation: 半导体器件包括：印刷线路板; 多个半导体阵列元件，其安装在具有粘合剂的一排的印刷线路板上，每个半导体阵列元件包括排列成一行的多个半导体元件，所述半导体阵列元件包括与第一半导体阵列元件相邻的第一半导体阵列元件和第二半导体阵列元件 所述第一半导体阵列元件，所述第一半导体阵列元件具有第一面对表面，所述第二半导体阵列元件具有面对所述第一相对表面的第二面对表面; 第一接触防止构件，其由有机材料制成并且设置成从所述第一面向表面突出; 以及第二防止接触部件，其由有机材料制成并且设置成从所述第二相对表面突出。 第一和第二接触防止构件被设置成彼此邻接或彼此面对地间隔开。

    PRINTED WIRING BOARD AND SEMICONDUCTOR PACKAGE
    44.
    发明申请
    PRINTED WIRING BOARD AND SEMICONDUCTOR PACKAGE 审中-公开
    印刷线路板和半导体封装

    公开(公告)号：US20160088727A1

    公开(公告)日：2016-03-24

    申请号：US14857074

    申请日：2015-09-17

    Applicant: IBIDEN CO., LTD.

    Inventor： Toshiki FURUTANI ,  Yuki Yoshikawa

    IPC: H05K1/02 ,  H05K1/11 ,  H05K1/18

    CPC classification number: H05K3/4673 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H05K1/0271 ,  H05K3/3436 ,  H05K2201/096 ,  H05K2201/09827 ,  H01L2924/00014

    Abstract: A printed wiring board includes a core laminate body including insulating layers, conductor layers including first and second conductor layers, and via conductors having smaller end surfaces connected to the first conductor layer, a first build-up layer formed on the core body and including an interlayer, a conductor layer on the interlayer, and via conductors having smaller end surfaces connected to the first conductor layer, and a second build-up layer formed on the core body and including an interlayer and a conductor layer on the interlayer. The first conductor layer is embedded such that the first conductor layer has exposed surface on the surface of the core body, the second conductor layer is formed on the other surface of the core body, and the first conductor layer has wiring pattern having the smallest minimum width of wiring patterns of the conductor layers in the core body and build-up layers.

    Abstract translation: 一种印刷电路板，包括具有绝缘层的芯层压体，包括第一和第二导体层的导体层，以及连接到第一导体层的具有较小端面的通孔导体，形成在芯体上的第一堆积层， 中间层，中间层上的导体层和连接到第一导体层的较小端面的通孔导体，以及形成在芯体上并在中间层上包括中间层和导体层的第二堆积层。 第一导体层被嵌入，使得第一导体层在芯体的表面上具有暴露表面，第二导体层形成在芯体的另一个表面上，并且第一导体层具有最小的布线图案 芯体和堆积层中的导体层的布线图形的宽度。

    WIRING BOARD WITH BUILT-IN ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURING THE SAME
    45.
    发明申请
    WIRING BOARD WITH BUILT-IN ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURING THE SAME 审中-公开
    具有内置电子元件的接线板及其制造方法

    公开(公告)号：US20160073515A1

    公开(公告)日：2016-03-10

    申请号：US14847396

    申请日：2015-09-08

    Applicant: IBIDEN CO., LTD.

    Inventor： Keisuke SHIMIZU ,  Makoto TERUI ,  Ryojiro TOMINAGA ,  Tsutomu YAMAUCHI

    IPC: H05K3/32 ,  H05K3/46 ,  H05K3/40 ,  H05K3/00 ,  H05K1/18 ,  H05K1/11

    CPC classification number: H05K1/185 ,  H05K1/115 ,  H05K3/421 ,  H05K3/4652 ,  H05K3/4697 ,  H05K2201/09827

    Abstract: A wiring board with a built-in electronic component includes a substrate having a cavity, an electronic component accommodated in the cavity and having electrode terminals, an insulating layer formed on the substrate such that the insulating layer is covering the electronic component in the cavity, and via conductors formed through the insulating layer and including first via conductors and second via conductors such that the second via conductors are connected to the electrode terminals of the electronic component, respectively. The via conductors are formed in via formation holes penetrating through the insulating layer, respectively, and the via formation holes include first via formation holes and second via formation holes such that the second via formation holes are exposing the electrode terminals of the electronic component, respectively, and that a second via formation hole has a diameter which is smaller than a diameter of a first via formation hole.

    Abstract translation: 具有内置电子部件的布线基板包括具有空腔的基板，容纳在所述空腔中的电子部件，具有电极端子，形成在所述基板上的绝缘层，使得所述绝缘层覆盖所述空腔内的电子部件， 以及通过绝缘层形成的通孔导体，并且包括第一通孔导体和第二通路导体，使得第二通孔导体分别连接到电子部件的电极端子。 通孔导体分别形成在穿过绝缘层的通孔形成孔中，并且通孔形成孔分别包括第一通孔形成孔和第二通孔形成孔，使得第二通孔形成孔分别暴露电子部件的电极端子 并且第二通孔形成孔的直径小于第一通孔形成孔的直径。

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