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公开(公告)号:US12022270B2
公开(公告)日:2024-06-25
申请号:US17761669
申请日:2020-05-26
Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD.
Inventor: Jiale Su , Guoping Zhou , Xinwei Zhang , Changfeng Xia
CPC classification number: H04R31/003 , B81C1/00158 , H04R19/04 , B81C2201/0105 , B81C2201/0116 , B81C2201/0133 , H04R2201/003
Abstract: A preparation method for a micro-electromechanical systems (MEMS) microphone includes the steps of: providing a silicon substrate having a silicon surface; forming an enclosed cavity in the silicon substrate; forming a plurality of spaced apart acoustic holes in the silicon substrate, each acoustic hole having two openings, one of which communicating with the cavity and the other one located on the silicon surface; forming a sacrificial layer on the silicon substrate, which includes a first filling portion, a second filling portion and a shielding portion; forming a polysilicon layer on the shielding portion; forming a recess in the silicon substrate on the side away from the silicon surface; and removing the first filling portion, the second filling portion and part of the shielding portion so that the recess is brought into communication with the cavity to form a back chamber, and that the polysilicon layer, the remainder of the shielding portion and the silicon substrate together delimit a hollow chamber, the hollow chamber communicating with the opening of the plurality of acoustic holes away from the cavity, completing the MEMS microphone.
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公开(公告)号:US20240174512A1
公开(公告)日:2024-05-30
申请号:US17994471
申请日:2022-11-28
Applicant: TAIWAN MASK CORPORATION
Inventor: SHANG-KUANG WU , YU-TSUNG FU , MING-WEI HUANG
IPC: B81C1/00
CPC classification number: B81C1/00055 , B81C2201/0133 , B81C2201/0142 , B81C2201/0159
Abstract: A MEMS probe and manufacturing method thereof are provided. The method is mainly to form connected first-level, second-level, and third-level pin grooves on both sides of the silicon substrate through an etching process, followed by two electroplating processes to deposit nickel-cobalt-phosphorus alloy in the first-level pin groove to form the tip of the microprobe, and to deposit nickel-cobalt alloy in the second-level pin groove and the third-level pin to form the pin head and pin arm, thereby forming a three-level microprobe. A circuit substrate made of ceramic material is disposed with at least one window, the surface of the circuit substrate adjacent to the window is provided with a plurality of circuit pads, and the circuit substrate is abutted to the pin arm of the microprobe. The silicon substrate is then removed, to form a plurality of cantilever microprobes made of nickel-cobalt-phosphorus alloy and nickel-cobalt alloy on the circuit substrate.
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公开(公告)号:US11890643B2
公开(公告)日:2024-02-06
申请号:US16993274
申请日:2020-08-14
Inventor: You Qian , Joan Josep Giner de Haro , Rakesh Kumar , Jia Jie Xia
CPC classification number: B06B1/0666 , B81B3/0021 , B81C1/00158 , B81B2201/0271 , B81B2203/0127 , B81B2203/0315 , B81C2201/014 , B81C2201/0133
Abstract: A PMUT includes a substrate, a stopper, and a multi-layered structure, where the substrate includes a corner, and a cavity is disposed in the substrate. The stopper is in contact with the corner of the substrate and the cavity. The multi-layered structure is disposed over the cavity and attached to the stopper and the multi-layered structure includes at least one through hole in contact with the cavity.
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54.
公开(公告)号:US20240010489A1
公开(公告)日:2024-01-11
申请号:US18341565
申请日:2023-06-26
Applicant: STMICROELECTRONICS S.r.l.
Inventor: Manuel RIANI , Gabriele GATTERE , Federico VERCESI
CPC classification number: B81B3/0021 , B81C1/0015 , B81B2203/0118 , B81B2203/0307 , B81B2203/0315 , B81C2201/0109 , B81C2201/0133
Abstract: A MEMS device comprising: a semiconductor body defining a main cavity and forming an anchorage structure; and a first deformable structure having a first end and a second end that are opposite to one another along a first axis, the first deformable structure being fixed to the anchorage structure via the first end so as to be suspended over the main cavity. The second end is configured to oscillate, with respect to the anchorage structure, along a second axis. The first deformable structure comprises a main body having a first outer surface and a second outer surface, and a piezoelectric structure, which extends over the first outer surface. The main body comprises a bottom portion and a top portion that delimit along the second axis a first buried cavity aligned with the piezoelectric structure along the second axis, wherein a maximum thickness of the top portion of the main body along the second axis is smaller than a minimum thickness of the bottom portion of the main body along the second axis.
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公开(公告)号:US11845654B2
公开(公告)日:2023-12-19
申请号:US17352149
申请日:2021-06-18
Applicant: The University of British Columbia
Inventor: Edmond Cretu , Chang Ge
IPC: B81C1/00
CPC classification number: B81C1/00476 , B81C2201/0105 , B81C2201/0133 , B81C2201/0143 , B81C2201/0181
Abstract: According to at least one embodiment, a method of fabricating a micro electro-mechanical systems (MEMS) structure is disclosed. The method involves causing an etchant to remove a portion of a sacrificial layer of the MEMS structure, the sacrificial layer between a structural layer of the MEMS structure and a substrate of the MEMS structure. In this embodiment, causing the etchant to remove the portion of the sacrificial layer involves causing a target portion of the substrate to be released from the MEMS structure. According to another embodiment, another method of fabricating a MEMS structure is disclosed. The method involves causing an etchant including water to remove a portion of a sacrificial layer of the MEMS structure, the sacrificial layer between a structural layer of the MEMS structure and a substrate of the MEMS structure. In this embodiment, the sacrificial layer and the substrate are hydrophobic.
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公开(公告)号:US20230382714A1
公开(公告)日:2023-11-30
申请号:US18201710
申请日:2023-05-24
Applicant: DB HITEK CO., LTD.
Inventor: Min Hyun JUNG , Joo Hyeon LEE
CPC classification number: B81B3/0021 , B81C1/00158 , B81B2201/0257 , B81B2203/0127 , B81B2203/0307 , B81B2203/0315 , B81B2203/0338 , B81B2203/0353 , B81B2203/04 , B81C2201/0154 , B81C2201/014 , B81C2201/0133 , B81C2201/0166 , B81C2201/0164
Abstract: A MEMS microphone includes a substrate having a cavity, a diaphragm disposed above the cavity and having a ventilation path, and a back plate disposed above the diaphragm and having a plurality of air holes. The ventilation path includes a plurality of slits extending in a circumferential direction.
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公开(公告)号:US20230174372A1
公开(公告)日:2023-06-08
申请号:US17540750
申请日:2021-12-02
Applicant: Sangwoo Lee
Inventor: Sangwoo Lee
CPC classification number: B81C1/00111 , A61B5/293 , B81B1/008 , A61B2562/125 , A61N1/0529 , B81B2201/055 , B81B2203/04 , B81B2203/0361 , B81C2201/0133
Abstract: A method of manufacturing a plurality of neural probes from a silicon wafer in which after neural probes are formed on one side of a silicon wafer, the other side of the silicon wafter is subject to a dicing process that separates and adjusts the thickness of the neural probes.
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58.
公开(公告)号:US20230166965A1
公开(公告)日:2023-06-01
申请号:US17990902
申请日:2022-11-21
Inventor: Seok KIM , Jun Kyu PARK
IPC: B81C1/00
CPC classification number: B81C1/00158 , B81C2201/0133 , B81C2201/0194
Abstract: A method of liquid-mediated pattern transfer includes providing a substrate comprising (a) a semiconductor film adhered to the substrate and (b) a first patterned layer on the semiconductor film. The substrate is submerged in a delamination liquid, whereby the semiconductor film is delaminated from the substrate while the first patterned layer remains on the semiconductor film. A patterned semiconductor membrane ready for transfer is thus obtained. The patterned semiconductor membrane is transferred to a target substrate in a transfer liquid, and then the transfer liquid is removed (e.g., evaporated). The patterned semiconductor membrane adheres to the target substrate as the transfer liquid is removed.
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公开(公告)号:US20190239000A1
公开(公告)日:2019-08-01
申请号:US16256816
申请日:2019-01-24
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Giorgio ALLEGATO , Federico VERCESI , Laura Maria CASTOLDI , Laura OGGIONI , Matteo PERLETTI
CPC classification number: H04R19/04 , B81C1/00309 , B81C2201/0133 , H04R1/021 , H04R1/086 , H04R19/005 , H04R31/00 , H04R2201/003
Abstract: A method for manufacturing a semiconductor die, comprising the steps of: providing a MEMS device having a structural body, provided with a cavity, and a membrane structure suspended over the cavity; coupling the structural body to a filtering module via direct bonding or fusion bonding so that a first portion of the filtering module extends over the cavity and a second portion of the filtering module extends seamlessly as a prolongation of the structural body; and etching selective portions of the filtering module in an area corresponding to the first portion, to form filtering openings fluidically coupled to the cavity. The semiconductor die is, for example, a microphone.
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公开(公告)号:US10035701B2
公开(公告)日:2018-07-31
申请号:US15305799
申请日:2014-11-05
Applicant: ADVANCED SEMICONDUCTOR MANUFACTURING CO. LTD
Inventor: Yuanjun Xu , Yilin Yan , Weijia Xue
CPC classification number: B81B7/02 , B81B2201/0257 , B81B2203/0127 , B81B2203/0315 , B81C1/00158 , B81C1/00396 , B81C2201/0132 , B81C2201/0133 , B81C2201/019 , B81C2201/0198 , B81C2201/053
Abstract: There is provided a method for forming a composite cavity and a composite cavity formed using the method. The method comprises the following steps: providing a silicon substrate (101); forming an oxide layer on the front side thereof; patterning the oxide layer to form one or more grooves (103), the position of the groove (103) corresponding to the position of small cavity (109) to be formed; providing a bonding wafer (104), which is bonded to the patterned oxide layer to form one or more closed micro-cavity structures (105) between the silicon substrate (101) and the bonding wafer (104); forming a protective film (106) over the bonding wafer (104) and forming a masking layer (107) on the back side of the silicon substrate (101); patterning the masking layer (107), the pattern of the masking layer (107) corresponding to the position of a large cavity (108) to be formed; using the masking layer (107) as a mask, etching the silicon substrate (101) from the back side until the oxide layer at the front side thereof to form the large cavity (108) in the silicon substrate (101); and using the masking layer (107) and the oxide layer as a mask, etching the bonding wafer (104) from the back side through the silicon substrate (101) until the protective film (106) thereover to form one or more small cavities (109) in the bonding wafer (104). The uniformity of thickness of the semiconductor medium layer where the small cavity (109) in the composite cavity is located is well controlled by the present invention.
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