公开(公告)号：US20120168217A1

公开(公告)日：2012-07-05

申请号：US13197283

申请日：2011-08-03

Applicant: Chien-Min Hsu ,  Min-Lin Lee ,  Cheng-Liang Cheng ,  Li-Duan Tsai

Inventor： Chien-Min Hsu ,  Min-Lin Lee ,  Cheng-Liang Cheng ,  Li-Duan Tsai

IPC: H05K1/16

CPC classification number: H05K1/0231 ,  H01G9/012 ,  H01G9/15 ,  H01L23/49822 ,  H01L23/642 ,  H01L24/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2924/14 ,  H01L2924/19041 ,  H05K1/162 ,  H05K3/4608 ,  H05K2201/0187 ,  H05K2201/09309 ,  H05K2203/0315

Abstract: An embedded capacitor substrate module includes a substrate, a metal substrate and a solid electrolytic capacitor material. The solid electrolytic capacitor material is formed on the metal substrate, so as to form a solid electrolytic capacitor with the substrate. The embedded capacitor substrate module further includes an electrode lead-out region formed by extending the substrate and the metal substrate. The metal substrate serves as a first electrode, and the substrate serves as a second electrode. An insulating material is formed between the substrate and the metal substrate. Therefore, the embedded capacitor substrate module is not only advantageous in having a large capacitance as the conventional solid capacitor, but also capable of being drilled or plated and electrically connected to other circuits after being embedded in a printed circuit board.

Abstract translation: 嵌入式电容器基板模块包括基板，金属基板和固体电解电容器材料。 在金属基板上形成固体电解电容器材料，以便与基板形成固体电解电容器。 嵌入式电容器基板模块还包括通过使基板和金属基板延伸而形成的电极引出区域。 金属基板用作第一电极，并且基板用作第二电极。 在基板和金属基板之间形成绝缘材料。 因此，嵌入式电容器基板模块不仅有利于具有作为常规固体电容器的大电容，而且还可以在嵌入印刷电路板中之后被钻孔或电镀并电连接到其它电路。

公开(公告)号：US08213185B2

公开(公告)日：2012-07-03

申请号：US12746596

申请日：2009-09-09

Applicant: Akira Minegishi ,  Kazuhide Uriu ,  Toru Yamada

Inventor： Akira Minegishi ,  Kazuhide Uriu ,  Toru Yamada

IPC: H05K1/18 ,  H05K7/00

CPC classification number: H01L23/49827 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/48 ,  H01L2224/05553 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/0102 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10161 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/0248 ,  H05K1/162 ,  H05K3/242 ,  H05K2201/09309 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: In an interposer substrate, a plating stub conductor and a ground conductor form a capacitor, and a plating stub conductor and the ground conductor form a capacitor. Capacitances of the capacitors are adjusted so that a phase difference between signals transmitted by a differential transmission using a signal line including a connection wiring conductor and a signal line including a connection wiring conductor is equal to 180 degrees.

Abstract translation: 在内插基板中，电镀短截线导体和接地导体形成电容器，电镀短截线导体和接地导体形成电容器。 调整电容器的电容，使得使用包括连接布线导体的信号线和包括连接布线导体的信号线的差分传输发送的信号之间的相位差等于180度。

公开(公告)号：US20120147580A1

公开(公告)日：2012-06-14

申请号：US13398784

申请日：2012-02-16

Applicant: Seiji Hayashi

Inventor： Seiji Hayashi

IPC: H05K7/00

CPC classification number: H05K1/0231 ,  H01L2224/48091 ,  H01L2224/49171 ,  H01L2924/15311 ,  H01L2924/19105 ,  H05K1/0233 ,  H05K1/0234 ,  H05K1/0298 ,  H05K2201/09309 ,  H05K2201/09336 ,  H05K2201/09781 ,  H05K2201/10022 ,  H05K2201/1003 ,  H05K2201/10522 ,  H05K2201/10545 ,  H05K2201/10689 ,  H05K2201/10734 ,  H01L2924/00014

Abstract: A power source terminal and a ground terminal for a semiconductor integrated circuit are connected to a conductor pattern through a capacitor. The conductor pattern is connected, through a filter, to a plane conductor connected to neither a ground plane nor a power source plane. Thus, a common mode noise arising from between the power source and the ground is caused to flow into the plane conductor. This reduces the common mode noise flowing in the ground and the power source of the printed wiring board, which relatively act as antennas.

Abstract translation: 电源端子和半导体集成电路的接地端子通过电容器连接到导体图案。 导体图案通过滤波器连接到不与接地平面和电源平面连接的平面导体。 因此，引起从电源和地之间产生的共模噪声流入平面导体。 这降低了相对地充当天线的在地面和印刷电路板的电源中流动的共模噪声。

公开(公告)号：US08194416B2

公开(公告)日：2012-06-05

申请号：US11970051

申请日：2008-01-07

Applicant: Hark Byeong Park ,  Byong Su Seol ,  Hyung Geun Kim ,  Hyun Ho Park ,  Jong Sung Lee ,  Hyung Seok Lee ,  Young Jun Moon

Inventor： Hark Byeong Park ,  Byong Su Seol ,  Hyung Geun Kim ,  Hyun Ho Park ,  Jong Sung Lee ,  Hyung Seok Lee ,  Young Jun Moon

IPC: H05K9/00

CPC classification number: H05K1/0234 ,  H05K1/162 ,  H05K1/167 ,  H05K2201/09309 ,  H05K2201/09336

Abstract: Disclosed is a multilayer printed circuit board. The multilayer printed circuit board includes a power source surface to provide power to each component disposed on the power source surface, a ground surface having a reference voltage, a strip line which passes through the power source surface and/or the ground surface so as to transmit signals between components, an antenna installed in proximity to a sectional region of the power source surface and the ground surface, and an electromagnetic wave reduction member which is provided between the power source surface and the ground surface to effectively reduce an electromagnetic wave generated from the strip line.

Abstract translation: 公开了一种多层印刷电路板。 多层印刷电路板包括用于向设置在电源表面上的每个部件提供电力的电源表面，具有参考电压的接地表面，通过电源表面和/或接地表面的带状线，以便 在部件之间传输信号，安装在电源表面和地表面的截面区域附近的天线以及设置在电源表面和地表之间的电磁波减少部件，以有效地减少由电源表面和地面之间产生的电磁波 带状线。

公开(公告)号：US20120132461A1

公开(公告)日：2012-05-31

申请号：US12981477

申请日：2010-12-30

Applicant: TSUNG-SHENG HUANG

Inventor： TSUNG-SHENG HUANG

IPC: H05K1/16

CPC classification number: H05K1/0265 ,  H05K1/0201 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/0979

Abstract: A printed circuit board includes a top layer and a bottom layer. A power supply and an electronic component are located on the top layer. The power supply is connected to the top layer and the bottom layer through a first via. A number of second vias extend through the printed circuit board and are connected to the top layer and the bottom layer. The distance between each second via and the electronic component is the same.

Abstract translation: 印刷电路板包括顶层和底层。 电源和电子元件位于顶层。 电源通过第一通孔连接到顶层和底层。 多个第二通孔延伸穿过印刷电路板并连接到顶层和底层。 每个第二通孔和电子部件之间的距离是相同的。

公开(公告)号：US08179306B2

公开(公告)日：2012-05-15

申请号：US12595820

申请日：2008-03-31

Applicant: Hajime Sasaki ,  Kazuki Hayata

Inventor： Hajime Sasaki ,  Kazuki Hayata

IPC: G01S7/28

CPC classification number: H01Q13/02 ,  G01S7/032 ,  H01L23/12 ,  H01L23/66 ,  H01L24/48 ,  H01L24/73 ,  H01L2223/6616 ,  H01L2223/6633 ,  H01L2224/32225 ,  H01L2224/45014 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12033 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/19039 ,  H01P3/121 ,  H01Q25/00 ,  H05K1/0206 ,  H05K1/0207 ,  H05K1/0237 ,  H05K1/0298 ,  H05K2201/09309 ,  H05K2201/09618 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The invention relates to a high-frequency circuit board that can efficiently radiate heat generated in a mounted electronic component without reducing the degree of freedom in design, a high-frequency circuit module including the high-frequency circuit board, and a radar apparatus including the high-frequency circuit module. A dielectric substrate (3) includes a mounting portion (4) that is disposed on one surface (3a) of the dielectric substrate (3) and on which an electronic component (2) is to be mounted, and a waveguide (5) that is formed in the dielectric substrate (3). The mounting portion (4) and the waveguide (5) are connected with each other through a heat conductor (6) having a thermal conductivity higher than that of the dielectric substrate (3).

Abstract translation: 本发明涉及一种能够有效地辐射安装的电子部件中产生的热而不降低设计自由度的高频电路板，包括高频电路板的高频电路模块以及包括该高频电路板的雷达装置 高频电路模块。 电介质基板（3）包括安装部分（4），该安装部分设置在电介质基板（3）的一个表面（3a）上并且要安装电子部件（2），以及波导管（5） 形成在电介质基板（3）中。 安装部分（4）和波导（5）通过导热率高于电介质基片（3）导热系数的导热体（6）相互连接。

公开(公告)号：US08149585B2

公开(公告)日：2012-04-03

申请号：US11860132

申请日：2007-09-24

Applicant: Shuichi Kawano

Inventor： Shuichi Kawano

IPC: H05K1/16

CPC classification number: H05K1/162 ,  H01L23/147 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/50 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05023 ,  H01L2224/05027 ,  H01L2224/05155 ,  H01L2224/05169 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13025 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/157 ,  H05K1/0306 ,  H05K1/112 ,  H05K3/4608 ,  H05K2201/09309 ,  H05K2201/10674 ,  H01L2224/05599

Abstract: Means for Solution: This interposer (10) comprises the silicon substrate (12), a plurality of through-hole conductors (20) formed on the above-described silicon substrate, and a capacitor (15) formed with the upper electrodes (14) and the lower electrodes (18) formed by extending the land portions of the above-described through-hole conductors and the dielectric layer (16) formed between the both electrodes. The rewiring layers (23-1, 23-2) formed as desired are formed on the layers other than the above-described capacitor layer.

Abstract translation: 解决方案：该插入件（10）包括硅衬底（12），形成在上述硅衬底上的多个通孔导体（20）和形成有上电极（14）的电容器（15） 以及通过延伸上述通孔导体的接地部分和形成在两个电极之间的电介质层（16）而形成的下电极（18）。 根据需要形成的再布线层（23-1,23-2）形成在除了上述电容器层之外的层上。

公开(公告)号：US08143528B2

公开(公告)日：2012-03-27

申请号：US12277250

申请日：2008-11-24

Applicant: Hou-Yuan Chou

Inventor： Hou-Yuan Chou

IPC: H05K1/03

CPC classification number: H05K1/0268 ,  G01R31/2818 ,  H05K1/0237 ,  H05K1/11 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09663 ,  H05K2203/162 ,  Y10T29/49124 ,  Y10T29/49147

Abstract: A printed circuit board includes a signal layer, an insulation layer, and a reference layer. A transmission line is located on the signal layer. A probing pad is located on the transmission line. Two aligned slots defined in opposite sides of the reference layer leaving a connecting portion. The slots and the connecting portion are in vertical alignment with the probing pad. The signal layer, the insulation layer, and the reference layer are configured in a cascading order. An arrangement of the signal layer in relation to the reference layer including the slots and the connecting portion reduces a capacitance effect caused by the probing pad.

Abstract translation: 印刷电路板包括信号层，绝缘层和参考层。 传输线位于信号层上。 探测板位于传输线上。 限定在参考层的相对侧中的两个对准的槽留下连接部分。 槽和连接部分与探测板垂直对准。 信号层，绝缘层和参考层以级联顺序配置。 信号层相对于包括狭缝和连接部分的参考层的布置减小了由探测垫引起的电容效应。

公开(公告)号：US08115113B2

公开(公告)日：2012-02-14

申请号：US12216747

申请日：2008-07-10

Applicant: Hironori Tanaka

Inventor： Hironori Tanaka

IPC: H05K1/11 ,  H05K1/18

CPC classification number: H05K1/162 ,  H05K1/0269 ,  H05K1/112 ,  H05K3/205 ,  H05K3/4602 ,  H05K3/4644 ,  H05K2201/0179 ,  H05K2201/0347 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09518 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09718 ,  H05K2201/09763 ,  H05K2201/09918 ,  H05K2203/166

Abstract: A multilayer printed wiring board including a layered capacitor section provided on a first interlayer resin insulation layer and a high dielectric layer and first and second layered electrodes that sandwich the high dielectric layer. A second interlayer resin insulation layer is provided on the first insulation layer and the capacitor section, and a metal thin-film layer is provided over the capacitor section and on the second insulation layer. An outermost interlayer resin insulation layer is provided on the second insulation layer and the metal thin-film layer. A mounting section is provided on the outermost insulation layer and has first and second external terminals to mount a semiconductor element. Multiple via conductors penetrate each insulation layer. The via conductors include first via conductors that electrically connect the first layered electrode to the first external terminals. Second via conductors electrically connect the second layered electrode to the second external terminals.

Abstract translation: 一种多层印刷线路板，包括设置在第一层间树脂绝缘层和高电介质层上的层状电容器部分和夹着高电介质层的第一和第二层状电极。 在第一绝缘层和电容器部分上设置第二层间树脂绝缘层，并且在电容器部分和第二绝缘层上设置金属薄膜层。 在第二绝缘层和金属薄膜层上设置最外层的层间树脂绝缘层。 安装部分设置在最外层绝缘层上，并且具有安装半导体元件的第一和第二外部端子。 多个通孔导体穿过每个绝缘层。 通孔导体包括将第一层状电极电连接到第一外部端子的第一通孔导体。 第二通孔导体将第二层状电极电连接到第二外部端子。

公开(公告)号：US08110750B2

公开(公告)日：2012-02-07

申请号：US12488299

申请日：2009-06-19

Applicant: Yasushi Inagaki ,  Katsuyuki Sano

Inventor： Yasushi Inagaki ,  Katsuyuki Sano

IPC: H05K1/16

CPC classification number: H05K1/0237 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/5383 ,  H01L23/66 ,  H01L24/81 ,  H01L2223/6616 ,  H01L2223/6622 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/351 ,  H01L2924/3511 ,  H05K1/0224 ,  H05K1/0263 ,  H05K1/0265 ,  H05K1/111 ,  H05K1/115 ,  H05K1/144 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/0352 ,  H05K2201/09309 ,  H05K2201/09536 ,  H05K2201/09736 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A multilayer printed wiring board has a core substrate, an interlayer insulation layer formed over the core substrate, conductive layers formed over the core substrate, and a via hole for providing electrical connection between the conductive layers. The conductive layers include a conductive layer formed on the core substrate, and the conductive layer formed on the core substrate has a side face in a form of rounded taper tapering toward the core substrate.

Abstract translation: 多层印刷电路板具有芯基板，在芯基板上形成的层间绝缘层，形成在芯基板上的导电层，以及用于在导电层之间提供电连接的通孔。 导电层包括形成在芯基板上的导电层，并且形成在芯基板上的导电层具有朝向芯基板渐缩的圆锥形的侧面。