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    High-frequency signal line
    62.
    发明授权
    High-frequency signal line 有权
    高频信号线

    公开(公告)号：US09583809B2

    公开(公告)日：2017-02-28

    申请号：US14509285

    申请日：2014-10-08

    Applicant: Murata Manufacturing Co., Ltd.

    Inventor： Noboru Kato ,  Satoshi Ishino ,  Jun Sasaki

    IPC: H01P3/00 ,  H01P3/08 ,  H01P3/02 ,  H01P5/02 ,  H05K1/02

    CPC classification number: H01P3/003 ,  H01P3/026 ,  H01P3/08 ,  H01P3/082 ,  H01P3/085 ,  H01P5/028 ,  H05K1/0225 ,  H05K1/0251 ,  H05K2201/09245 ,  H05K2201/09336 ,  H05K2201/09636 ,  H05K2201/097

    Abstract: A high-frequency signal line includes a body with a first layer level and a second layer level; a signal line including a first line portion provided at the first layer level, a second line portion provided at the second layer level, and a first interlayer connection connecting the first line portion and the second line portion; a first ground conductor including a first ground portion provided at the first layer level; a second ground conductor including a second ground portion provided at the second layer level; and a second interlayer connection connecting the first ground portion and the second ground portion. A distance between the first interlayer connection and the second interlayer connection is not less than a maximum distance between the first line portion and the first ground portion and is not less than a maximum distance between the second line portion and the second ground portion.

    Abstract translation: 高频信号线包括具有第一层级和第二层级的主体; 信号线，包括设置在第一层级的第一线部分，设置在第二层级的第二线部分和连接第一线部分和第二线部分的第一层间连接; 第一接地导体，包括设置在第一层级的第一接地部分; 第二接地导体，包括设置在第二层级的第二接地部分; 以及连接所述第一接地部和所述第二接地部的第二层间连接。 第一层间连接和第二层间连接之间的距离不小于第一线部分和第一接地部分之间的最大距离，并且不小于第二线路部分和第二接地部分之间的最大距离。

    Electrical connector
    65.
    发明授权
    Electrical connector 有权
    电连接器

    公开(公告)号：US09444160B2

    公开(公告)日：2016-09-13

    申请号：US14451470

    申请日：2014-08-05

    Applicant: Hirose Electric Co., Ltd.

    Inventor： Nobuhiro Tamai

    IPC: H01R12/70 ,  H05K1/02

    CPC classification number: H01R12/7082 ,  H05K1/0219 ,  H05K1/0245 ,  H05K2201/09245 ,  H05K2201/09336

    Abstract: An electrical connector is to be connected to a mating connector. The electrical connector includes a circuit board member formed of an insulation plate member; and a holding member for holding the circuit board member. The circuit board member includes a connecting portion to be connected with a mating connector of the mating connector. The connecting portion includes a pair of conductive band portions and a first insulation region disposed between the conductive band portions.

    Abstract translation: 电连接器将连接到配对连接器。 电连接器包括由绝缘板构件形成的电路板构件; 以及用于保持电路板构件的保持构件。 电路板构件包括与配合连接器的配合连接器连接的连接部分。 连接部分包括一对导电带部分和设置在导电带部分之间的第一绝缘区域。

    Electrical cable assembly configured to be mounted onto an array of electrical contacts
    66.
    发明授权
    Electrical cable assembly configured to be mounted onto an array of electrical contacts 有权
    电缆组件被配置成安装在电触点阵列上

    公开(公告)号：US09437949B2

    公开(公告)日：2016-09-06

    申请号：US14498745

    申请日：2014-09-26

    Applicant: Tyco Electronics Corporation

    Inventor： Arash Behziz ,  Brian Patrick Costello ,  Michael David Herring

    IPC: H01R13/648 ,  H01R12/71 ,  H01R13/6588 ,  H01R13/6595 ,  H01R12/59 ,  H05K1/14

    CPC classification number: H01R12/716 ,  H01R12/594 ,  H01R12/62 ,  H01R13/6588 ,  H01R13/6594 ,  H01R13/6595 ,  H05K1/0219 ,  H05K1/111 ,  H05K1/117 ,  H05K1/141 ,  H05K2201/09336 ,  H05K2201/09709 ,  H05K2201/10356 ,  H05K2201/10371

    Abstract: Cable assembly including a carrier board having a terminating side and a mounting side that face in opposite directions. The terminating side includes a contact array of electrical contacts. The mounting side includes a mating array of electrical contacts. The contact array and the mating array are interconnected to each other through conductive pathways of the carrier board. The contact array along the terminating side overlaps with the mating array along the mounting side. The carrier board is configured to be mounted onto an electrical component having a two-dimensional array. The cable assembly also includes a plurality of cables having cable end portions that are coupled to the carrier board. The cable assembly includes a shield assembly that extends over the terminating side and covers the cable end portions and the contact array.

    Abstract translation: 电缆组件包括具有端接侧的承载板和面向相反方向的安装侧。 终端侧包括电触头的触点阵列。 安装侧包括电触头的配合阵列。 接触阵列和配合阵列通过载体板的导电路径彼此互连。 沿着端接侧的接触阵列沿着安装侧与配合阵列重叠。 承载板被配置为安装在具有二维阵列的电气部件上。 电缆组件还包括多个电缆，其具有耦合到承载板的电缆端部。 电缆组件包括屏蔽组件，其在终端侧延伸并且覆盖电缆端部部分和接触阵列。

    Print circuit board and electronic device using the same
    67.
    发明授权
    Print circuit board and electronic device using the same 有权
    印刷电路板和使用其的电子设备

    公开(公告)号：US09426881B2

    公开(公告)日：2016-08-23

    申请号：US12516983

    申请日：2008-06-27

    Applicant: Koji Ishikawa

    Inventor： Koji Ishikawa

    IPC: H05K1/02 ,  H04N5/225 ,  H05K1/18 ,  H05K3/46

    CPC classification number: H05K1/0218 ,  H04N5/2253 ,  H05K1/0219 ,  H05K1/0237 ,  H05K1/0298 ,  H05K1/189 ,  H05K3/4611 ,  H05K2201/0715 ,  H05K2201/09072 ,  H05K2201/09236 ,  H05K2201/09336 ,  H05K2201/10121 ,  H05K2201/10189

    Abstract: A print circuit board includes a first layer on which a land is formed, a second layer on which an analog signal pattern and a first ground pattern are wired, a third layer on which a digital signal pattern and a second ground pattern are wired, and a fourth layer on which a third ground pattern is wired. The digital signal pattern is vertically sandwiched between the first ground pattern and the third ground pattern. The analog signal pattern and digital signal pattern are arranged without overlapping each other on the projection plane. The analog signal pattern and second ground pattern are arranged so as to overlap each other.

    Abstract translation: 印刷电路板包括其上形成有焊盘的第一层，连接模拟信号图案和第一接地图案​​的第二层，数字信号图案和第二接地图案布线在其上的第三层;以及 其上布置有第三接地图案的第四层。 数字信号图案被垂直夹在第一接地图案​​和第三接地图案之间。 模拟信号图案和数字信号图案在投影平面上彼此不重叠地布置。 模拟信号图案和第二接地图案被布置成彼此重叠。

    BGA BALLOUT PARTITION TECHNIQUES FOR SIMPLIFIED LAYOUT IN MOTHERBOARD WITH MULTIPLE POWER SUPPLY RAIL
    69.
    发明申请
    BGA BALLOUT PARTITION TECHNIQUES FOR SIMPLIFIED LAYOUT IN MOTHERBOARD WITH MULTIPLE POWER SUPPLY RAIL 有权
    BGA BALLOUT分段技术，用于多台电源轨道车载板上的简化布局

    公开(公告)号：US20160093563A1

    公开(公告)日：2016-03-31

    申请号：US14497825

    申请日：2014-09-26

    Applicant: INVENSAS CORPORATION

    Inventor： Yong Chen ,  Zhuowen Sun ,  Kyong-Mo Bang

    IPC: H01L23/498 ,  H05K1/02

    CPC classification number: H01L23/49816 ,  H01L23/49822 ,  H01L23/50 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73257 ,  H01L2924/0002 ,  H01L2924/15192 ,  H01L2924/181 ,  H05K1/0262 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09336 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

    Abstract: A microelectronic package can include a substrate and a microelectronic element. The substrate can include terminals comprising at least first power terminals and other terminals in an area array at a surface of the substrate. The substrate can also include a power plane element electrically coupled to the first power terminals. The area array can have a peripheral edge and a continuous gap between the terminals extending inwardly from the peripheral edge in a direction parallel to the surface. The terminals on opposite sides of the gap can be spaced from one another by at least 1.5 times a minimum pitch of the terminals. The power plane element can extend within the gap from at least the peripheral edge at least to the first power terminals. Each first power terminal can be separated from the peripheral edge by two or more of the other terminals.

    Abstract translation: 微电子封装可以包括衬底和微电子元件。 衬底可以包括在衬底的表面处的区域阵列中至少包括第一电源端子和其他端子的端子。 基板还可以包括电耦合到第一电源端子的功率平面元件。 区域阵列可以具有周边边缘和在平行于表面的方向上从周边边缘向内延伸的端子之间的连续间隙。 间隙的相对侧上的端子可以彼此间隔开至少1.5倍的端子的最小间距。 功率平面元件可以在间隙内从至少外围边缘至少延伸到第一电源端子。 每个第一电源端子可以通过两个或更多其它端子与外围边缘分离。

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