Abstract:
A novel printed circuit laminate product and process are provided for use in connection with a printed circuit board. The laminate is composed of a polyimide support stratum, a copper electrical conductor stratum, and an intermediate adhesive stratum. In one form, the opposite faces of the laminate are separately etched to provide different circuit related features and the laminate as an entirety has through holes, which have particular cross sectional geometry and which are produced by particular process steps. In another form, the copper stratum is laminated to the adhesive face of the adhesive and support strata and is etched after through holes have been drilled in the adhesive and support strata. The geometry is such that the diameter of a through hole in a conducting portion of the conducting stratum is smaller than the diameter of the through hole in the adhesive and support strata, so as to provide a conducting rim or flange for ease and security of mechanical and electrical connection to an associated electrical lead wire or grommet incorporated in a circuit on the object substrate below. The final product of the present invention is a printed circuit structure comprising one or more laminates of the foregoing type, bonded to a rigid printed circuit board.
Abstract:
A unitary electronic circuit element has an interconnect surface at which it is provided with contact pads and is mounted on a circuit board using a flexible, sheet-form interconnect member that comprises dielectric material and runs of electrically conductive material. Each conductor run extends between a contact pad that is exposed at a first main face of the interconnect member and a termination point that is exposed at a second main face of the interconnect member. The interconnect surface of the electronic circuit element and the second main face of the interconnect member are placed in mutually confronting relationship, and the circuit element is attached to the second main face of the interconnect member by way of its interconnect surface, whereby electrically conductive contact is established between the contact pads of the circuit element and the corresponding termination points of the interconnect member. The circuit element is attached by way of its back face to a thermally conductive plate that has, at one main face, pressure pads that at least partially surround a circuit element receiving area of the plate. The first main face of the interconnect member and the main face of the circuit board are placed in mutually confronting relationship, with the contact pads of the interconnect member touching corresponding contact pads of the circuit board. The plate and the circuit board are clamped together, whereby the pressure pads supply contact force to maintain the contact pads of the interconnect member in electrically conductive pressure contact with the corresponding contact pads of the circuit board.
Abstract:
A plating layer of a Cu-M-based alloy (M represents Ni and/or Mn) is formed on an end surface of a connection terminal member at an exposed side, the Cu-M-based alloy being capable of generating an intermetallic compound with an Sn-based low-melting-point metal contained in a bonding material forming a bonding portion and having a lattice constant different from that of the intermetallic compound by 50% or more. In the reflow process, even if the bonding material is about to flow out by re-melting thereof, since the bonding material is brought into contact with the Cu-M-based plating layer, a high-melting-point alloy of the intermetallic compound is formed so as to block the interface between the connection terminal member and the resin layer.
Abstract:
A motherboard for an electronic device comprising a main printed circuit board (PCB) with a through-hole extending between the upper component surface and the lower surface. The motherboard includes a carrier PCB having a top surface and a bottom surface, and at least one component, e.g. an optical device, sensor, or the like, coupled to the top surface. The carrier PCB is mounted in an in an inverted orientation with respect to the main PCB such that the top surface of the carrier PCB faces the upper component surface of the main PCB. The carrier PCB is aligned with the main PCB such that the component is substantially aligned with the through hole of the main PCB and is visible from the lower surface of the PCB.
Abstract:
An embedded printed circuit board (PCB) includes: a copper foil laminate; an internal electronic component inserted into the copper foil laminate; a first circuit pattern formed on a surface of the internal electronic component; and a second circuit pattern formed on the copper foil laminate.
Abstract:
A method for manufacturing a multilayered printed circuit board including forming a first insulating resin substrate having a metal layer substantially corresponding to dimensions of a semiconductor device, forming a second insulating resin substrate, forming a recess extending to the metal layer of the first insulating resin substrate such that a surface of the metal layer is exposed, accommodating the semiconductor device in the recess such that the semiconductor device is mounted on the surface of the metal layer, and forming a resin insulating layer on the first insulating resin substrate such that the semiconductor device accommodated in the recess is covered.
Abstract:
An object of the present invention is to allow stress that may be applied to a semiconductor package to be suppressed, when the semiconductor package is mounted on a curved board. In a mount board 1, a semiconductor package 20 is mounted on a curved board 10 including a curved surface on at least a portion thereof. The curved board 10 includes a pedestal portion 13a disposed on a region of the curved surface portion where the semiconductor package 20 is mounted and having an upper surface thereof formed flat, and a plurality of pad portions 15a disposed on the flat surface of the pedestal portion 13a. The pedestal portion 13a is formed of an insulating material. The semiconductor package 20 is mounted on the pad portions 15a.
Abstract:
A semiconductor device assembly includes a substrate and a semiconductor die adjacent to a first surface of the substrate. The substrate also includes a second surface opposite from the first surface, an opening extending from the first surface and the second surface, contact pads on the second surface, and substrate pads on the second surface, adjacent to the opening. Bond pads of the semiconductor die are aligned with the opening through the substrate. Intermediate conductive elements, such as bond wires, extend from bond pads of the semiconductor die, through the opening, to substrate pads on the opposite, second surface of the substrate. An encapsulant, which fills the opening and covers the intermediate conductive elements, protrudes beyond a plane in which the second surface of the substrate is located. Discrete conductive elements, such as solder balls, may protrude from the contact pads of the substrate to connect the semiconductor device assembly to another component, such as a printed circuit board or another packaged semiconductor device.
Abstract:
An interconnect board for interconnecting and arranged between a first circuit board and a second circuit board, the interconnect board includes a first conductive plate including a first connection terminal, a first insulating member wrapping the first conductive plate except for the first connection terminal, a second conductive plate including a second connection terminal, a second insulating member wrapping the second conductive plate except for the second connection terminal, an insulating substrate arranged between the first insulating member and the second insulating member, and a conductive member penetrating the first insulating member, the second insulating member and the insulating substrate.