Abstract:
Disclosed herein is a method of manufacturing a printed circuit board, including; forming an electronic component including an electrode that is formed on at least one side of a body; forming terminals on an upper portion of the electrode and an upper portion of the body; providing a substrate in which a cavity is formed; mounting the electronic component formed with the terminals in the cavity of the substrate; and forming a buildup layer on an upper portion of the substrate and an upper portion of the electronic component.
Abstract:
A packaging substrate having a through-holed interposer embedded therein and a fabrication method of the packaging substrate are provided, where the packaging substrate includes: a molding layer having opposite first and second surfaces; a through-holed interposer embedded in the molding layer and flush with the second surface; a redistribution-layer structure embedded in the molding layer and disposed on the through-holed interposer and having a plurality of electrode pads exposed from the first surface of the molding layer; and a built-up structure disposed on the second surface of the molding layer and electrically connected to the through-holed interposer.
Abstract:
A multi-chip stack module provides increased circuit density for a given surface chip footprint. Support structures are alternated with standard surface mount type chips to form a stack wherein the support structures electrically interconnect the chips. One aspect is a structure and method for interconnecting a plurality of generally planar chips in a vertical stack such that signals, which are common to the chips, are connected in the stack and signals, which are accessed individually, are separated within the stack.
Abstract:
A packaging substrate includes: a substrate having a core layer, a cavity penetrating the core layer and circuit layers formed on surfaces of the core layer; a first capacitor disposed in the cavity; a bonding layer formed on the first capacitor in the cavity of the substrate; a second capacitor disposed on the bonding layer so as to be received in the cavity; and a dielectric layer formed on the substrate and in the cavity for covering the first and second capacitors. By stacking the first and second capacitors in the cavity through the bonding layer, the single core layer is embedded with two layers of the capacitors to thereby meet the multi-function requirement.
Abstract:
In one embodiment, the present invention includes a method of mounting a semiconductor device to a first side of a circuit board; and mounting at least one voltage regulator device to a second side of the circuit board, the second side opposite to the first side. The voltage regulator devices may be output filters, inductors, capacitors, and the like. In certain embodiments, the devices may be located directly underneath the semiconductor device.
Abstract:
An infrared sensor comprises a circuit board, at least two support portions, an FET element and a pyroelectric element. The circuit board has an upper principal surface formed with a plurality of electrodes. Each of the support portions has an upper surface, a lower surface, an upper conductive pattern formed on the upper surface and a lower conductive pattern formed on the lower surface. The upper conductive pattern is electrically connected with the lower conductive pattern. The lower conductive pattern is connected to the electrode of the upper principal surface of the circuit board. The FET element is located between the at least two support portions and arranged on the upper principal surface of the circuit board. The pyroelectric element is electrically connected with the upper conductive patterns of the support portions. The pyroelectric element is supported by the support portions so as to be located above the FET element.
Abstract:
A secondary battery capable of being formed to be relatively small by reducing the sizes of internal devices and compactly locating the internal devices. Accordingly, the volume of the secondary battery is reduced and the capacity thereof is maintained, thereby increasing the capacity density of the secondary battery. In one embodiment, the secondary battery includes a bare cell having a cap plate and a protection circuit module on the bare cell and including a printed circuit board surface-contacting the cap plate.
Abstract:
An object of the present invention is to allow stress that may be applied to a semiconductor package to be suppressed, when the semiconductor package is mounted on a curved board. In a mount board 1, a semiconductor package 20 is mounted on a curved board 10 including a curved surface on at least a portion thereof. The curved board 10 includes a pedestal portion 13a disposed on a region of the curved surface portion where the semiconductor package 20 is mounted and having an upper surface thereof formed flat, and a plurality of pad portions 15a disposed on the flat surface of the pedestal portion 13a. The pedestal portion 13a is formed of an insulating material. The semiconductor package 20 is mounted on the pad portions 15a.
Abstract:
A highly reliable electronic circuit board for suppressing propagation of noise and a power line communication apparatus using it are provided. An electronic circuit board of the invention is connected to a different electronic circuit board and including a first board having a first face and a second face opposed to the first face and a second board having a third face and a fourth face opposed to the third face. The electronic circuit board includes a first circuit mounted on one end of the first face for performing analog signal processing; a second circuit mounted on another end of the first face for performing digital signal processing; a junction layer provided between the second face and the third face for jointing the first board and the second board; a built-in electronic component built into the junction layer; a connection part mounted on the fourth face and to be connected to the different electronic circuit board; and a first conducting path for electrically connecting the second circuit and the connection part, wherein the connection part is mounted at a position overlapping projection projecting the second circuit onto the fourth face from a vertical direction relative to the first face.
Abstract:
A multilayered printed wiring board includes a plurality of insulating layers; a plurality of wiring layers which are located between the corresponding adjacent insulating layers; and a plurality of interlayer connection conductors for electrically connecting the wiring layers through the insulating layers; wherein a cavity is formed through one or more of the insulating layers so as to insert a first electric/electronic component and an area for embedding a second electric/electronic component is defined for the insulating layers.