公开(公告)号：US07217562B2

公开(公告)日：2007-05-15

申请号：US10414620

申请日：2003-04-16

Applicant: Han Cao ,  Jonas O. Tegenfeldt ,  Stephen Chou ,  Robert H. Austin

Inventor： Han Cao ,  Jonas O. Tegenfeldt ,  Stephen Chou ,  Robert H. Austin

IPC: C12M3/00 ,  C12Q1/68 ,  G01N15/06 ,  C07H21/04

CPC classification number: G01N21/6486 ,  B01L3/502707 ,  B01L3/502715 ,  B01L3/502746 ,  B01L3/502761 ,  B01L2200/027 ,  B01L2200/0663 ,  B01L2200/12 ,  B01L2300/0654 ,  B01L2300/0896 ,  B01L2400/0415 ,  B01L2400/086 ,  B81B2201/058 ,  B81C1/00119 ,  B81C2201/0157 ,  B81C2201/0159 ,  B82Y30/00 ,  G01N33/48721 ,  G03F7/2008 ,  Y10T436/143333

Abstract: The present invention relates to a device for interfacing nanofluidic and microfluidic components suitable for use in performing high throughput macromolecular analysis. Diffraction gradient lithography (DGL) is used to form a gradient interface between a microfluidic area and a nanofluidic area. The gradient interface area reduces the local entropic barrier to nanochannels formed in the nanofluidic area. In one embodiment, the gradient interface area is formed of lateral spatial gradient structures for narrowing the cross section of a value from the micron to the nanometer length scale. In another embodiment, the gradient interface area is formed of a vertical sloped gradient structure. Additionally, the gradient structure can provide both a lateral and vertical gradient.

Abstract translation: 本发明涉及适用于进行高通量大分子分析的纳米流体和微流体组分的界面装置。 衍射梯度光刻（DGL）用于在微流体区域和纳流体区域之间形成梯度界面。 梯度界面面积减小了在纳米流体区域形成的纳米通道的局部熵阻挡。 在一个实施例中，梯度界面区域由横向空间梯度结构形成，用于使从微米到纳米长度尺度的值的横截面变窄。 在另一个实施例中，梯度界面区域由垂直倾斜梯度结构形成。 此外，梯度结构可以提供横向和垂直梯度。

公开(公告)号：US20050272179A1

公开(公告)日：2005-12-08

申请号：US11136306

申请日：2005-05-24

Applicant: Andrew Frauenglass

Inventor： Andrew Frauenglass

IPC: B81C1/00 ,  H01L21/42

CPC classification number: H01L21/42 ,  B81B2201/035 ,  B81B2201/058 ,  B81C1/00492 ,  B81C99/0095 ,  B81C2201/0159

Abstract: Embodiments of a structure and embodiments of methods for fabricating structures provide three dimensional features defined by exposure to multiple wavelengths of light. In an embodiment, material is exposed to two different wavelengths of light. Embodiments of three dimensional structures may provide a variety of three-dimensional structural features and characteristics.

Abstract translation: 用于制造结构的方法的结构和实施例的实施例提供通过暴露于多个波长的光而限定的三维特征。 在一个实施例中，材料暴露于两种不同波长的光。 三维结构的实施例可以提供各种三维结构特征和特征。

公开(公告)号：US20050227477A1

公开(公告)日：2005-10-13

申请号：US10505180

申请日：2003-01-29

Applicant: Mika Okumura ,  Makio Horikawa ,  Kimitoshi Satou

Inventor： Mika Okumura ,  Makio Horikawa ,  Kimitoshi Satou

IPC: B81B3/00 ,  G01P15/08 ,  G01P15/125 ,  H01L21/28 ,  H01L29/84 ,  H01L21/4763

CPC classification number: B81C1/00095 ,  B81B2201/0235 ,  B81C2201/0109 ,  B81C2201/0159 ,  G01P15/0802 ,  G01P15/125 ,  H01L29/84

Abstract: An object of the present invention is to provide a technique for reducing a step height to be covered by photoresist during formation of an electrode connected to a semiconductor substrate, e.g. a silicon substrate on which an acceleration sensor resides. In order to achieve this object, an opening (80) for formation of an electrode (90) is formed before formation of a sacrificial layer (4), semiconductor film (50), and fixed electrode (51). Therefore thick photoresist is not required.

Abstract translation: 本发明的目的是提供一种降低在与半导体衬底连接的电极形成期间由光致抗蚀剂覆盖的台阶高度的技术，例如， 加速度传感器所在的硅基板。 为了实现该目的，在形成牺牲层（4），半导体膜（50）和固定电极（51）之前形成用于形成电极（90）的开口（80）。 因此，不需要厚的光致抗蚀剂。

公开(公告)号：US20050136359A1

公开(公告)日：2005-06-23

申请号：US10742276

申请日：2003-12-19

Applicant: Michael Weisberg

Inventor： Michael Weisberg

IPC: B81C1/00 ,  G03F7/00

CPC classification number: G03F7/00 ,  B33Y10/00 ,  B81C1/00492 ,  B81C2201/0159 ,  B81C2201/0197 ,  G03F7/0035

Abstract: A method of creating a microelectromechanical systems (MEMS) device includes applying a layer of photoresist to a lower layer to create a multilayer MEMS device. The method includes transferring the layer of photoresist to the lower layer. The method can also include spincoating the photoresist onto a release layer, softbaking the spincoated photoresist to at least partially dry it, transferring the photoresist to form a layer of the multilayer MEMS device, and exposing the photoresist to light to crosslink it. The multilayer MEMS device includes a plurality of layers of photoresist.

Abstract translation: 创建微机电系统（MEMS）装置的方法包括将光致抗蚀剂层施加到下层以产生多层MEMS器件。 该方法包括将光致抗蚀剂层转移到下层。 该方法还可以包括将光致抗蚀剂旋涂到剥离层上，将旋涂的光致抗蚀剂软化至少部分地干燥，转移光致抗蚀剂以形成多层MEMS器件的层，并将光致抗蚀剂曝光以使其交联。 多层MEMS器件包括多层光致抗蚀剂。

公开(公告)号：US06159413A

公开(公告)日：2000-12-12

申请号：US098289

申请日：1998-06-16

Applicant: Takanori Katoh ,  Yanping Zhang

Inventor： Takanori Katoh ,  Yanping Zhang

IPC: G21K5/02 ,  B29C39/02 ,  B29C39/26 ,  B32B3/02 ,  B32B27/06 ,  B81C1/00 ,  C23F4/00 ,  G03F7/00 ,  G03F7/075 ,  G03F7/09 ,  G03F7/20 ,  G03F7/40 ,  H01L21/027 ,  H01L21/302 ,  B29C59/16

CPC classification number: B81C1/00126 ,  B32B27/06 ,  B32B3/02 ,  G03F7/00 ,  G03F7/075 ,  G03F7/09 ,  B81C2201/0159 ,  G03F7/2039 ,  Y10S430/167 ,  Y10S430/168

Abstract: A laminated substrate is prepared, the laminated substrate having two layers including a first film and a second film in tight contact with the first film, the second film being made of a material capable of being etched with synchrotron radiation light. A mask member with a pattern is disposed in tight contact with the surface of the second film of the laminated structure or at a distance from the surface of the second film, the pattern of the mask member being made of a material not transmitting the synchrotron radiation light. The synchrotron radiation light is applied on a partial surface area of the second film via the mask member to etch the second film where the synchrotron radiation light is applied and to expose a partial surface area of the first film on the bottom of an etched area.

公开(公告)号：US5576147A

公开(公告)日：1996-11-19

申请号：US461983

申请日：1995-06-05

Applicant: Henry Guckel ,  Todd R. Christenson ,  Kenneth Skrobis

Inventor： Henry Guckel ,  Todd R. Christenson ,  Kenneth Skrobis

IPC: G03F7/027 ,  B81B1/00 ,  B81C1/00 ,  G03F7/00 ,  G03F7/20 ,  G03F7/26 ,  G03F7/30 ,  G03F7/38 ,  G03F7/40 ,  H01L21/027 ,  H05K3/18

CPC classification number: G03F7/38 ,  B81C1/0038 ,  G03F7/00 ,  G03F7/0035 ,  B81C2201/0128 ,  B81C2201/0159 ,  B81C2201/019 ,  B81C2201/032 ,  Y10S430/168 ,  Y10T428/31504

Abstract: In the formation of microstructures, a preformed sheet of photoresist, such as polymethylmethacrylate (PMMA), which is strain free, may be milled down before or after adherence to a substrate to a desired thickness. The photoresist is patterned by exposure through a mask to radiation, such as X-rays, and developed using a developer to remove the photoresist material which has been rendered susceptible to the developer. Micrometal structures may be formed by electroplating metal into the areas from which the photoresist has been removed. The photoresist itself may form useful microstructures, and can be removed from the substrate by utilizing a release layer between the substrate and the preformed sheet which can be removed by a remover which does not affect the photoresist. Multiple layers of patterned photoresist can be built up to allow complex three dimensional microstructures to be formed.

公开(公告)号：US20240317579A1

公开(公告)日：2024-09-26

申请号：US18676090

申请日：2024-05-28

Applicant: ROHM CO., LTD.

Inventor： Daisuke KAMINISHI ,  Martin Wilfried HELLER ,  Toma FUJITA

IPC: B81C1/00 ,  B81B7/00 ,  G01P15/125

CPC classification number: B81C1/00269 ,  B81B7/0006 ,  G01P15/125 ,  B81B2201/0235 ,  B81B2203/0353 ,  B81B2203/04 ,  B81C2201/013 ,  B81C2201/0159 ,  B81C2201/0176 ,  B81C2203/037

Abstract: A MEMS sensor includes a bond portion in which a metal structure in a device substrate and a metal laminate are eutectically bonded. The bond portion bonds the device substrate and a lid substrate. The metal laminate is located on a main surface of the lid substrate and facing an exposed portion in the metal structure. The metal laminate includes a first metal and a second metal different from the first metal.

公开(公告)号：US09663357B2

公开(公告)日：2017-05-30

申请号：US14963362

申请日：2015-12-09

Applicant: Texas Instruments Incorporated

Inventor： Jie Mao ,  Hau Nguyen ,  Luu Nguyen ,  Anindya Poddar

IPC: H01L21/683 ,  B81C1/00 ,  B81B7/00

CPC classification number: B81C1/00873 ,  B81B7/007 ,  B81B2201/0214 ,  B81B2201/0235 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81B2201/0278 ,  B81B2201/0292 ,  B81B2201/047 ,  B81B2207/07 ,  B81B2207/098 ,  B81C1/00333 ,  B81C2201/0125 ,  B81C2201/0132 ,  B81C2201/0159 ,  B81C2201/0181 ,  B81C2201/0188 ,  B81C2203/0136 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6836 ,  H01L23/3121 ,  H01L24/19 ,  H01L2221/68359 ,  H01L2224/04105 ,  H01L2224/96 ,  H01L2924/3511

Abstract: A method for fabricating packaged semiconductor devices (100) with an open cavity (110a) in panel format; placing (process 201) on an adhesive carrier tape a panel-sized grid of metallic pieces having a flat pad (230) and symmetrically placed vertical pillars (231); attaching (process 202) semiconductor chips (101) with sensor systems face-down onto the tape; laminating (process 203) and thinning (process 204) low CTE insulating material (234) to fill gaps between chips and grid; turning over (process 205) assembly to remove tape; plasma-cleaning assembly front side, sputtering and patterning (process 206) uniform metal layer across assembly and optionally plating (process 209) metal layer to form rerouting traces and extended contact pads for assembly; laminating (process 212) insulating stiffener across panel; opening (process 213) cavities in stiffener to access the sensor system; and singulating (process 214) packaged devices by cutting metallic pieces.

公开(公告)号：US09656859B2

公开(公告)日：2017-05-23

申请号：US14687943

申请日：2015-04-16

Applicant: David J. Meyer ,  Brian P. Downey

Inventor： David J. Meyer ,  Brian P. Downey

IPC: B81C1/00

CPC classification number: B81C1/00539 ,  B81C1/00936 ,  B81C2201/0107 ,  B81C2201/0132 ,  B81C2201/0143 ,  B81C2201/0159 ,  B81C2201/0177

Abstract: A process for fabricating a suspended microelectromechanical system (MEMS) structure comprising epitaxial semiconductor functional layers that are partially or completely suspended over a substrate. A sacrificial release layer and a functional device layer are formed on a substrate. The functional device layer is etched to form windows in the functional device layer defining an outline of a suspended MEMS device to be formed from the functional device layer. The sacrificial release layer is then etched with a selective release etchant to remove the sacrificial release layer underneath the functional layer in the area defined by the windows to form the suspended MEMS structure.

公开(公告)号：US20160304340A1

公开(公告)日：2016-10-20

申请号：US14687943

申请日：2015-04-16

Applicant: David J. Meyer ,  Brian P. Downey

Inventor： David J. Meyer ,  Brian P. Downey

IPC: B81C1/00

CPC classification number: B81C1/00539 ,  B81C1/00936 ,  B81C2201/0107 ,  B81C2201/0132 ,  B81C2201/0143 ,  B81C2201/0159 ,  B81C2201/0177

Abstract: A process for fabricating a suspended microelectromechanical system (MEMS) structure comprising epitaxial semiconductor functional layers that are partially or completely suspended over a substrate. A sacrificial release layer and a functional device layer are formed on a substrate. The functional device layer is etched to form windows in the functional device layer defining an outline of a suspended MEMS device to be formed from the functional device layer. The sacrificial release layer is then etched with a selective release etchant to remove the sacrificial release layer underneath the functional layer in the area defined by the windows to form the suspended MEMS structure.

Abstract translation: 一种用于制造悬浮微机电系统（MEMS）结构的方法，其包括部分或完全悬浮在衬底上的外延半导体功能层。 在基板上形成牺牲剥离层和功能元件层。 功能器件层被蚀刻以在功能器件层中形成窗口，其限定要由功能器件层形成的悬置的MEMS器件的轮廓。 然后用选择性释放蚀刻剂蚀刻牺牲剥离层，以去除由窗口限定的区域中的功能层下方的牺牲剥离层，以形成悬浮的MEMS结构。