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    INCREASING ELECTROMIGRATION LIFETIME AND CURRENT DENSITY IN IC
    1.
    发明申请
    INCREASING ELECTROMIGRATION LIFETIME AND CURRENT DENSITY IN IC 审中-公开
    增加集成电路的电迁移寿命和电流密度

    公开(公告)号：WO2007045568A3

    公开(公告)日：2007-07-12

    申请号：PCT/EP2006067144

    申请日：2006-10-06

    Applicant: IBM ,  IBM UK ,  GRECO STEPHEN ,  HU CHAO-KUN ,  MCLAUGHLIN PAUL

    Inventor： GRECO STEPHEN ,  HU CHAO-KUN ,  MCLAUGHLIN PAUL

    IPC: H01L23/522

    CPC classification number: H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: An integrated circuit with increased electromigration lifetime and allowable current density and methods of forming same are disclosed. In one embodiment, an integrated circuit includes a conductive line connected to at least one functional via, and at least one dummy via having a first, lower end electrically connected to the conductive line and a second upper end electrically unconnected (isolated) to any conductive line. Each dummy via extends vertically upwardly from the conductive line and removes a portion of a fast diffusion path, i.e., metal to dielectric cap interface, which is replaced with a metal to metallic liner interface. As a result, each dummy via reduces metal diffusion rates and thus increases electromigration lifetimes and allows increased current density.

    Abstract translation: 公开了具有增加的电迁移寿命和容许电流密度的集成电路及其形成方法。 在一个实施例中，集成电路包括连接到至少一个功能通孔的导线和至少一个伪通孔，所述至少一个伪通孔具有电连接到导线的第一下端和与任何导电不电连接（隔离）的第二上端 线。 每个虚拟通孔从导线垂直向上延伸，并去除快速扩散路径的一部分，即金属对电介质盖界面，其由金属对金属衬里界面取代。 结果，每个虚拟通孔降低了金属扩散速率并因此增加了电迁移寿命并允许增加电流密度。

    INTERCONNECT STRUCTURE FOR INTEGRATED CIRCUITS HAVING IMPROVED ELECTROMIGRATION CHARACTERISTICS
    2.
    发明公开
    INTERCONNECT STRUCTURE FOR INTEGRATED CIRCUITS HAVING IMPROVED ELECTROMIGRATION CHARACTERISTICS 审中-公开
    连接结构与改进的电性能迁移集成电路的

    公开(公告)号：EP2283515A4

    公开(公告)日：2014-10-22

    申请号：EP09759016

    申请日：2009-05-22

    Applicant: IBM

    Inventor： FILIPPI RONALD ,  CHANDRA KAUSHIK ,  SANKARAN SUJATHA ,  HU CHAO-KUN ,  STANDAERT THEODORUS ,  GRUNOW STEPHAN ,  SIMON ANDREW H

    IPC: H01L23/528 ,  H01L21/768 ,  H01L23/532

    CPC classification number: H01L23/528 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: An interconnect structure for an integrated circuit (IC) device includes an elongated, electrically conductive line comprising one or more segments formed at a first width, w1, and one or more segments formed at one or more additional widths, w2 . . . wN, with the first width being narrower than each of the one or more additional widths; wherein the relationship of the total length, L1, of the one or more conductive segments formed at the first width to the total lengths, L2 . . . LN, of the one or more conductive segments formed at the one or more additional widths is selected such that, for a given magnitude of current carried by the conductive line, a critical length with respect to an electromigration short-length effect benefit is maintained such that a total length of the conductive line, L=L1+L2+ . . . +LN, meets a minimum desired design length regardless of the critical length.

    COPPER INTERCONNECTION OF METAL SEED LAYER INSERTION STRUCTURE
    6.
    发明专利
    COPPER INTERCONNECTION OF METAL SEED LAYER INSERTION STRUCTURE 失效

    公开(公告)号：JPH11340229A

    公开(公告)日：1999-12-10

    申请号：JP11751399

    申请日：1999-04-26

    Applicant: IBM

    Inventor： EDELSTEIN DANIEL CHARLES ,  HARPER JAMES MCKELL EDWIN ,  HU CHAO-KUN ,  SIMON ANDREW H ,  UZOH CYPRIAN EMEKA

    IPC: H01L23/52 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/532

    Abstract: PROBLEM TO BE SOLVED: To provide an interconnected structure of copper alloys having improved electromigration resistance force, adhesion and other surface characteristics. SOLUTION: Copper conductor bodies 56 and 60 and a copper alloy or metal seed layer 76 disposed between the copper conductor bodies and an electronic device are utilized to provide a novel interconnected structure for establishing electrical communication with the electronic device. In order to improve the electromigration resistance force, an adhesion property to a barrier layer, device surface characteristics or an adhesion process, copper-based seed layers of various decompositions or a specific metal seed layer can be used according to each purpose.

    EFFICIENT INTERCONNECT STRUCTURE FOR ELECTRICAL FUSE APPLICATIONS
    8.
    发明申请
    EFFICIENT INTERCONNECT STRUCTURE FOR ELECTRICAL FUSE APPLICATIONS 审中-公开
    电气保险丝应用的有效互连结构

    公开(公告)号：WO2009139962A3

    公开(公告)日：2010-01-07

    申请号：PCT/US2009038380

    申请日：2009-03-26

    Applicant: IBM ,  GIGNAC LYNNE M ,  HU CHAO-KUN ,  YANG CHIH-CHAO

    Inventor： GIGNAC LYNNE M ,  HU CHAO-KUN ,  YANG CHIH-CHAO

    IPC: H01L23/52 ,  H01L23/525 ,  H01L23/532

    CPC classification number: H01L23/53295 ,  H01L21/76805 ,  H01L21/76807 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76844 ,  H01L21/76888 ,  H01L23/5226 ,  H01L23/5256 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A semiconductor structure is provided that includes an interconnect structure and a fuse structure located in different areas, yet within the same interconnect level. The interconnect structure has high electromigration resistance, while the fuse structure has a lower electromigration resistance as compared with the interconnect structure. The fuse structure includes a conductive material embedded within an interconnect dielectric in which the upper surface of the conductive material has a high concentration of oxygen present therein. A dielectric capping layer is located atop the dielectric material and the conductive material. The presence of the surface oxide layer at the interface between the conductive material and the dielectric capping layer degrades the adhesion between the conductive material and the dielectric capping layer. As such, when current is provided to the fuse structure electromigration of the conductive material occurs and over time an opening is formed in the conductive material blowing the fuse element.

    Abstract translation: 提供了一种半导体结构，其包括互连结构和位于相同互连级别内的不同区域中的熔丝结构。 互连结构具有高的电迁移率，而与互连结构相比，熔丝结构具有较低的电迁移电阻。 熔丝结构包括嵌入在互连电介质内的导电材料，其中导电材料的上表面具有存在于其中的高浓度的氧。 电介质覆盖层位于电介质材料和导电材料的顶部。 在导电材料和电介质覆盖层之间的界面处的表面氧化物层的存在降低了导电材料和电介质覆盖层之间的粘合性。 因此，当电流提供给熔丝结构时，导电材料的电迁移发生，并且随着时间的推移，在引导熔丝元件的导电材料中形成开口。

    IMPROVED ON-CHIP Cu INTERCONNECTION USING METAL CAP HAVING A THICKNESS OF 1 TO 5 NM
    10.
    发明专利
    IMPROVED ON-CHIP Cu INTERCONNECTION USING METAL CAP HAVING A THICKNESS OF 1 TO 5 NM 有权
    使用1至5N的厚度的金属盖改进的片上铜互连

    公开(公告)号：JP2006203197A

    公开(公告)日：2006-08-03

    申请号：JP2006007419

    申请日：2006-01-16

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

    Inventor： BRULEY JOHN ,  CARRUTHERS ROY A ,  LINN MARIE GIGNAC ,  HU CHAO-KUN ,  LINIGER ERIC G ,  MALHOTRA SANDRA G ,  ROSSNAGEL STEPHEN M

    IPC: H01L21/768

    CPC classification number: H01L21/76849 ,  H01L21/76829 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

    Abstract: PROBLEM TO BE SOLVED: To provide an improved on-chip Cu interconnection that uses a metal cap having a thickness of 1 to 5 nm.
    SOLUTION: There is disclosed a procedure for coating the surface of a Cu Damascene wire with an element, having a thickness of 1 to 5 nm prior to deposition of an interlayer dielectric or dielectric diffusion barrier layer. The coating brings about protection against oxidization, increases the adhesive force between Cu and the dielectric, and makes the boundary surface diffusion of Cu reduced. Further, the thin cap layer increases the electromigration lifetime of Cu and reduces the occurrence of voids induced by stress. The selected element can be directly deposited on Cu embedded in the dielectric in the lower layer, without causing short-circuiting between the Cu wires. These selected elements are selected, based on the negative high reduction potential with respect to oxygen and water, low solubility to Cu, and the compound formation with Cu.
    COPYRIGHT: (C)2006,JPO&NCIPI

    Abstract translation: 要解决的问题：提供使用厚度为1至5nm的金属帽的改进的片上Cu互连。 解决方案：公开了在沉积层间电介质或电介质扩散阻挡层之前，用具有1至5nm厚度的元件涂覆Cu镶嵌线的表面的步骤。 该涂层具有防氧化保护作用，增加了Cu与电介质之间的粘合力，使Cu的边界表面扩散减少。 此外，薄盖层增加了Cu的电迁移寿命并且减少了由应力引起的空隙的发生。 所选择的元件可以直接沉积在嵌入下层电介质中的Cu上，而不会导致Cu线之间的短路。 这些选择的元素基于相对于氧和水的负高还原电位，对Cu的低溶解度和与Cu的化合物形成而选择。 版权所有（C）2006，JPO＆NCIPI

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