公开(公告)号：DE10012610C2

公开(公告)日：2003-06-18

申请号：DE10012610

申请日：2000-03-15

Applicant: INFINEON TECHNOLOGIES AG

Inventor： WERNER WOLFGANG ,  AHLERS DIRK

IPC: H01L29/06 ,  H01L29/417 ,  H01L29/78 ,  H01L29/808

Abstract: The present invention relates to a high-voltage semiconductor component having a semiconductor substrate of a first conduction type on which a semiconductor layer is provided as a drift path that takes up the reverse voltage of the semiconductor component. The semiconductor layer is either of the first conduction type or of a second conduction type that is opposite the first conduction type. The semiconductor layer is more weakly doped than the semiconductor substrate. Laterally oriented semiconductor regions of the first and second conduction types are alternately provided in the semiconductor layer. Furthermore, the present invention relates to a high-voltage semiconductor component having a MOS field-effect transistor that is formed in a semiconductor substrate and has a drift path that is connected to its drain electrode.

公开(公告)号：DE10143515A1

公开(公告)日：2003-04-03

申请号：DE10143515

申请日：2001-09-05

Applicant: INFINEON TECHNOLOGIES AG

Inventor： RUEB MICHAEL ,  UMBACH FRANK ,  WERNER WOLFGANG

IPC: G03F1/20 ,  H01L21/266 ,  H01L29/06 ,  G03F9/00

Abstract: Mask arrangement comprises a number of mask elements each having a mask pattern (11, 12, 13). The mask elements are arranged in a predetermined spatial relationship. The mask arrangement is formed with a combination mask pattern by interacting and/or overlapping the mask pattern. An Independent claim is also included for a process for the production of the mask arrangement. A first mask element with a first mask pattern and a second mask element with a second mask pattern are arranged in the mask elements. The mask elements are connected together in the arrangement either directly or via a connecting region which is formed as an adhesive layer, semiconductor layer and/or silicon oxide layer.

公开(公告)号：DE10106073A1

公开(公告)日：2002-08-29

申请号：DE10106073

申请日：2001-02-09

Applicant: INFINEON TECHNOLOGIES AG

Inventor： WERNER WOLFGANG ,  STECHER MATTHIAS

IPC: H01L27/12 ,  H01L29/06 ,  H01L29/73 ,  H01L29/78 ,  H01L29/786 ,  H01L29/861

Abstract: A semiconductor component has a semiconductor substrate, an insulation layer located on the semiconductor substrate, and a semiconductor layer that is arranged on the insulation layer. A first doped terminal zone, a second doped terminal zone, and a drift zone are formed in the semiconductor layer between the first and second terminal zones. At least one of the first and second terminal zones directly adjoins the semiconductor substrate.

公开(公告)号：DE10202480A1

公开(公告)日：2002-08-14

申请号：DE10202480

申请日：2002-01-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： STENGL JENS-PEER ,  TAGHIZADEH-KASCHANI KARIM-THOM ,  TIHANYI JENOE ,  WERNER WOLFGANG

IPC: H03K17/06 ,  H03K17/567 ,  H03K17/689 ,  H04B1/20 ,  G08C17/02

Abstract: A signal to be transferred between electronic modules (3,4,7,8), is converted into a line-independent electromagnetic wave by respective transmitters (31,41,71,81) and outputs to receivers (32,42,72,82). The electromagnetic wave is converted into a reception signal using receivers at the receiving electronic module. An independent claim is included for system for transferring signals between two electronic modules.

公开(公告)号：DE10057612A1

公开(公告)日：2002-05-29

申请号：DE10057612

申请日：2000-11-21

Applicant: INFINEON TECHNOLOGIES AG

Inventor： WERNER WOLFGANG

IPC: H01L29/06 ,  H01L29/739 ,  H01L29/861

Abstract: Semiconductor component comprises a semiconductor body (100) having a first zone (20) of a first conducting type (p) and a second zone (30) of a second conducting type (n) connected to the first zone in the vertical direction of the semiconductor body. The first and second zones extend in the lateral direction up to a side wall (101) running in the vertical direction. Preferred Features: The semiconductor body has a third zone (40) in the region of the side wall connected to the first zone. The third zone has a surface charge which is smaller than the breakdown charge, preferably less than 1 x 10 q.cm . A passivating layer made from a semiconductor oxide, a nitride or polyamide is applied to the side wall.

公开(公告)号：DE10005774A1

公开(公告)日：2001-08-23

申请号：DE10005774

申请日：2000-02-10

Applicant: INFINEON TECHNOLOGIES AG

Inventor： WERNER WOLFGANG ,  SOMMER PETER ,  KANERT WERNER

IPC: H01L29/78 ,  H01L29/872

Abstract: DMOS cell consists of DMOS transistor (11) and Schottky diode (12) which lie parallel to the source-drain path of the transistor. The source zone (6) of the transistor is in contact with a source-contact layer (7, 14) via a contact hole (8) in a gate insulating layer (9). The Schottky diode is formed in the contact hole between the source-contact layer and the drain zone (1, 2) of the transistor. Preferred Features: The source-contact layer is provided with a Schottky metallization (13) made from tungsten silicide, tantalum silicide, platinum silicide or molybdenum silicide, and has a plug (14) made from conducting polycrystalline silicon.

公开(公告)号：DE19958151A1

公开(公告)日：2001-06-13

申请号：DE19958151

申请日：1999-12-03

Applicant: INFINEON TECHNOLOGIES AG

Inventor： NELLE PETER ,  FISCHER HERMANN ,  WERNER WOLFGANG ,  SCHAEFER HERBERT

IPC: H01L21/336 ,  H01L29/06 ,  H01L29/78

Abstract: Lateral high voltage semiconductor element comprises a semiconductor substrate (1) of first conductivity with a semiconductor layer (2) of second conductivity having an active zone (3). Semiconductor regions (11, 12) of first and second conductivity are provided on the semiconductor layer by selective multiple epitaxy. An Independent claim is also included for a process for the production of a lateral high voltage semiconductor element, comprising back-etching an insulating layer provided on the edges of the semiconductor regions (11, 12) after selective multiple epitaxy and then carrying out further selective epitaxy to form a connecting layer. Preferred Features: The semiconductor regions have a thickness of 1-100 nm, especially 50 nm.